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Sat, 28 May 2022 23:18:24 -0400 (EDT) From: Tom Fitzhenry To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , linux-rockchip@lists.infradead.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland , Ondrej Jirman , Martijn Braam , Tom Fitzhenry Subject: [PATCH 1/2] dt-bindings: arm: rockchip: Add PinePhone Pro bindings Date: Sun, 29 May 2022 13:17:04 +1000 Message-Id: <20220529031705.278631-2-tom@tom-fitzhenry.me.uk> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220529031705.278631-1-tom@tom-fitzhenry.me.uk> References: <20220529031705.278631-1-tom@tom-fitzhenry.me.uk> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document board compatible names for Pine64 PinePhonePro. https://wiki.pine64.org/wiki/PinePhone_Pro Signed-off-by: Tom Fitzhenry Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index eece92f83a2d..e6a1b76f9c44 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -489,6 +489,11 @@ properties: - const: pine64,pinenote - const: rockchip,rk3566 =20 + - description: Pine64 PinePhonePro + items: + - const: pine64-pinephone-pro + - const: rockchip,rk3399 + - description: Pine64 Rock64 items: - const: pine64,rock64 --=20 2.36.0 From nobody Tue May 5 08:58:52 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFAB4C433EF for ; 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Sat, 28 May 2022 23:18:34 -0400 (EDT) From: Tom Fitzhenry To: Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , linux-rockchip@lists.infradead.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Samuel Holland , Ondrej Jirman , Martijn Braam , Tom Fitzhenry , Ondrej Jirman Subject: [PATCH 2/2] arm64: dts: rockchip: Add initial support for Pine64 PinePhone Pro Date: Sun, 29 May 2022 13:17:05 +1000 Message-Id: <20220529031705.278631-3-tom@tom-fitzhenry.me.uk> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220529031705.278631-1-tom@tom-fitzhenry.me.uk> References: <20220529031705.278631-1-tom@tom-fitzhenry.me.uk> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is a basic DT that includes only features that are already supported by mainline drivers. Tested to work: booting from eMMC, WiFi, charging. Future patches will flesh out the DT. Some components, e.g. the panel, are awaiting driver mainlining. This is derived from a combination of https://gitlab.com/pine64-org/linux and https://megous.com/git/linux. https://wiki.pine64.org/wiki/PinePhone_Pro Co-developed-by: Ondrej Jirman Co-developed-by: Martijn Braam Signed-off-by: Tom Fitzhenry --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../dts/rockchip/rk3399-pinephone-pro.dts | 939 ++++++++++++++++++ 2 files changed, 940 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 4ae9f35434b8..c00e7922d974 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-nanopi-neo4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-nanopi-r4s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-orangepi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-pinebook-pro.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-pinephone-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-puma-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-roc-pc.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-roc-pc-mezzanine.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts b/arch/a= rm64/boot/dts/rockchip/rk3399-pinephone-pro.dts new file mode 100644 index 000000000000..b1a486db1dfe --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts @@ -0,0 +1,939 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Martijn Braam + * Copyright (c) 2021 Kamil Trzci=C5=84ski + */ + +// PinePhone Pro datasheet: https://files.pine64.org/doc/PinePhonePro/Pine= phonePro-Schematic-V1.0-20211127.pdf + +/dts-v1/; +#include +#include +#include +#include +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model =3D "Pine64 PinePhonePro"; + compatible =3D "pine64,pinephone-pro", "rockchip,rk3399"; + + chosen { + bootargs =3D "earlycon=3Duart8250,mmio32,0xff1a0000"; + stdout-path =3D "serial2:115200n8"; + }; + + // Per "RK 3399 SARADC", page 8. + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1600000>; + poll-interval =3D <100>; + + button-up { + label =3D "Volume Up"; + linux,code =3D ; + press-threshold-microvolt =3D <100000>; + }; + + button-down { + label =3D "Volume Down"; + linux,code =3D ; + press-threshold-microvolt =3D <300000>; + }; + }; + + cluster1_opp_ppp: opp-table1b { + compatible =3D "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz =3D /bits/ 64 <408000000>; + opp-microvolt =3D <800000>; + clock-latency-ns =3D <40000>; + }; + opp01 { + opp-hz =3D /bits/ 64 <600000000>; + opp-microvolt =3D <800000>; + }; + opp02 { + opp-hz =3D /bits/ 64 <816000000>; + opp-microvolt =3D <825000>; + }; + opp03 { + opp-hz =3D /bits/ 64 <1008000000>; + opp-microvolt =3D <875000>; + }; + opp04 { + opp-hz =3D /bits/ 64 <1200000000>; + opp-microvolt =3D <950000>; + }; + opp05 { + opp-hz =3D /bits/ 64 <1416000000>; + opp-microvolt =3D <1025000>; + }; + }; + + // Per "BACKLIGHT", page 16. + backlight: backlight { + compatible =3D "pwm-backlight"; + pwms =3D <&pwm0 0 1000000 0>; + pwm-delay-us =3D <10000>; + }; + + // Per "RK3399 GPIO", page 11. + leds { + compatible =3D "gpio-leds"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&red_led_pin &green_led_pin &blue_led_pin>; + + led-standby { + color =3D ; + default-state =3D "off"; + function =3D LED_FUNCTION_STANDBY; + gpios =3D <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; + label =3D "red:standby"; + panic-indicator; + retain-state-suspended; + }; + + led-pwr { + color =3D ; + default-state =3D "on"; + function =3D LED_FUNCTION_POWER; + gpios =3D <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>; + label =3D "green:disk-activity"; + }; + + blue-charging { + color =3D ; + default-state =3D "off"; + function =3D LED_FUNCTION_CHARGING; + gpios =3D <&gpio4 RK_PD6 GPIO_ACTIVE_HIGH>; + label =3D "blue:charging"; + }; + }; + + gpio-key-power { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwrbtn_pin>; + + power { + debounce-interval =3D <20>; + // Per "PMU Controler", page 4. + gpios =3D <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; + label =3D "Power"; + linux,code =3D ; + wakeup-source; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&rk818 1>; + clock-names =3D "ext_clock"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_enable_h>; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <500000>; + + /* WL_REG_ON on module */ + reset-gpios =3D <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; + }; + + vibrator { + compatible =3D "gpio-vibrator"; + // Per "GPIO", page 11. + enable-gpios =3D <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; + // Per "Motor", page 17. + vcc-supply =3D <&vcc3v3_sys>; + }; + + /* Power tree */ + /* Root power source */ + vcc_sysin: vcc-sysin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc_sysin"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vcc5v0-host-regulator { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-always-on; + regulator-boot-on; + vin-supply =3D <&vcc_sysin>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc5v0_typec: vcc5v0-typec-regulator { + compatible =3D "regulator-fixed"; + gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_typec_en>; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-name =3D "vcc5v0_typec"; + vin-supply =3D <&vcc5v0_sys>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + /* Main 3.3v supply */ + vcc3v3_sys: wifi_bat: vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc_sysin>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc1v8_codec: vcc1v8-codec-regulator { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc1v8_codec_en>; + regulator-name =3D "vcc1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + /* MIPI DSI panel 1.8v supply */ + vcc1v8_lcd: vcc1v8-lcd { + compatible =3D "regulator-fixed"; + enable-active-high; + regulator-name =3D "vcc1v8_lcd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + gpio =3D <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&display_pwren1>; + }; + + /* MIPI DSI panel 2.8v supply */ + vcc2v8_lcd: vcc2v8-lcd { + compatible =3D "regulator-fixed"; + enable-active-high; + regulator-name =3D "vcc2v8_lcd"; + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + vin-supply =3D <&vcc3v3_sys>; + gpio =3D <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&display_pwren>; + }; + + vcca1v8_s3: vcc1v8-s3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcca1v8_s3"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&cpu_l0 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply =3D <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply =3D <&vdd_cpu_b>; + operating-points-v2 =3D <&cluster1_opp_ppp>; +}; + +&cpu_b1 { + cpu-supply =3D <&vdd_cpu_b>; + operating-points-v2 =3D <&cluster1_opp_ppp>; +}; + +&emmc_phy { + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + +&i2c0 { + // Per "SCL clock frequency", page 30, RK818 datasheet. + clock-frequency =3D <400000>; + i2c-scl-rising-time-ns =3D <168>; + i2c-scl-falling-time-ns =3D <4>; + status =3D "okay"; + + // Per "PMIC RK818-3", page 13. + rk818: pmic@1c { + compatible =3D "rockchip,rk818"; + reg =3D <0x1c>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + #clock-cells =3D <1>; + clock-output-names =3D "xin32k", "rk808-clkout2"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + extcon =3D <&fusb0>; + + vcc1-supply =3D <&vcc_sysin>; + vcc2-supply =3D <&vcc_sysin>; + vcc3-supply =3D <&vcc_sysin>; + vcc4-supply =3D <&vcc_sysin>; + vcc6-supply =3D <&vcc_sysin>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc_sysin>; + vcc9-supply =3D <&vcc3v3_sys>; + + regulators { + vdd_cpu_l: DCDC_REG1 { + regulator-name =3D "vdd_cpu_l"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <750000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_center: DCDC_REG2 { + regulator-name =3D "vdd_center"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + // DDR + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + // Power RAM while suspended. + regulator-on-in-suspend; + }; + }; + + vcc_1v8: vcc_wl: DCDC_REG4 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + // Audio codec. + vcca3v0_codec: LDO_REG1 { + regulator-name =3D "vcca3v0_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + // Touch screen. + vcc3v0_touch: LDO_REG2 { + regulator-name =3D "vcc3v0_touch"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_codec: LDO_REG3 { + regulator-name =3D "vcca1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_power_on: LDO_REG4 { + regulator-name =3D "vcc_power_on"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcc_3v0: LDO_REG5 { + regulator-name =3D "vcc_3v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3000000>; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name =3D "vcc_1v5"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1500000>; + regulator-max-microvolt =3D <1500000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1500000>; + }; + }; + + vcc1v8_dvp: LDO_REG7 { + regulator-name =3D "vcc1v8_dvp"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_s3: LDO_REG8 { + regulator-name =3D "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG9 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcc3v3_s0: SWITCH_REG { + regulator-name =3D "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + boost_otg: DCDC_BOOST { + regulator-name =3D "boost_otg"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <5000000>; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name =3D "otg_switch"; + }; + }; + }; + + vdd_cpu_b: regulator@40 { + compatible =3D "silergy,syr827"; + reg =3D <0x40>; + fcs,suspend-voltage-selector =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vsel1_pin>; + regulator-name =3D "vdd_cpu_b"; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1500000>; + regulator-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible =3D "silergy,syr828"; + reg =3D <0x41>; + fcs,suspend-voltage-selector =3D <1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vsel2_pin>; + regulator-name =3D "vdd_gpu"; + regulator-min-microvolt =3D <712500>; + regulator-max-microvolt =3D <1500000>; + regulator-ramp-delay =3D <1000>; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + i2c-scl-rising-time-ns =3D <300>; + i2c-scl-falling-time-ns =3D <15>; + status =3D "okay"; +}; + +&i2c3 { + i2c-scl-rising-time-ns =3D <450>; + i2c-scl-falling-time-ns =3D <15>; + status =3D "okay"; + + // Per "Ambient Light", page 17. + light-sensor@48 { + compatible =3D "sensortek,stk3311"; + reg =3D <0x48>; + interrupt-parent =3D <&gpio4>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&stk3311_int>; + vdd-supply =3D <&vcc_3v0>; + leda-supply =3D <&vcc_3v0>; + }; +}; + +&i2c4 { + i2c-scl-rising-time-ns =3D <600>; + i2c-scl-falling-time-ns =3D <20>; + status =3D "okay"; + + // Per "TYPE-C", page 23. + fusb0: typec-portc@22 { + compatible =3D "fcs,fusb302"; + reg =3D <0x22>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&fusb0_int>; + vbus-supply =3D <&vcc5v0_typec>; + + connector { + compatible =3D "usb-c-connector"; + data-role =3D "dual"; + label =3D "USB-C"; + op-sink-microwatt =3D <1000000>; + power-role =3D "dual"; + sink-pdos =3D + ; + source-pdos =3D + ; + try-power-role =3D "sink"; + + extcon-cables =3D <1 2 5 6 9 10 12 44>; + typec-altmodes =3D <0xff01 1 0x001c0c00 1>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + usbc_hs: endpoint { + remote-endpoint =3D + <&u2phy0_typec_hs>; + }; + }; + + port@1 { + reg =3D <1>; + + usbc_ss: endpoint { + remote-endpoint =3D + <&tcphy0_typec_ss>; + }; + }; + + port@2 { + reg =3D <2>; + + usbc_dp: endpoint { + remote-endpoint =3D + <&tcphy0_typec_dp>; + }; + }; + }; + }; + }; + + // Per "Gyro", page 17. + accelerometer@68 { + compatible =3D "invensense,mpu6500"; + reg =3D <0x68>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + vdd-supply =3D <&vcc_1v8>; + vddio-supply =3D <&vcc_1v8>; + + mount-matrix =3D + "1", "0", "0", + "0", "-1", "0", + "0", "0", "1"; + }; +}; + +&io_domains { + status =3D "okay"; + + bt656-supply =3D <&vcc1v8_dvp>; + audio-supply =3D <&vcca1v8_codec>; + sdmmc-supply =3D <&vccio_sd>; + gpio1830-supply =3D <&vcc_3v0>; +}; + +&pmu_io_domains { + pmu1830-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&pinctrl { + bt { + bt_enable_h: bt-enable-h { + rockchip,pins =3D <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_host_wake_l: bt-host-wake-l { + rockchip,pins =3D <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + bt_wake_l: bt-wake-l { + rockchip,pins =3D <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + buttons { + pwrbtn_pin: pwrbtn-pin { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + fusb302x { + fusb0_int: fusb0-int { + rockchip,pins =3D <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + red_led_pin: red-led-pin { + rockchip,pins =3D <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + green_led_pin: green-led-pin { + rockchip,pins =3D <4 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + blue_led_pin: blue-led-pin { + rockchip,pins =3D <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins =3D <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_pin: vsel1-pin { + rockchip,pins =3D <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_pin: vsel2-pin { + rockchip,pins =3D <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + sdcard { + sdmmc0_pwr_h: sdmmc0-pwr-h { + rockchip,pins =3D <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins =3D <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb-typec { + vcc5v0_typec_en: vcc5v0_typec_en { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + dsi { + display_rst_l: display-rst-l { + rockchip,pins =3D <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren: display-pwren { + rockchip,pins =3D <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + display_pwren1: display-pwren1 { + rockchip,pins =3D <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; + + stk3311 { + stk3311_int: stk3311-int { + rockchip,pins =3D <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sound { + vcc1v8_codec_en: vcc1v8-codec-en { + rockchip,pins =3D <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm0 { + status =3D "okay"; +}; + +&pwm1 { + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +// Per "SARADC", page 8. +&saradc { + vref-supply =3D <&vcca1v8_s3>; + status =3D "okay"; +}; + +&sdio0 { + bus-width =3D <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; + sd-uhs-sdr104; + status =3D "okay"; +}; + +// Per "SDMMC Controler", page 6. +&sdmmc { + bus-width =3D <4>; + cap-sd-highspeed; + cd-gpios =3D <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + disable-wp; + max-frequency =3D <150000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + vmmc-supply =3D <&vcc3v3_sys>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +&sdhci { + bus-width =3D <8>; + mmc-hs200-1_8v; + non-removable; + status =3D "okay"; +}; + +&tcphy0 { + extcon =3D <&fusb0>; + status =3D "okay"; +}; + +&tcphy0_dp { + port { + tcphy0_typec_dp: endpoint { + remote-endpoint =3D <&usbc_dp>; + }; + }; +}; + +&tcphy0_usb3 { + port { + tcphy0_typec_ss: endpoint { + remote-endpoint =3D <&usbc_ss>; + }; + }; +}; + +// Enable thermal sensors. +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode =3D <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity =3D <1>; + status =3D "okay"; +}; + +&u2phy0 { + status =3D "okay"; + + u2phy0_otg: otg-port { + status =3D "okay"; + }; + + u2phy0_host: host-port { + status =3D "okay"; + phy-supply =3D <&vcc5v0_sys>; + }; + + port { + u2phy0_typec_hs: endpoint { + remote-endpoint =3D <&usbc_hs>; + }; + }; +}; + +&u2phy1 { + status =3D "okay"; + + u2phy1_otg: otg-port { + status =3D "okay"; + }; + + u2phy1_host: host-port { + status =3D "okay"; + phy-supply =3D <&vcc5v0_sys>; + }; +}; + +&uart0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart0_xfer &uart0_cts &uart0_rts>; + uart-has-rtscts; + status =3D "okay"; + + // Per "WIFI/BT MODULE", page 19. + bluetooth { + compatible =3D "brcm,bcm4345c5"; + clocks =3D <&rk818 1>; + clock-names =3D "lpo"; + device-wakeup-gpios =3D <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; + host-wakeup-gpios =3D <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; + max-speed =3D <1500000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&bt_host_wake_l &bt_wake_l &bt_enable_h>; + shutdown-gpios =3D <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; + vbat-supply =3D <&wifi_bat>; + vddio-supply =3D <&vcc_wl>; + }; +}; + +&uart2 { + status =3D "okay"; +}; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; + +&usbdrd3_0 { + status =3D "okay"; +}; + +&usbdrd_dwc3_0 { + dr_mode =3D "peripheral"; + status =3D "okay"; +}; + +&vopb { + status =3D "okay"; +}; + +&vopb_mmu { + status =3D "okay"; +}; + +&vopl { + status =3D "okay"; +}; + +&vopl_mmu { + status =3D "okay"; +}; --=20 2.36.0