From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CB912C433F5 for ; Fri, 27 May 2022 06:34:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245500AbiE0GeL (ORCPT ); Fri, 27 May 2022 02:34:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35374 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244912AbiE0GeA (ORCPT ); Fri, 27 May 2022 02:34:00 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFC8D5BD1C for ; Thu, 26 May 2022 23:33:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633238; x=1685169238; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d/p078n3J2mHTDHMlCsZwDS4Rb5qjjADCMyliDReNEI=; b=MuMY/OeJaVfZNQb8pZ4OqWqTvZUYIrTuxBtZw/6KQrJrgvNxU06gEc+G PBppgz5HielnLhbj4zC8+GU5WACtL9DmSWqyY3yiHXEmrmfWv6tlHc8eU gbTEX8JsyxOmomjWLaDz0csgZJ9g20VUFzFBNb82e/mKPISlV5MUiQJDi bXHKVdjTWN9oRKn8vRdtO5smPRO0tUG8cVa3AA27VQimh8Jh2J0B4jiNs S2Lm7PRcSCBM/DL35bz65XgURoR6OPxu8YLAFhds5WTbqSID7UONPS5zC /kl3eApX4LesEaWAk39/reSPle7cj+nXybJbcBCZB5pwf2eLINOEAx0aR w==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044822" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044822" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:33:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688387" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:33:55 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 01/12] iommu/vt-d: Use iommu_get_domain_for_dev() in debugfs Date: Fri, 27 May 2022 14:30:08 +0800 Message-Id: <20220527063019.3112905-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Retrieve the attached domain for a device through the generic interface exposed by the iommu core. This also makes device_domain_lock static. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.h | 1 - drivers/iommu/intel/debugfs.c | 20 ++++++++------------ drivers/iommu/intel/iommu.c | 2 +- 3 files changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index a22adfbdf870..8a6d64d726c0 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -480,7 +480,6 @@ enum { #define VTD_FLAG_SVM_CAPABLE (1 << 2) =20 extern int intel_iommu_sm; -extern spinlock_t device_domain_lock; =20 #define sm_supported(iommu) (intel_iommu_sm && ecap_smts((iommu)->ecap)) #define pasid_supported(iommu) (sm_supported(iommu) && \ diff --git a/drivers/iommu/intel/debugfs.c b/drivers/iommu/intel/debugfs.c index d927ef10641b..eea8727aa7bc 100644 --- a/drivers/iommu/intel/debugfs.c +++ b/drivers/iommu/intel/debugfs.c @@ -344,19 +344,21 @@ static void pgtable_walk_level(struct seq_file *m, st= ruct dma_pte *pde, =20 static int show_device_domain_translation(struct device *dev, void *data) { - struct device_domain_info *info =3D dev_iommu_priv_get(dev); - struct dmar_domain *domain =3D info->domain; + struct dmar_domain *dmar_domain; + struct iommu_domain *domain; struct seq_file *m =3D data; u64 path[6] =3D { 0 }; =20 + domain =3D iommu_get_domain_for_dev(dev); if (!domain) return 0; =20 + dmar_domain =3D to_dmar_domain(domain); seq_printf(m, "Device %s @0x%llx\n", dev_name(dev), - (u64)virt_to_phys(domain->pgd)); + (u64)virt_to_phys(dmar_domain->pgd)); seq_puts(m, "IOVA_PFN\t\tPML5E\t\t\tPML4E\t\t\tPDPE\t\t\tPDE\t\t\tPTE\n"); =20 - pgtable_walk_level(m, domain->pgd, domain->agaw + 2, 0, path); + pgtable_walk_level(m, dmar_domain->pgd, dmar_domain->agaw + 2, 0, path); seq_putc(m, '\n'); =20 return 0; @@ -364,15 +366,9 @@ static int show_device_domain_translation(struct devic= e *dev, void *data) =20 static int domain_translation_struct_show(struct seq_file *m, void *unused) { - unsigned long flags; - int ret; =20 - spin_lock_irqsave(&device_domain_lock, flags); - ret =3D bus_for_each_dev(&pci_bus_type, NULL, m, - show_device_domain_translation); - spin_unlock_irqrestore(&device_domain_lock, flags); - - return ret; + return bus_for_each_dev(&pci_bus_type, NULL, m, + show_device_domain_translation); } DEFINE_SHOW_ATTRIBUTE(domain_translation_struct); =20 diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 1af4b6562266..cacae8bdaa65 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -314,7 +314,7 @@ static int iommu_skip_te_disable; #define IDENTMAP_GFX 2 #define IDENTMAP_AZALIA 4 =20 -DEFINE_SPINLOCK(device_domain_lock); +static DEFINE_SPINLOCK(device_domain_lock); static LIST_HEAD(device_domain_list); =20 /* --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 032A6C433EF for ; Fri, 27 May 2022 06:34:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343579AbiE0GeV (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044847" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044847" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688412" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:33:58 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 02/12] iommu/vt-d: Remove for_each_device_domain() Date: Fri, 27 May 2022 14:30:09 +0800 Message-Id: <20220527063019.3112905-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The per-device device_domain_info data could be retrieved from the device itself. There's no need to search a global list. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.h | 2 -- drivers/iommu/intel/iommu.c | 25 ------------------------- drivers/iommu/intel/pasid.c | 37 +++++++++++-------------------------- 3 files changed, 11 insertions(+), 53 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 8a6d64d726c0..2f4a5b9509c0 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -727,8 +727,6 @@ extern int dmar_ir_support(void); void *alloc_pgtable_page(int node); void free_pgtable_page(void *vaddr); struct intel_iommu *domain_get_iommu(struct dmar_domain *domain); -int for_each_device_domain(int (*fn)(struct device_domain_info *info, - void *data), void *data); void iommu_flush_write_buffer(struct intel_iommu *iommu); int intel_iommu_enable_pasid(struct intel_iommu *iommu, struct device *dev= ); struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn= ); diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index cacae8bdaa65..6549b09d7f32 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -316,31 +316,6 @@ static int iommu_skip_te_disable; =20 static DEFINE_SPINLOCK(device_domain_lock); static LIST_HEAD(device_domain_list); - -/* - * Iterate over elements in device_domain_list and call the specified - * callback @fn against each element. - */ -int for_each_device_domain(int (*fn)(struct device_domain_info *info, - void *data), void *data) -{ - int ret =3D 0; - unsigned long flags; - struct device_domain_info *info; - - spin_lock_irqsave(&device_domain_lock, flags); - list_for_each_entry(info, &device_domain_list, global) { - ret =3D fn(info, data); - if (ret) { - spin_unlock_irqrestore(&device_domain_lock, flags); - return ret; - } - } - spin_unlock_irqrestore(&device_domain_lock, flags); - - return 0; -} - const struct iommu_ops intel_iommu_ops; =20 static bool translation_pre_enabled(struct intel_iommu *iommu) diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index b2ac5869286f..0627d6465f25 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -103,36 +103,20 @@ device_detach_pasid_table(struct device_domain_info *= info, } =20 struct pasid_table_opaque { - struct pasid_table **pasid_table; - int segment; - int bus; - int devfn; + struct pasid_table *pasid_table; }; =20 -static int search_pasid_table(struct device_domain_info *info, void *opaqu= e) -{ - struct pasid_table_opaque *data =3D opaque; - - if (info->iommu->segment =3D=3D data->segment && - info->bus =3D=3D data->bus && - info->devfn =3D=3D data->devfn && - info->pasid_table) { - *data->pasid_table =3D info->pasid_table; - return 1; - } - - return 0; -} - static int get_alias_pasid_table(struct pci_dev *pdev, u16 alias, void *op= aque) { struct pasid_table_opaque *data =3D opaque; + struct device_domain_info *info; =20 - data->segment =3D pci_domain_nr(pdev->bus); - data->bus =3D PCI_BUS_NUM(alias); - data->devfn =3D alias & 0xff; + info =3D dev_iommu_priv_get(&pdev->dev); + if (!info || !info->pasid_table) + return 0; =20 - return for_each_device_domain(&search_pasid_table, data); + data->pasid_table =3D info->pasid_table; + return 1; } =20 /* @@ -141,9 +125,9 @@ static int get_alias_pasid_table(struct pci_dev *pdev, = u16 alias, void *opaque) */ int intel_pasid_alloc_table(struct device *dev) { + struct pasid_table_opaque data =3D { NULL }; struct device_domain_info *info; struct pasid_table *pasid_table; - struct pasid_table_opaque data; struct page *pages; u32 max_pasid =3D 0; int ret, order; @@ -155,11 +139,12 @@ int intel_pasid_alloc_table(struct device *dev) return -EINVAL; =20 /* DMA alias device already has a pasid table, use it: */ - data.pasid_table =3D &pasid_table; ret =3D pci_for_each_dma_alias(to_pci_dev(dev), &get_alias_pasid_table, &data); - if (ret) + if (ret) { + pasid_table =3D data.pasid_table; goto attach_out; + } =20 pasid_table =3D kzalloc(sizeof(*pasid_table), GFP_KERNEL); if (!pasid_table) --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD94C433EF for ; Fri, 27 May 2022 06:35:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343539AbiE0Gex (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044851" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044851" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688425" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:02 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 03/12] iommu/vt-d: Remove clearing translation data in disable_dmar_iommu() Date: Fri, 27 May 2022 14:30:10 +0800 Message-Id: <20220527063019.3112905-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The disable_dmar_iommu() is called when IOMMU initialzation fails or the IOMMU is hot-removed from the system. In both cases, there is no need to clear the IOMMU translation data structures for devices. On the initialization path, the device probing only happens after the IOMMU is initialized successfully, hence there're no translation data structures. On the hot-remove path, there is no real use case where the IOMMU is hot-removed, but the devices that it manages are still alive in the system. The translation data structures were torn down during device release, hence there's no need to repeat it in IOMMU hot-remove path either. So, let's remove this unnecessary code. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 15 --------------- 1 file changed, 15 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6549b09d7f32..25d4c5200526 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1715,24 +1715,9 @@ static int iommu_init_domains(struct intel_iommu *io= mmu) =20 static void disable_dmar_iommu(struct intel_iommu *iommu) { - struct device_domain_info *info, *tmp; - unsigned long flags; - if (!iommu->domain_ids) return; =20 - spin_lock_irqsave(&device_domain_lock, flags); - list_for_each_entry_safe(info, tmp, &device_domain_list, global) { - if (info->iommu !=3D iommu) - continue; - - if (!info->dev || !info->domain) - continue; - - __dmar_remove_one_dev_info(info); - } - spin_unlock_irqrestore(&device_domain_lock, flags); - if (iommu->gcmd & DMA_GCMD_TE) iommu_disable_translation(iommu); } --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B833CC433EF for ; Fri, 27 May 2022 06:34:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236236AbiE0Gep (ORCPT ); Fri, 27 May 2022 02:34:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343519AbiE0GeS (ORCPT ); Fri, 27 May 2022 02:34:18 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E37465DBC1 for ; Thu, 26 May 2022 23:34:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633248; x=1685169248; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vF3YcioRJVDwsDBVRvKtz+aDKrq2pdrUnoBxeCNvyro=; b=YtEVqM4c4p2+yqf8NwWwqxVQaWZke/3dPDHUQhajvRRg1vIe6hAy/swx bpAXkUcmh/6o9yMGTfbXGtkEjNq9vwACoBfxb9LQ9JSQsiXpRnnttmwJ6 RAsvQIoYfXkFuEMwfW6kY11B0cfSN7ZNB5qS4aEq3pEWSZ46759WMZ3CH VOhP8GnAhGXW6ypIKNqMpymQCCJFZOeObb0iVs3a0nKsaJz/i3llov4av +CtbtSnv+1t5WqtwEK+MlqfVwomafXvwKOHt8QSi5t8/qFqyuLNFgw+TG 0LgBtuBFml8sBBmiU5gyeE7jO0vGkbsjRkR5tG9bFHWQGHwRaZGhKJVKu A==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044857" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044857" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688435" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:05 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 04/12] iommu/vt-d: Use pci_get_domain_bus_and_slot() in pgtable_walk() Date: Fri, 27 May 2022 14:30:11 +0800 Message-Id: <20220527063019.3112905-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use pci_get_domain_bus_and_slot() instead of searching the global list to retrieve the pci device pointer. This removes device_domain_list global list as there are no consumers anymore. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.h | 1 - drivers/iommu/intel/iommu.c | 33 ++++++--------------------------- 2 files changed, 6 insertions(+), 28 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 2f4a5b9509c0..6724703d573b 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -609,7 +609,6 @@ struct intel_iommu { /* PCI domain-device relationship */ struct device_domain_info { struct list_head link; /* link to domain siblings */ - struct list_head global; /* link to global list */ struct list_head table; /* link to pasid table */ u32 segment; /* PCI segment number */ u8 bus; /* PCI bus number */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 25d4c5200526..bbdd3417a1b1 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -131,8 +131,6 @@ static struct intel_iommu **g_iommus; =20 static void __init check_tylersburg_isoch(void); static int rwbf_quirk; -static inline struct device_domain_info * -dmar_search_domain_by_dev_info(int segment, int bus, int devfn); =20 /* * set to 1 to panic kernel if can't successfully enable VT-d @@ -315,7 +313,6 @@ static int iommu_skip_te_disable; #define IDENTMAP_AZALIA 4 =20 static DEFINE_SPINLOCK(device_domain_lock); -static LIST_HEAD(device_domain_list); const struct iommu_ops intel_iommu_ops; =20 static bool translation_pre_enabled(struct intel_iommu *iommu) @@ -845,9 +842,14 @@ static void pgtable_walk(struct intel_iommu *iommu, un= signed long pfn, u8 bus, u struct device_domain_info *info; struct dma_pte *parent, *pte; struct dmar_domain *domain; + struct pci_dev *pdev; int offset, level; =20 - info =3D dmar_search_domain_by_dev_info(iommu->segment, bus, devfn); + pdev =3D pci_get_domain_bus_and_slot(iommu->segment, bus, devfn); + if (!pdev) + return; + + info =3D dev_iommu_priv_get(&pdev->dev); if (!info || !info->domain) { pr_info("device [%02x:%02x.%d] not probed\n", bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); @@ -2348,19 +2350,6 @@ static void domain_remove_dev_info(struct dmar_domai= n *domain) spin_unlock_irqrestore(&device_domain_lock, flags); } =20 -static inline struct device_domain_info * -dmar_search_domain_by_dev_info(int segment, int bus, int devfn) -{ - struct device_domain_info *info; - - list_for_each_entry(info, &device_domain_list, global) - if (info->segment =3D=3D segment && info->bus =3D=3D bus && - info->devfn =3D=3D devfn) - return info; - - return NULL; -} - static int domain_setup_first_level(struct intel_iommu *iommu, struct dmar_domain *domain, struct device *dev, @@ -4564,7 +4553,6 @@ static struct iommu_device *intel_iommu_probe_device(= struct device *dev) struct pci_dev *pdev =3D dev_is_pci(dev) ? to_pci_dev(dev) : NULL; struct device_domain_info *info; struct intel_iommu *iommu; - unsigned long flags; u8 bus, devfn; =20 iommu =3D device_to_iommu(dev, &bus, &devfn); @@ -4607,10 +4595,7 @@ static struct iommu_device *intel_iommu_probe_device= (struct device *dev) } } =20 - spin_lock_irqsave(&device_domain_lock, flags); - list_add(&info->global, &device_domain_list); dev_iommu_priv_set(dev, info); - spin_unlock_irqrestore(&device_domain_lock, flags); =20 return &iommu->iommu; } @@ -4618,15 +4603,9 @@ static struct iommu_device *intel_iommu_probe_device= (struct device *dev) static void intel_iommu_release_device(struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); - unsigned long flags; =20 dmar_remove_one_dev_info(dev); - - spin_lock_irqsave(&device_domain_lock, flags); dev_iommu_priv_set(dev, NULL); - list_del(&info->global); - spin_unlock_irqrestore(&device_domain_lock, flags); - kfree(info); set_dma_ops(dev, NULL); } --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 579FDC433F5 for ; Fri, 27 May 2022 06:34:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245697AbiE0GeZ (ORCPT ); Fri, 27 May 2022 02:34:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245561AbiE0GeS (ORCPT ); Fri, 27 May 2022 02:34:18 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBD0E5E14C for ; Thu, 26 May 2022 23:34:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633251; x=1685169251; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e6QO4/f2d5ksEADm5yEq5XT7V7SUplsTUbaoXwowz1g=; b=NudlK8gZTCqX6qKcG/FZjDyUEWOZzp9qGO1kYOYsmR54DEVy3QjUrQyM LEbvK7Hqng4fEMziMKW80Hneo/xDnS5yNtgxgz9IbbR/Wm5eC3YgFfqwL KzDniVj76ABNuiB/ZC2SQmLwXvlB2megRvRaP1HHjlqAaNDpvzyMgaAi4 6MmPaisWrxykNlwgfmKyoR0gcO31VJGYJjTknrNHje779FVwdPlmwcnYR 1wlNEh4FxeY8r07IF87QU3DAMWpgxz5megsjM3Je5z+qQOt2sZ++KL4yl BZi5KzojCrWkvwj55zW3DcelhBkQVAoQajbnr2pQekBHZpGBWzfGVsCGo g==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044869" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044869" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688453" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:08 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 05/12] iommu/vt-d: Unncessary spinlock for root table alloc and free Date: Fri, 27 May 2022 14:30:12 +0800 Message-Id: <20220527063019.3112905-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The IOMMU root table is allocated and freed in the IOMMU initialization code in static boot or hot-plug paths. There's no need for a spinlock. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian --- drivers/iommu/intel/iommu.c | 18 +++++------------- 1 file changed, 5 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index bbdd3417a1b1..2d5f02b85de8 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -809,14 +809,12 @@ static int device_context_mapped(struct intel_iommu *= iommu, u8 bus, u8 devfn) =20 static void free_context_table(struct intel_iommu *iommu) { - int i; - unsigned long flags; struct context_entry *context; + int i; + + if (!iommu->root_entry) + return; =20 - spin_lock_irqsave(&iommu->lock, flags); - if (!iommu->root_entry) { - goto out; - } for (i =3D 0; i < ROOT_ENTRY_NR; i++) { context =3D iommu_context_addr(iommu, i, 0, 0); if (context) @@ -828,12 +826,10 @@ static void free_context_table(struct intel_iommu *io= mmu) context =3D iommu_context_addr(iommu, i, 0x80, 0); if (context) free_pgtable_page(context); - } + free_pgtable_page(iommu->root_entry); iommu->root_entry =3D NULL; -out: - spin_unlock_irqrestore(&iommu->lock, flags); } =20 #ifdef CONFIG_DMAR_DEBUG @@ -1232,7 +1228,6 @@ static void domain_unmap(struct dmar_domain *domain, = unsigned long start_pfn, static int iommu_alloc_root_entry(struct intel_iommu *iommu) { struct root_entry *root; - unsigned long flags; =20 root =3D (struct root_entry *)alloc_pgtable_page(iommu->node); if (!root) { @@ -1242,10 +1237,7 @@ static int iommu_alloc_root_entry(struct intel_iommu= *iommu) } =20 __iommu_flush_cache(iommu, root, ROOT_SIZE); - - spin_lock_irqsave(&iommu->lock, flags); iommu->root_entry =3D root; - spin_unlock_irqrestore(&iommu->lock, flags); =20 return 0; } --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9809C433EF for ; Fri, 27 May 2022 06:34:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343612AbiE0Gek (ORCPT ); Fri, 27 May 2022 02:34:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343504AbiE0GeT (ORCPT ); Fri, 27 May 2022 02:34:19 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 069B7ED791 for ; Thu, 26 May 2022 23:34:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633257; x=1685169257; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9f5hL9z5d19jdu/plR8UsfSukdVmRN5xbUanYDDkUoY=; b=BZgdbsN6T3ceyW2k9jmAgO60kV0hx8gOXJcby4YuwJNxyYiWd+1KL/n2 aqMMx5vtz0hMjifgSa/RFgUOCqTwrnLZhT0eE3qsKYtRIR/h8O7esjmWG v0hEqTmFCw6qHpDUo1j6MWak3/qHLfoNLkodAHs+OflIlAcRoxgIB7/1e sPcd3k960lPHtnXFj9SaBouowoVRPXYGfCjH9XViq9Wm0yDIFjPQR+1KG vPqvjNBoP+glqTkdTvzInR2Ml48LlVlyBAljQKHekTupyGrHuud8sAXgn buMkULkCBU7fkIC34ve9wMw3+Xrq8hGQoQd+uuxdCceAodailc+c1N7DY w==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044884" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044884" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688485" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:11 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 06/12] iommu/vt-d: Acquiring lock in domain ID allocation helpers Date: Fri, 27 May 2022 14:30:13 +0800 Message-Id: <20220527063019.3112905-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The iommu->lock is used to protect the per-IOMMU domain ID resource. Move the spinlock acquisition/release into the helpers where domain IDs are allocated and freed. The device_domain_lock is irrelevant to domain ID resources, remove its assertion as well. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 2d5f02b85de8..0da937ce0534 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -1774,16 +1774,13 @@ static struct dmar_domain *alloc_domain(unsigned in= t type) return domain; } =20 -/* Must be called with iommu->lock */ static int domain_attach_iommu(struct dmar_domain *domain, struct intel_iommu *iommu) { unsigned long ndomains; - int num; - - assert_spin_locked(&device_domain_lock); - assert_spin_locked(&iommu->lock); + int num, ret =3D 0; =20 + spin_lock(&iommu->lock); domain->iommu_refcnt[iommu->seq_id] +=3D 1; if (domain->iommu_refcnt[iommu->seq_id] =3D=3D 1) { ndomains =3D cap_ndoms(iommu->cap); @@ -1792,7 +1789,8 @@ static int domain_attach_iommu(struct dmar_domain *do= main, if (num >=3D ndomains) { pr_err("%s: No free domain ids\n", iommu->name); domain->iommu_refcnt[iommu->seq_id] -=3D 1; - return -ENOSPC; + ret =3D -ENOSPC; + goto out_unlock; } =20 set_bit(num, iommu->domain_ids); @@ -1801,7 +1799,9 @@ static int domain_attach_iommu(struct dmar_domain *do= main, domain_update_iommu_cap(domain); } =20 - return 0; +out_unlock: + spin_unlock(&iommu->lock); + return ret; } =20 static void domain_detach_iommu(struct dmar_domain *domain, @@ -1809,9 +1809,7 @@ static void domain_detach_iommu(struct dmar_domain *d= omain, { int num; =20 - assert_spin_locked(&device_domain_lock); - assert_spin_locked(&iommu->lock); - + spin_lock(&iommu->lock); domain->iommu_refcnt[iommu->seq_id] -=3D 1; if (domain->iommu_refcnt[iommu->seq_id] =3D=3D 0) { num =3D domain->iommu_did[iommu->seq_id]; @@ -1819,6 +1817,7 @@ static void domain_detach_iommu(struct dmar_domain *d= omain, domain_update_iommu_cap(domain); domain->iommu_did[iommu->seq_id] =3D 0; } + spin_unlock(&iommu->lock); } =20 static inline int guestwidth_to_adjustwidth(int gaw) @@ -2471,9 +2470,7 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) =20 spin_lock_irqsave(&device_domain_lock, flags); info->domain =3D domain; - spin_lock(&iommu->lock); ret =3D domain_attach_iommu(domain, iommu); - spin_unlock(&iommu->lock); if (ret) { spin_unlock_irqrestore(&device_domain_lock, flags); return ret; @@ -4158,7 +4155,6 @@ static void __dmar_remove_one_dev_info(struct device_= domain_info *info) { struct dmar_domain *domain; struct intel_iommu *iommu; - unsigned long flags; =20 assert_spin_locked(&device_domain_lock); =20 @@ -4179,10 +4175,7 @@ static void __dmar_remove_one_dev_info(struct device= _domain_info *info) } =20 list_del(&info->link); - - spin_lock_irqsave(&iommu->lock, flags); domain_detach_iommu(domain, iommu); - spin_unlock_irqrestore(&iommu->lock, flags); } =20 static void dmar_remove_one_dev_info(struct device *dev) --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 036C2C433EF for ; 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X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044903" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044903" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688641" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:15 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 07/12] iommu/vt-d: Acquiring lock in pasid manipulation helpers Date: Fri, 27 May 2022 14:30:14 +0800 Message-Id: <20220527063019.3112905-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The iommu->lock is used to protect the per-IOMMU pasid directory table and pasid table. Move the spinlock acquisition/release into the helpers to make the code self-contained. Signed-off-by: Lu Baolu Reviewed-by: Kevin Tian , with one nit --- drivers/iommu/intel/iommu.c | 2 - drivers/iommu/intel/pasid.c | 106 +++++++++++++++++++----------------- drivers/iommu/intel/svm.c | 5 +- 3 files changed, 56 insertions(+), 57 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 0da937ce0534..ccf3c7fa26f1 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -2488,7 +2488,6 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) } =20 /* Setup the PASID entry for requests without PASID: */ - spin_lock_irqsave(&iommu->lock, flags); if (hw_pass_through && domain_type_is_si(domain)) ret =3D intel_pasid_setup_pass_through(iommu, domain, dev, PASID_RID2PASID); @@ -2498,7 +2497,6 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) else ret =3D intel_pasid_setup_second_level(iommu, domain, dev, PASID_RID2PASID); - spin_unlock_irqrestore(&iommu->lock, flags); if (ret) { dev_err(dev, "Setup RID2PASID failed\n"); dmar_remove_one_dev_info(dev); diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c index 0627d6465f25..bab5c385fa1e 100644 --- a/drivers/iommu/intel/pasid.c +++ b/drivers/iommu/intel/pasid.c @@ -498,17 +498,17 @@ void intel_pasid_tear_down_entry(struct intel_iommu *= iommu, struct device *dev, struct pasid_entry *pte; u16 did, pgtt; =20 + spin_lock(&iommu->lock); pte =3D intel_pasid_get_entry(dev, pasid); - if (WARN_ON(!pte)) - return; - - if (!pasid_pte_is_present(pte)) + if (WARN_ON(!pte) || !pasid_pte_is_present(pte)) { + spin_unlock(&iommu->lock); return; + } =20 did =3D pasid_get_domain_id(pte); pgtt =3D pasid_pte_get_pgtt(pte); - intel_pasid_clear_entry(dev, pasid, fault_ignore); + spin_unlock(&iommu->lock); =20 if (!ecap_coherent(iommu->ecap)) clflush_cache_range(pte, sizeof(*pte)); @@ -544,21 +544,17 @@ static void pasid_flush_caches(struct intel_iommu *io= mmu, } } =20 -static inline int pasid_enable_wpe(struct pasid_entry *pte) +static struct pasid_entry *get_non_present_pasid_entry(struct device *dev, + u32 pasid) { -#ifdef CONFIG_X86 - unsigned long cr0 =3D read_cr0(); + struct pasid_entry *pte; =20 - /* CR0.WP is normally set but just to be sure */ - if (unlikely(!(cr0 & X86_CR0_WP))) { - pr_err_ratelimited("No CPU write protect!\n"); - return -EINVAL; - } -#endif - pasid_set_wpe(pte); + pte =3D intel_pasid_get_entry(dev, pasid); + if (!pte || pasid_pte_is_present(pte)) + return NULL; =20 - return 0; -}; + return pte; +} =20 /* * Set up the scalable mode pasid table entry for first only @@ -576,39 +572,47 @@ int intel_pasid_setup_first_level(struct intel_iommu = *iommu, return -EINVAL; } =20 - pte =3D intel_pasid_get_entry(dev, pasid); - if (WARN_ON(!pte)) + if ((flags & PASID_FLAG_SUPERVISOR_MODE)) { +#ifdef CONFIG_X86 + unsigned long cr0 =3D read_cr0(); + + /* CR0.WP is normally set but just to be sure */ + if (unlikely(!(cr0 & X86_CR0_WP))) { + pr_err("No CPU write protect!\n"); + return -EINVAL; + } +#endif + if (!ecap_srs(iommu->ecap)) { + pr_err("No supervisor request support on %s\n", + iommu->name); + return -EINVAL; + } + } + + if ((flags & PASID_FLAG_FL5LP) && !cap_5lp_support(iommu->cap)) { + pr_err("No 5-level paging support for first-level on %s\n", + iommu->name); return -EINVAL; + } =20 - /* Caller must ensure PASID entry is not in use. */ - if (pasid_pte_is_present(pte)) - return -EBUSY; + spin_lock(&iommu->lock); + pte =3D get_non_present_pasid_entry(dev, pasid); + if (!pte) { + spin_unlock(&iommu->lock); + return -ENODEV; + } =20 pasid_clear_entry(pte); =20 /* Setup the first level page table pointer: */ pasid_set_flptr(pte, (u64)__pa(pgd)); if (flags & PASID_FLAG_SUPERVISOR_MODE) { - if (!ecap_srs(iommu->ecap)) { - pr_err("No supervisor request support on %s\n", - iommu->name); - return -EINVAL; - } pasid_set_sre(pte); - if (pasid_enable_wpe(pte)) - return -EINVAL; - + pasid_set_wpe(pte); } =20 - if (flags & PASID_FLAG_FL5LP) { - if (cap_5lp_support(iommu->cap)) { - pasid_set_flpm(pte, 1); - } else { - pr_err("No 5-level paging support for first-level\n"); - pasid_clear_entry(pte); - return -EINVAL; - } - } + if (flags & PASID_FLAG_FL5LP) + pasid_set_flpm(pte, 1); =20 if (flags & PASID_FLAG_PAGE_SNOOP) pasid_set_pgsnp(pte); @@ -620,6 +624,8 @@ int intel_pasid_setup_first_level(struct intel_iommu *i= ommu, /* Setup Present and PASID Granular Transfer Type: */ pasid_set_translation_type(pte, PASID_ENTRY_PGTT_FL_ONLY); pasid_set_present(pte); + spin_unlock(&iommu->lock); + pasid_flush_caches(iommu, pte, pasid, did); =20 return 0; @@ -677,16 +683,13 @@ int intel_pasid_setup_second_level(struct intel_iommu= *iommu, pgd_val =3D virt_to_phys(pgd); did =3D domain->iommu_did[iommu->seq_id]; =20 - pte =3D intel_pasid_get_entry(dev, pasid); + spin_lock(&iommu->lock); + pte =3D get_non_present_pasid_entry(dev, pasid); if (!pte) { - dev_err(dev, "Failed to get pasid entry of PASID %d\n", pasid); + spin_unlock(&iommu->lock); return -ENODEV; } =20 - /* Caller must ensure PASID entry is not in use. */ - if (pasid_pte_is_present(pte)) - return -EBUSY; - pasid_clear_entry(pte); pasid_set_domain_id(pte, did); pasid_set_slptr(pte, pgd_val); @@ -702,6 +705,8 @@ int intel_pasid_setup_second_level(struct intel_iommu *= iommu, if (pasid !=3D PASID_RID2PASID) pasid_set_sre(pte); pasid_set_present(pte); + spin_unlock(&iommu->lock); + pasid_flush_caches(iommu, pte, pasid, did); =20 return 0; @@ -717,16 +722,13 @@ int intel_pasid_setup_pass_through(struct intel_iommu= *iommu, u16 did =3D FLPT_DEFAULT_DID; struct pasid_entry *pte; =20 - pte =3D intel_pasid_get_entry(dev, pasid); + spin_lock(&iommu->lock); + pte =3D get_non_present_pasid_entry(dev, pasid); if (!pte) { - dev_err(dev, "Failed to get pasid entry of PASID %d\n", pasid); + spin_unlock(&iommu->lock); return -ENODEV; } =20 - /* Caller must ensure PASID entry is not in use. */ - if (pasid_pte_is_present(pte)) - return -EBUSY; - pasid_clear_entry(pte); pasid_set_domain_id(pte, did); pasid_set_address_width(pte, iommu->agaw); @@ -740,6 +742,8 @@ int intel_pasid_setup_pass_through(struct intel_iommu *= iommu, */ pasid_set_sre(pte); pasid_set_present(pte); + spin_unlock(&iommu->lock); + pasid_flush_caches(iommu, pte, pasid, did); =20 return 0; diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 580713aa9e07..64072e628bbd 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -328,9 +328,9 @@ static struct iommu_sva *intel_svm_bind_mm(struct intel= _iommu *iommu, unsigned int flags) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); - unsigned long iflags, sflags; struct intel_svm_dev *sdev; struct intel_svm *svm; + unsigned long sflags; int ret =3D 0; =20 svm =3D pasid_private_find(mm->pasid); @@ -394,11 +394,8 @@ static struct iommu_sva *intel_svm_bind_mm(struct inte= l_iommu *iommu, sflags =3D (flags & SVM_FLAG_SUPERVISOR_MODE) ? PASID_FLAG_SUPERVISOR_MODE : 0; sflags |=3D cpu_feature_enabled(X86_FEATURE_LA57) ? PASID_FLAG_FL5LP : 0; - spin_lock_irqsave(&iommu->lock, iflags); ret =3D intel_pasid_setup_first_level(iommu, dev, mm->pgd, mm->pasid, FLPT_DEFAULT_DID, sflags); - spin_unlock_irqrestore(&iommu->lock, iflags); - if (ret) goto free_sdev; =20 --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6AAFC433F5 for ; Fri, 27 May 2022 06:34:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343718AbiE0Gen (ORCPT ); Fri, 27 May 2022 02:34:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37090 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343593AbiE0GeW (ORCPT ); Fri, 27 May 2022 02:34:22 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAC045FF14 for ; Thu, 26 May 2022 23:34:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633261; x=1685169261; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=6noG+HsWwgZ3hsLbFVG+gjOIvdtpwhZqbvCacXrgpNY=; b=Y2v0r4Z+1HeZlCvGOq98siTyTRwb8uQ2tTimqq33dDAu0niEM12OaUBw 70qy4FI0bnDgEg+xLJC7VdialVWn9kFJAMet6LJSVSGWz3FVCMKMux0tH qLU3PHiQpc65lm7MuqDRjSmhZmoMKhERlaojDE5MWKVxqxMokeXbmG7dR 6bmeyzD3vzMEz6cIAMgYfMyoAOPGMNLA0vf6xz+jZtqm2jRHY9T0uBsRK lPBpbwmNKjYfCQkNX/KhZ6CCSFIjhV7CulQamtHvULz7Nt+OBV0+VuFQy DEcID0v/MU4XaXf8KJSQxddW4UrfWrQSEPElsMFrexdQsNp4GIXw3ezxD w==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044913" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044913" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688675" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:18 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 08/12] iommu/vt-d: Replace spin_lock_irqsave() with spin_lock() Date: Fri, 27 May 2022 14:30:15 +0800 Message-Id: <20220527063019.3112905-9-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The iommu->lock is used to protect changes in root/context/pasid tables and domain ID allocation. There's no use case to change these resources in any interrupt context. Hence there's no need to disable interrupts when helding the spinlock. Signed-off-by: Lu Baolu --- drivers/iommu/intel/debugfs.c | 6 ++---- drivers/iommu/intel/iommu.c | 17 +++++++---------- 2 files changed, 9 insertions(+), 14 deletions(-) diff --git a/drivers/iommu/intel/debugfs.c b/drivers/iommu/intel/debugfs.c index eea8727aa7bc..ca1adceeba19 100644 --- a/drivers/iommu/intel/debugfs.c +++ b/drivers/iommu/intel/debugfs.c @@ -263,10 +263,9 @@ static void ctx_tbl_walk(struct seq_file *m, struct in= tel_iommu *iommu, u16 bus) =20 static void root_tbl_walk(struct seq_file *m, struct intel_iommu *iommu) { - unsigned long flags; u16 bus; =20 - spin_lock_irqsave(&iommu->lock, flags); + spin_lock(&iommu->lock); seq_printf(m, "IOMMU %s: Root Table Address: 0x%llx\n", iommu->name, (u64)virt_to_phys(iommu->root_entry)); seq_puts(m, "B.D.F\tRoot_entry\t\t\t\tContext_entry\t\t\t\tPASID\tPASID_t= able_entry\n"); @@ -278,8 +277,7 @@ static void root_tbl_walk(struct seq_file *m, struct in= tel_iommu *iommu) */ for (bus =3D 0; bus < 256; bus++) ctx_tbl_walk(m, iommu, bus); - - spin_unlock_irqrestore(&iommu->lock, flags); + spin_unlock(&iommu->lock); } =20 static int dmar_translation_struct_show(struct seq_file *m, void *unused) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index ccf3c7fa26f1..2e195a639502 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -797,13 +797,12 @@ static int device_context_mapped(struct intel_iommu *= iommu, u8 bus, u8 devfn) { struct context_entry *context; int ret =3D 0; - unsigned long flags; =20 - spin_lock_irqsave(&iommu->lock, flags); + spin_lock(&iommu->lock); context =3D iommu_context_addr(iommu, bus, devfn, 0); if (context) ret =3D context_present(context); - spin_unlock_irqrestore(&iommu->lock, flags); + spin_unlock(&iommu->lock); return ret; } =20 @@ -2287,16 +2286,15 @@ static void domain_context_clear_one(struct device_= domain_info *info, u8 bus, u8 { struct intel_iommu *iommu =3D info->iommu; struct context_entry *context; - unsigned long flags; u16 did_old; =20 if (!iommu) return; =20 - spin_lock_irqsave(&iommu->lock, flags); + spin_lock(&iommu->lock); context =3D iommu_context_addr(iommu, bus, devfn, 0); if (!context) { - spin_unlock_irqrestore(&iommu->lock, flags); + spin_unlock(&iommu->lock); return; } =20 @@ -2311,7 +2309,7 @@ static void domain_context_clear_one(struct device_do= main_info *info, u8 bus, u8 =20 context_clear_entry(context); __iommu_flush_cache(iommu, context, sizeof(*context)); - spin_unlock_irqrestore(&iommu->lock, flags); + spin_unlock(&iommu->lock); iommu->flush.flush_context(iommu, did_old, (((u16)bus) << 8) | devfn, @@ -2764,7 +2762,6 @@ static int copy_translation_tables(struct intel_iommu= *iommu) struct root_entry *old_rt; phys_addr_t old_rt_phys; int ctxt_table_entries; - unsigned long flags; u64 rtaddr_reg; int bus, ret; bool new_ext, ext; @@ -2807,7 +2804,7 @@ static int copy_translation_tables(struct intel_iommu= *iommu) } } =20 - spin_lock_irqsave(&iommu->lock, flags); + spin_lock(&iommu->lock); =20 /* Context tables are copied, now write them to the root_entry table */ for (bus =3D 0; bus < 256; bus++) { @@ -2826,7 +2823,7 @@ static int copy_translation_tables(struct intel_iommu= *iommu) iommu->root_entry[bus].hi =3D val; } =20 - spin_unlock_irqrestore(&iommu->lock, flags); + spin_unlock(&iommu->lock); =20 kfree(ctxt_tbls); =20 --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFA1CC433F5 for ; Fri, 27 May 2022 06:35:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344678AbiE0Ge5 (ORCPT ); Fri, 27 May 2022 02:34:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245730AbiE0GeZ (ORCPT ); Fri, 27 May 2022 02:34:25 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F01365FF38 for ; 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d="scan'208";a="718688729" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:21 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 09/12] iommu/vt-d: Check device list of domain in domain free path Date: Fri, 27 May 2022 14:30:16 +0800 Message-Id: <20220527063019.3112905-10-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When the IOMMU domain is about to be freed, it should not be set on any device. Instead of silently dealing with some bug cases, it's better to trigger a warning to report and fix any potential bugs at the first time. Signed-off-by: Lu Baolu Reviewed-by: Jason Gunthorpe --- drivers/iommu/intel/iommu.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 2e195a639502..6f3119c68cd2 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -294,7 +294,6 @@ static LIST_HEAD(dmar_satc_units); /* bitmap for indexing intel_iommus */ static int g_num_of_iommus; =20 -static void domain_remove_dev_info(struct dmar_domain *domain); static void dmar_remove_one_dev_info(struct device *dev); static void __dmar_remove_one_dev_info(struct device_domain_info *info); =20 @@ -1835,9 +1834,8 @@ static inline int guestwidth_to_adjustwidth(int gaw) =20 static void domain_exit(struct dmar_domain *domain) { - - /* Remove associated devices and clear attached or cached domains */ - domain_remove_dev_info(domain); + if (WARN_ON(!list_empty(&domain->devices))) + return; =20 if (domain->pgd) { LIST_HEAD(freelist); @@ -2328,17 +2326,6 @@ static void domain_context_clear_one(struct device_d= omain_info *info, u8 bus, u8 __iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH); } =20 -static void domain_remove_dev_info(struct dmar_domain *domain) -{ - struct device_domain_info *info, *tmp; - unsigned long flags; - - spin_lock_irqsave(&device_domain_lock, flags); - list_for_each_entry_safe(info, tmp, &domain->devices, link) - __dmar_remove_one_dev_info(info); - spin_unlock_irqrestore(&device_domain_lock, flags); -} - static int domain_setup_first_level(struct intel_iommu *iommu, struct dmar_domain *domain, struct device *dev, --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39820C433EF for ; Fri, 27 May 2022 06:35:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343666AbiE0GfT (ORCPT ); Fri, 27 May 2022 02:35:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37270 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245757AbiE0Ge3 (ORCPT ); Fri, 27 May 2022 02:34:29 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5149F5DE78 for ; Thu, 26 May 2022 23:34:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653633268; x=1685169268; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GXkVdGV21h6YoEr6KbCeCrkJohsaI0ajhb6vA1EQLzI=; b=VjQG7sZAhw5fa0sMpKLkv+hK5LL/61DoNbNqswRhlxnYg2NjceF4N2d8 HJ9WMqHMwe6paczTPr/yehpw3hSySI9n/4DXMXvKZSjgVjRCyVzVBkYGh EMpy8J2w9gwsXkZE4ybrI2lvvYNyFnHwguKlAtvAEzhjbHW/YD55d3n4Z m/PR9aPnpxsuLrlaVPbGnlU5PYjwYo8N9QeKL5rv0vC+i1ROKDcuDWYzL TubCXFz3b9Gx+JjLEitQ4TfSmeBzCXe3YxU8klXV+em6zYtSH++btv9Vw yzi3RDVdfAokDm+B2IZfUrRBk5IPA1tDGfYlL4/RH4mao7JdzIaSuJMhk g==; X-IronPort-AV: E=McAfee;i="6400,9594,10359"; a="335044927" X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="335044927" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2022 23:34:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718688874" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:25 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 10/12] iommu/vt-d: Fold __dmar_remove_one_dev_info() into its caller Date: Fri, 27 May 2022 14:30:17 +0800 Message-Id: <20220527063019.3112905-11-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fold __dmar_remove_one_dev_info() into dmar_remove_one_dev_info() which is its only caller. Make the spin lock critical range only cover the device list change code and remove some unnecessary checks. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 34 +++++++++------------------------- 1 file changed, 9 insertions(+), 25 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6f3119c68cd2..d02ddd338afd 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -295,7 +295,6 @@ static LIST_HEAD(dmar_satc_units); static int g_num_of_iommus; =20 static void dmar_remove_one_dev_info(struct device *dev); -static void __dmar_remove_one_dev_info(struct device_domain_info *info); =20 int dmar_disabled =3D !IS_ENABLED(CONFIG_INTEL_IOMMU_DEFAULT_ON); int intel_iommu_sm =3D IS_ENABLED(CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT= _ON); @@ -4133,20 +4132,14 @@ static void domain_context_clear(struct device_doma= in_info *info) &domain_context_clear_one_cb, info); } =20 -static void __dmar_remove_one_dev_info(struct device_domain_info *info) +static void dmar_remove_one_dev_info(struct device *dev) { - struct dmar_domain *domain; - struct intel_iommu *iommu; - - assert_spin_locked(&device_domain_lock); - - if (WARN_ON(!info)) - return; - - iommu =3D info->iommu; - domain =3D info->domain; + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct dmar_domain *domain =3D info->domain; + struct intel_iommu *iommu =3D info->iommu; + unsigned long flags; =20 - if (info->dev && !dev_is_real_dma_subdevice(info->dev)) { + if (!dev_is_real_dma_subdevice(info->dev)) { if (dev_is_pci(info->dev) && sm_supported(iommu)) intel_pasid_tear_down_entry(iommu, info->dev, PASID_RID2PASID, false); @@ -4156,20 +4149,11 @@ static void __dmar_remove_one_dev_info(struct devic= e_domain_info *info) intel_pasid_free_table(info->dev); } =20 - list_del(&info->link); - domain_detach_iommu(domain, iommu); -} - -static void dmar_remove_one_dev_info(struct device *dev) -{ - struct device_domain_info *info; - unsigned long flags; - spin_lock_irqsave(&device_domain_lock, flags); - info =3D dev_iommu_priv_get(dev); - if (info) - __dmar_remove_one_dev_info(info); + list_del(&info->link); spin_unlock_irqrestore(&device_domain_lock, flags); + + domain_detach_iommu(domain, iommu); } =20 static int md_domain_init(struct dmar_domain *domain, int guest_width) --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECB15C433F5 for ; Fri, 27 May 2022 06:35:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343847AbiE0Gfc (ORCPT ); Fri, 27 May 2022 02:35:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343919AbiE0Geq (ORCPT ); Fri, 27 May 2022 02:34:46 -0400 Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E70F7ED7BD for ; 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d="scan'208";a="718689038" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:28 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 11/12] iommu/vt-d: Use device_domain_lock accurately Date: Fri, 27 May 2022 14:30:18 +0800 Message-Id: <20220527063019.3112905-12-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The device_domain_lock is used to protect the device tracking list of a domain. Remove unnecessary spin_lock/unlock()'s and move the necessary ones around the list access. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.c | 68 +++++++++++++++---------------------- 1 file changed, 27 insertions(+), 41 deletions(-) diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d02ddd338afd..f8aa8649dc6f 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -534,16 +534,10 @@ static int domain_update_device_node(struct dmar_doma= in *domain) { struct device_domain_info *info; int nid =3D NUMA_NO_NODE; + unsigned long flags; =20 - assert_spin_locked(&device_domain_lock); - - if (list_empty(&domain->devices)) - return NUMA_NO_NODE; - + spin_lock_irqsave(&device_domain_lock, flags); list_for_each_entry(info, &domain->devices, link) { - if (!info->dev) - continue; - /* * There could possibly be multiple device numa nodes as devices * within the same domain may sit behind different IOMMUs. There @@ -554,6 +548,7 @@ static int domain_update_device_node(struct dmar_domain= *domain) if (nid !=3D NUMA_NO_NODE) break; } + spin_unlock_irqrestore(&device_domain_lock, flags); =20 return nid; } @@ -1376,49 +1371,50 @@ static void __iommu_flush_iotlb(struct intel_iommu = *iommu, u16 did, } =20 static struct device_domain_info * -iommu_support_dev_iotlb (struct dmar_domain *domain, struct intel_iommu *i= ommu, - u8 bus, u8 devfn) +iommu_support_dev_iotlb(struct dmar_domain *domain, struct intel_iommu *io= mmu, + u8 bus, u8 devfn) { - struct device_domain_info *info; - - assert_spin_locked(&device_domain_lock); + struct device_domain_info *info =3D NULL, *tmp; + unsigned long flags; =20 if (!iommu->qi) return NULL; =20 - list_for_each_entry(info, &domain->devices, link) - if (info->iommu =3D=3D iommu && info->bus =3D=3D bus && - info->devfn =3D=3D devfn) { - if (info->ats_supported && info->dev) - return info; + spin_lock_irqsave(&device_domain_lock, flags); + list_for_each_entry(tmp, &domain->devices, link) { + if (tmp->iommu =3D=3D iommu && tmp->bus =3D=3D bus && + tmp->devfn =3D=3D devfn) { + if (tmp->ats_supported) + info =3D tmp; break; } + } + spin_unlock_irqrestore(&device_domain_lock, flags); =20 - return NULL; + return info; } =20 static void domain_update_iotlb(struct dmar_domain *domain) { struct device_domain_info *info; bool has_iotlb_device =3D false; + unsigned long flags; =20 - assert_spin_locked(&device_domain_lock); - - list_for_each_entry(info, &domain->devices, link) + spin_lock_irqsave(&device_domain_lock, flags); + list_for_each_entry(info, &domain->devices, link) { if (info->ats_enabled) { has_iotlb_device =3D true; break; } - + } domain->has_iotlb_device =3D has_iotlb_device; + spin_unlock_irqrestore(&device_domain_lock, flags); } =20 static void iommu_enable_dev_iotlb(struct device_domain_info *info) { struct pci_dev *pdev; =20 - assert_spin_locked(&device_domain_lock); - if (!info || !dev_is_pci(info->dev)) return; =20 @@ -1464,8 +1460,6 @@ static void iommu_disable_dev_iotlb(struct device_dom= ain_info *info) { struct pci_dev *pdev; =20 - assert_spin_locked(&device_domain_lock); - if (!dev_is_pci(info->dev)) return; =20 @@ -1900,11 +1894,11 @@ static int domain_context_mapping_one(struct dmar_d= omain *domain, struct pasid_table *table, u8 bus, u8 devfn) { + struct device_domain_info *info =3D + iommu_support_dev_iotlb(domain, iommu, bus, devfn); u16 did =3D domain->iommu_did[iommu->seq_id]; int translation =3D CONTEXT_TT_MULTI_LEVEL; - struct device_domain_info *info =3D NULL; struct context_entry *context; - unsigned long flags; int ret; =20 WARN_ON(did =3D=3D 0); @@ -1917,7 +1911,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, =20 BUG_ON(!domain->pgd); =20 - spin_lock_irqsave(&device_domain_lock, flags); spin_lock(&iommu->lock); =20 ret =3D -ENOMEM; @@ -1970,7 +1963,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, * Setup the Device-TLB enable bit and Page request * Enable bit: */ - info =3D iommu_support_dev_iotlb(domain, iommu, bus, devfn); if (info && info->ats_supported) context_set_sm_dte(context); if (info && info->pri_supported) @@ -1993,7 +1985,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, goto out_unlock; } =20 - info =3D iommu_support_dev_iotlb(domain, iommu, bus, devfn); if (info && info->ats_supported) translation =3D CONTEXT_TT_DEV_IOTLB; else @@ -2039,7 +2030,6 @@ static int domain_context_mapping_one(struct dmar_dom= ain *domain, =20 out_unlock: spin_unlock(&iommu->lock); - spin_unlock_irqrestore(&device_domain_lock, flags); =20 return ret; } @@ -2452,15 +2442,14 @@ static int domain_add_dev_info(struct dmar_domain *= domain, struct device *dev) if (!iommu) return -ENODEV; =20 - spin_lock_irqsave(&device_domain_lock, flags); - info->domain =3D domain; ret =3D domain_attach_iommu(domain, iommu); - if (ret) { - spin_unlock_irqrestore(&device_domain_lock, flags); + if (ret) return ret; - } + + spin_lock_irqsave(&device_domain_lock, flags); list_add(&info->link, &domain->devices); spin_unlock_irqrestore(&device_domain_lock, flags); + info->domain =3D domain; =20 /* PASID table is mandatory for a PCI device in scalable mode. */ if (sm_supported(iommu) && !dev_is_real_dma_subdevice(dev)) { @@ -4629,7 +4618,6 @@ int intel_iommu_enable_pasid(struct intel_iommu *iomm= u, struct device *dev) struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct context_entry *context; struct dmar_domain *domain; - unsigned long flags; u64 ctx_lo; int ret; =20 @@ -4637,7 +4625,6 @@ int intel_iommu_enable_pasid(struct intel_iommu *iomm= u, struct device *dev) if (!domain) return -EINVAL; =20 - spin_lock_irqsave(&device_domain_lock, flags); spin_lock(&iommu->lock); =20 ret =3D -EINVAL; @@ -4669,7 +4656,6 @@ int intel_iommu_enable_pasid(struct intel_iommu *iomm= u, struct device *dev) =20 out: spin_unlock(&iommu->lock); - spin_unlock_irqrestore(&device_domain_lock, flags); =20 return ret; } --=20 2.25.1 From nobody Tue Apr 28 23:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2ADD9C433EF for ; Fri, 27 May 2022 06:35:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244719AbiE0GfZ (ORCPT ); Fri, 27 May 2022 02:35:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37230 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343965AbiE0Gey (ORCPT ); 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26 May 2022 23:34:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,254,1647327600"; d="scan'208";a="718689186" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 26 May 2022 23:34:31 -0700 From: Lu Baolu To: Joerg Roedel , Kevin Tian , Ashok Raj , Christoph Hellwig , Jason Gunthorpe Cc: Will Deacon , Robin Murphy , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH 12/12] iommu/vt-d: Convert device_domain_lock into per-domain mutex Date: Fri, 27 May 2022 14:30:19 +0800 Message-Id: <20220527063019.3112905-13-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220527063019.3112905-1-baolu.lu@linux.intel.com> References: <20220527063019.3112905-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Using a global device_domain_lock spinlock to protect per-domain device tracking lists is an inefficient way, especially considering this lock is also needed in the hot paths. On the other hand, in the iommu_unmap() path, the driver needs to iterate over the device tracking list and flush the caches on the devices through qi_submit_sync(), where unfortunately cpu_relax() is used. In order to avoid holding a spinlock lock when cpu_relax() is called, this also covert the spinlock into a mutex one. This works as the device tracking lists are not touched in any interrupt contexts. Signed-off-by: Lu Baolu --- drivers/iommu/intel/iommu.h | 1 + drivers/iommu/intel/iommu.c | 45 +++++++++++++++---------------------- 2 files changed, 19 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h index 6724703d573b..9e572ddffc08 100644 --- a/drivers/iommu/intel/iommu.h +++ b/drivers/iommu/intel/iommu.h @@ -541,6 +541,7 @@ struct dmar_domain { u8 force_snooping : 1; /* Create IOPTEs with snoop control */ u8 set_pte_snp:1; =20 + struct mutex mutex; /* Protect device tracking lists */ struct list_head devices; /* all devices' list */ =20 struct dma_pte *pgd; /* virtual address */ diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index f8aa8649dc6f..1815a9d73426 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -310,7 +310,6 @@ static int iommu_skip_te_disable; #define IDENTMAP_GFX 2 #define IDENTMAP_AZALIA 4 =20 -static DEFINE_SPINLOCK(device_domain_lock); const struct iommu_ops intel_iommu_ops; =20 static bool translation_pre_enabled(struct intel_iommu *iommu) @@ -534,9 +533,8 @@ static int domain_update_device_node(struct dmar_domain= *domain) { struct device_domain_info *info; int nid =3D NUMA_NO_NODE; - unsigned long flags; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_for_each_entry(info, &domain->devices, link) { /* * There could possibly be multiple device numa nodes as devices @@ -548,7 +546,7 @@ static int domain_update_device_node(struct dmar_domain= *domain) if (nid !=3D NUMA_NO_NODE) break; } - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); =20 return nid; } @@ -1375,12 +1373,11 @@ iommu_support_dev_iotlb(struct dmar_domain *domain,= struct intel_iommu *iommu, u8 bus, u8 devfn) { struct device_domain_info *info =3D NULL, *tmp; - unsigned long flags; =20 if (!iommu->qi) return NULL; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_for_each_entry(tmp, &domain->devices, link) { if (tmp->iommu =3D=3D iommu && tmp->bus =3D=3D bus && tmp->devfn =3D=3D devfn) { @@ -1389,7 +1386,7 @@ iommu_support_dev_iotlb(struct dmar_domain *domain, s= truct intel_iommu *iommu, break; } } - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); =20 return info; } @@ -1398,9 +1395,8 @@ static void domain_update_iotlb(struct dmar_domain *d= omain) { struct device_domain_info *info; bool has_iotlb_device =3D false; - unsigned long flags; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_for_each_entry(info, &domain->devices, link) { if (info->ats_enabled) { has_iotlb_device =3D true; @@ -1408,7 +1404,7 @@ static void domain_update_iotlb(struct dmar_domain *d= omain) } } domain->has_iotlb_device =3D has_iotlb_device; - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); } =20 static void iommu_enable_dev_iotlb(struct device_domain_info *info) @@ -1499,17 +1495,15 @@ static void __iommu_flush_dev_iotlb(struct device_d= omain_info *info, static void iommu_flush_dev_iotlb(struct dmar_domain *domain, u64 addr, unsigned mask) { - unsigned long flags; struct device_domain_info *info; =20 if (!domain->has_iotlb_device) return; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_for_each_entry(info, &domain->devices, link) __iommu_flush_dev_iotlb(info, addr, mask); - - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); } =20 static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, @@ -1761,6 +1755,7 @@ static struct dmar_domain *alloc_domain(unsigned int = type) domain->flags |=3D DOMAIN_FLAG_USE_FIRST_LEVEL; domain->has_iotlb_device =3D false; INIT_LIST_HEAD(&domain->devices); + mutex_init(&domain->mutex); =20 return domain; } @@ -2434,7 +2429,6 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu; - unsigned long flags; u8 bus, devfn; int ret; =20 @@ -2446,9 +2440,9 @@ static int domain_add_dev_info(struct dmar_domain *do= main, struct device *dev) if (ret) return ret; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_add(&info->link, &domain->devices); - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); info->domain =3D domain; =20 /* PASID table is mandatory for a PCI device in scalable mode. */ @@ -4126,7 +4120,6 @@ static void dmar_remove_one_dev_info(struct device *d= ev) struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct dmar_domain *domain =3D info->domain; struct intel_iommu *iommu =3D info->iommu; - unsigned long flags; =20 if (!dev_is_real_dma_subdevice(info->dev)) { if (dev_is_pci(info->dev) && sm_supported(iommu)) @@ -4138,9 +4131,9 @@ static void dmar_remove_one_dev_info(struct device *d= ev) intel_pasid_free_table(info->dev); } =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&domain->mutex); list_del(&info->link); - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&domain->mutex); =20 domain_detach_iommu(domain, iommu); } @@ -4424,7 +4417,7 @@ static bool domain_support_force_snooping(struct dmar= _domain *domain) struct device_domain_info *info; bool support =3D true; =20 - assert_spin_locked(&device_domain_lock); + lockdep_assert_held(&domain->mutex); list_for_each_entry(info, &domain->devices, link) { if (!ecap_sc_support(info->iommu->ecap)) { support =3D false; @@ -4439,8 +4432,7 @@ static void domain_set_force_snooping(struct dmar_dom= ain *domain) { struct device_domain_info *info; =20 - assert_spin_locked(&device_domain_lock); - + lockdep_assert_held(&domain->mutex); /* * Second level page table supports per-PTE snoop control. The * iommu_map() interface will handle this by setting SNP bit. @@ -4458,20 +4450,19 @@ static void domain_set_force_snooping(struct dmar_d= omain *domain) static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domai= n) { struct dmar_domain *dmar_domain =3D to_dmar_domain(domain); - unsigned long flags; =20 if (dmar_domain->force_snooping) return true; =20 - spin_lock_irqsave(&device_domain_lock, flags); + mutex_lock(&dmar_domain->mutex); if (!domain_support_force_snooping(dmar_domain)) { - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&dmar_domain->mutex); return false; } =20 domain_set_force_snooping(dmar_domain); dmar_domain->force_snooping =3D true; - spin_unlock_irqrestore(&device_domain_lock, flags); + mutex_unlock(&dmar_domain->mutex); =20 return true; } --=20 2.25.1