From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80E9EC433F5 for ; Wed, 25 May 2022 14:58:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234021AbiEYO6P (ORCPT ); Wed, 25 May 2022 10:58:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241939AbiEYO6J (ORCPT ); Wed, 25 May 2022 10:58:09 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C505E6C0FE; Wed, 25 May 2022 07:58:08 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id 6B8481F450F4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490687; bh=+4m7P+pQtDoPRLeJ/o/TRoRtSsTCzrenQkb157P79lQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TlKOHXS3aCs3rvje9nB1n31DpTc3NvRCrZn0OdKzxRi9cxs4OLRCPXZpVxuGqj0GX R5j8gxzle1zXngChlMkXIILoTvIpAvjWBNDuIvAM9yY3TXpkf354PccFwBpqSJwbk4 qsutJTt2eILUFYhM7/33ZP8HXp3a91pV3NsKqnR4JV4NhaEC++K+n1qcW5h+wpLNDU qcYbmr/ynYBC/IkbqNxvPinv6L1kcyEfKBHzdQrymVcKCQ7NRQ/TzDrQnp5dEWf1y5 ILHxR8jodll6ex09bsZZYvTz2ZmLPqXKFQDhoAvMbnZAw/jp2uF6g7j0GuW/xpAOdx J/8Z0nqT5Ving== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/9] dt-bindings: Add compatible for Mali Valhall (JM) Date: Wed, 25 May 2022 10:57:46 -0400 Message-Id: <20220525145754.25866-2-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From the kernel's perspective, (pre-CSF, "Job Manager") Valhall is more or less compatible with Bifrost, although they differ to userspace. Add a compatible for Valhall to the existing Bifrost bindings documentation. As the first SoC with a Valhall GPU receiving mainline support, add a specific compatible for the MediaTek MT8192, which instantiates a Mali-G57. v2: Change compatible to arm,mali-valhall-jm (Daniel Stone). Signed-off-by: Alyssa Rosenzweig CC: devicetree@vger.kernel.org Reviewed-by: Rob Herring Reviewed-by: Steven Price --- .../bindings/gpu/arm,mali-bifrost.yaml | 25 +++++++++++-------- 1 file changed, 15 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/= Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml index 85f8d4764740..78964c140b46 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -14,16 +14,21 @@ properties: pattern: '^gpu@[a-f0-9]+$' =20 compatible: - items: - - enum: - - amlogic,meson-g12a-mali - - mediatek,mt8183-mali - - realtek,rtd1619-mali - - renesas,r9a07g044-mali - - renesas,r9a07g054-mali - - rockchip,px30-mali - - rockchip,rk3568-mali - - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully= discoverable + oneOf: + - items: + - enum: + - amlogic,meson-g12a-mali + - mediatek,mt8183-mali + - realtek,rtd1619-mali + - renesas,r9a07g044-mali + - renesas,r9a07g054-mali + - rockchip,px30-mali + - rockchip,rk3568-mali + - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is f= ully discoverable + - items: + - enum: + - mediatek,mt8192-mali + - const: arm,mali-valhall-jm # Mali Valhall GPU model/revision i= s fully discoverable =20 reg: maxItems: 1 --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18F31C433F5 for ; Wed, 25 May 2022 14:58:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234392AbiEYO6S (ORCPT ); Wed, 25 May 2022 10:58:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34824 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244838AbiEYO6M (ORCPT ); Wed, 25 May 2022 10:58:12 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 708C7AEE0C for ; Wed, 25 May 2022 07:58:11 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id 12ECE1F450FF DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490690; bh=+6b8EQXcsSIYlNmlfo0q2fl0hC9/jd/rBLj/IepVl+s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oIL1b7ocEMHgRyXcRAatawMwql1Ez9qRZJ60qbuN1es4YROL44ZswbFUuPrfbwRpF BpU5WRAtajAfvAygx2rr+cH9mLd5vP+SAq1e1oRpoApLrCciyxBGNTNUWctfQNt9OJ ek0O06+tVhmLn9ojZJZ7LIvBB7lHutUAIrA1uSa+sVab5Yn0YUMQnYuA/8oh061sde n+iEhofKWoGgFtrM/dxvqN88cdeyhpgLVYk53btsOAd6TW4z0tRAmvQt+36FUNVYLW XDZH+8RWvgYH11HGsPEHHuUrUD1R6vG4MIfJHxQHBPY0eBnOwpX1uoU4FmJI5G7hiC QdlqOkQmG2dzg== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/9] drm/panfrost: Handle HW_ISSUE_TTRX_2968_TTRX_3162 Date: Wed, 25 May 2022 10:57:47 -0400 Message-Id: <20220525145754.25866-3-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add handling for the HW_ISSUE_TTRX_2968_TTRX_3162 quirk. Logic ported from kbase. kbase lists this workaround as used on Mali-G57. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 +++ drivers/gpu/drm/panfrost/panfrost_issues.h | 3 +++ drivers/gpu/drm/panfrost/panfrost_regs.h | 1 + 3 files changed, 7 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panf= rost/panfrost_gpu.c index aa89926742fd..295bef27fb55 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -108,6 +108,9 @@ static void panfrost_gpu_init_quirks(struct panfrost_de= vice *pfdev) quirks |=3D SC_LS_ALLOW_ATTR_TYPES; } =20 + if (panfrost_has_hw_issue(pfdev, HW_ISSUE_TTRX_2968_TTRX_3162)) + quirks |=3D SC_VAR_ALGORITHM; + if (panfrost_has_hw_feature(pfdev, HW_FEATURE_TLS_HASHING)) quirks |=3D SC_TLS_HASH_ENABLE; =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/p= anfrost/panfrost_issues.h index 501a76c5e95f..41a714ce6fce 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -125,6 +125,9 @@ enum panfrost_hw_issue { * kernel must fiddle with L2 caches to prevent data leakage */ HW_ISSUE_TGOX_R1_1234, =20 + /* Must set SC_VAR_ALGORITHM */ + HW_ISSUE_TTRX_2968_TTRX_3162, + HW_ISSUE_END }; =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/pan= frost/panfrost_regs.h index 0b6cd8fdcb47..accb4fa3adb8 100644 --- a/drivers/gpu/drm/panfrost/panfrost_regs.h +++ b/drivers/gpu/drm/panfrost/panfrost_regs.h @@ -195,6 +195,7 @@ #define SC_TLS_HASH_ENABLE BIT(17) #define SC_LS_ATTR_CHECK_DISABLE BIT(18) #define SC_ENABLE_TEXGRD_FLAGS BIT(25) +#define SC_VAR_ALGORITHM BIT(29) /* End SHADER_CONFIG register */ =20 /* TILER_CONFIG register */ --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26260C433EF for ; Wed, 25 May 2022 14:58:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244922AbiEYO6W (ORCPT ); Wed, 25 May 2022 10:58:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244892AbiEYO6O (ORCPT ); Wed, 25 May 2022 10:58:14 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 526D2AEE10 for ; Wed, 25 May 2022 07:58:14 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id B43D81F450F2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490693; bh=V/KfHPBGZosfbKnwVHQPcXJblhj5zBtBpc0Z5yGRgrI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WRQHhRiAFVBl75rpUn357RwSiO3Ibg5i7H5HD80WWA47v2CIh4h04LlD2pld3R5kC JnRx2TrbiCB6fYd5FerW2SxAIZuR34ir3EZTxm6Pb+ChtF8k5b0MM/YEi4PvfHhYIB acxZqLeD9ysQIrR9s2ekfZSezWPsVqQ6TvVR5kYgTt8jrEBgOq6LmYqy51LCntGtlF eT1TPhFSM8rx9dr/HD3qlKWEWkKIhUWabzpp9FrITzLIRcUIGl9BUaFcaVLp1jreOY n1oEKNn1Krhl8x5CI+V3Xu6linExP5xVh+Jth4Ob7dQ8FPGRI36HBnuT/fE8kQs8MS RFUk1lXfIfUYw== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/9] drm/panfrost: Constify argument to has_hw_issue Date: Wed, 25 May 2022 10:57:48 -0400 Message-Id: <20220525145754.25866-4-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Logically, this function is free of side effects, so any pointers it takes should be const. Needed to avoid a warning in the next patch. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_issues.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/p= anfrost/panfrost_issues.h index 41a714ce6fce..14670ee58ace 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -251,7 +251,7 @@ enum panfrost_hw_issue { =20 #define hw_issues_g76 0 =20 -static inline bool panfrost_has_hw_issue(struct panfrost_device *pfdev, +static inline bool panfrost_has_hw_issue(const struct panfrost_device *pfd= ev, enum panfrost_hw_issue issue) { return test_bit(issue, pfdev->features.hw_issues); --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5306C433EF for ; Wed, 25 May 2022 14:58:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244935AbiEYO6f (ORCPT ); Wed, 25 May 2022 10:58:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244909AbiEYO6S (ORCPT ); Wed, 25 May 2022 10:58:18 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6416AEE34 for ; Wed, 25 May 2022 07:58:17 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id 94FAC1F450F4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490696; bh=CcULeZxjY87ecxTA0HcUOCLHUV0rECEmqTrVAi386iI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O+8jb27A4B7maymABi5fpZFg6lIo5ElWSABs76c1Rpiu7SdK081CjQ8LLBXWiCdLk JMxh/+PXaQVaQZKA96R4ax6mQEifXfCP5wFVK0eVltFBkzkPhQp/iCBq9DjOLB+wTK ZC9bw8AzYkWK6Ti8ESxc86i8Jbl7haDYRjGHGOXXcE+qlt+GFIdK3VOzN9XnJ6jb05 twSkGZScijfVsNQh7Xy6cPUaa35HkUuhNkBjA8NobLfSkdehftBkuBBsKr9N2v9ej4 6MJFghYWq3Vv4+qhr+Y8YDadLKTmjgadj5xhK+ywt8MS/aSvD2RJe7POYGjxHc3JWH D/UzhOQuU34UA== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 4/9] drm/panfrost: Handle HW_ISSUE_TTRX_3076 Date: Wed, 25 May 2022 10:57:49 -0400 Message-Id: <20220525145754.25866-5-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Some Valhall GPUs require resets when encountering bus faults due to occlusion query writes. Add the issue bit for this and handle it. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_device.c | 9 +++++++-- drivers/gpu/drm/panfrost/panfrost_issues.h | 4 ++++ 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/p= anfrost/panfrost_device.c index 7f51a4682ccb..ee612303f076 100644 --- a/drivers/gpu/drm/panfrost/panfrost_device.c +++ b/drivers/gpu/drm/panfrost/panfrost_device.c @@ -11,6 +11,7 @@ #include "panfrost_device.h" #include "panfrost_devfreq.h" #include "panfrost_features.h" +#include "panfrost_issues.h" #include "panfrost_gpu.h" #include "panfrost_job.h" #include "panfrost_mmu.h" @@ -380,9 +381,13 @@ const char *panfrost_exception_name(u32 exception_code) bool panfrost_exception_needs_reset(const struct panfrost_device *pfdev, u32 exception_code) { - /* Right now, none of the GPU we support need a reset, but this - * might change. + /* If an occlusion query write causes a bus fault on affected GPUs, + * future fragment jobs may hang. Reset to workaround. */ + if (exception_code =3D=3D DRM_PANFROST_EXCEPTION_JOB_BUS_FAULT) + return panfrost_has_hw_issue(pfdev, HW_ISSUE_TTRX_3076); + + /* No other GPUs we support need a reset */ return false; } =20 diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/p= anfrost/panfrost_issues.h index 14670ee58ace..e35807e4b743 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -128,6 +128,10 @@ enum panfrost_hw_issue { /* Must set SC_VAR_ALGORITHM */ HW_ISSUE_TTRX_2968_TTRX_3162, =20 + /* Bus fault from occlusion query write may cause future fragment jobs + * to hang */ + HW_ISSUE_TTRX_3076, + HW_ISSUE_END }; =20 --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA11AC433EF for ; Wed, 25 May 2022 14:59:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242610AbiEYO7r (ORCPT ); Wed, 25 May 2022 10:59:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244939AbiEYO63 (ORCPT ); Wed, 25 May 2022 10:58:29 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 465D1AF1C3 for ; Wed, 25 May 2022 07:58:20 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id BF61B1F450F2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490699; bh=5/q/VGsjElGEhYhnxXg0G7I4bXivQFpLYLt/EA9+bfo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C8zYvYeS5IFbvVOR6K68eH/w0KatIXNchsXHaGX9mNZPuk1VTpjGEQyObBccM38rc AZKxRB01IQiLAzsr9/rFdfYBHCssOllm9V5EtTz4rSCqyHG+V3zvRyEdfDUWNcq+HW 1J6TqdD2NCiMOYN1RT9kXBc3BBk5vyITZXLUcwEAMNtAgYGk5at042BCF8Yt+dLzKM kyhtmU7xm0euT63ye5GMsHEhxoC6xWtc5tvjspbQrKkf9TBBq2rZCKljlnX/+lByLR 6UAisS2exJ4COxTEFKzOPy9vWHU0pb2SjxKLU1C7k4OUjKn3SPrjqvMt/uVbH1UbHD zh0L2Fm9p7cXg== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 5/9] drm/panfrost: Add HW_ISSUE_TTRX_3485 quirk Date: Wed, 25 May 2022 10:57:50 -0400 Message-Id: <20220525145754.25866-6-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" TTRX_3485 requires the infamous "dummy job" workaround. I have this workaround implemented in a local branch, but I have not yet hit a case that requires it so I cannot test whether the implementation is correct. In the mean time, add the quirk bit so we can document which platforms may need it in the future. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_issues.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/p= anfrost/panfrost_issues.h index e35807e4b743..4d41e0a13867 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -132,6 +132,9 @@ enum panfrost_hw_issue { * to hang */ HW_ISSUE_TTRX_3076, =20 + /* Must issue a dummy job before starting real work to prevent hangs */ + HW_ISSUE_TTRX_3485, + HW_ISSUE_END }; =20 --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04CB1C433F5 for ; Wed, 25 May 2022 14:59:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245039AbiEYO71 (ORCPT ); Wed, 25 May 2022 10:59:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244934AbiEYO6a (ORCPT ); Wed, 25 May 2022 10:58:30 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D23AAF1ED for ; Wed, 25 May 2022 07:58:23 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id 6D1E11F450F4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490702; bh=iIq4Z4OE65fY1MUJxJmt36vci/mo0TrqzqbRmhmVVVQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ALVw3IlJ0zZ35sYa98XF05tNlJeyYalTzDhzbUAQ+yPCPe5EpdyligBS3ytbL5P2X ESgtBI6h821tZqo54pybiiWG7A6cFyHdgLOWrd9UmcT4ZDkv5KVg0qJ58FEXWKJVr2 m2lXcGK++3Z5qX1eJ8WG6MMVDk6/Xm9UB+dyw7u4/zsrjlE3X2c7VqfGON92hnXtTs r0YYA62UPBZuDI3wrHNbQ5FUzkEtlily8FMHfNgKG4FrNyEIkykhig7v0EkcmALZNh bx3R8osuxeZYDkcBSReCZLDPWM+hDCTiHYkhfPSTl+QoAyjZh6x3DfWDd3MwYEhC1s XeHBXPsth+t6w== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 6/9] drm/panfrost: Add "clean only safe" feature bit Date: Wed, 25 May 2022 10:57:51 -0400 Message-Id: <20220525145754.25866-7-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the HW_FEATURE_CLEAN_ONLY_SAFE bit based on kbase. When I actually tried to port the logic from kbase, trivial jobs raised Data Invalid Faults, so this may depend on other coherency details. It's still useful to have the bit to record the feature bit when adding new models. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_features.h | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm= /panfrost/panfrost_features.h index 36fadcf9634e..1a8bdebc86a3 100644 --- a/drivers/gpu/drm/panfrost/panfrost_features.h +++ b/drivers/gpu/drm/panfrost/panfrost_features.h @@ -21,6 +21,7 @@ enum panfrost_hw_feature { HW_FEATURE_TLS_HASHING, HW_FEATURE_THREAD_GROUP_SPLIT, HW_FEATURE_IDVS_GROUP_SIZE, + HW_FEATURE_CLEAN_ONLY_SAFE, HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG, }; =20 --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D7B8C433F5 for ; Wed, 25 May 2022 14:58:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245026AbiEYO6o (ORCPT ); Wed, 25 May 2022 10:58:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35612 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243409AbiEYO6c (ORCPT ); Wed, 25 May 2022 10:58:32 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2DF34AF31D for ; Wed, 25 May 2022 07:58:26 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id DEE321F450F2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490705; bh=eBsjBjQv3sk3UpDCtqJWY59zZ/1tiXDyZ4h31E3V6uQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Nj9NQjRZsmHCeUA9UZ1N3YDj/aLVJj04SpghF69HywUacUVSQQjUQbR5wwHhuVbmJ g55kHm08WFg8MNjX91AciJjjm5x9KLbUX0mRDY1148flVCHlmIBy+p1OwPGKPdh2Bn toz5w3/tDOcNMBk7QKBOjmQmQ++rzlnB/bOL4LvQHuigvaYh843130psT1U3OYwuao jrZbhhpOTxtrPLlxJdaVHGp62zI7eqMcKCU94omvJT8UI8FuJCWhkVrKHuNwPqn630 OQ8SsPsT1AXgofkKEszU7dPhc9pX4m+xkEaM0fHGvTSN4/CQV6sIQK58GI5XliX0Wc XdiN6UkaBZNzw== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 7/9] drm/panfrost: Don't set L2_MMU_CONFIG quirks Date: Wed, 25 May 2022 10:57:52 -0400 Message-Id: <20220525145754.25866-8-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" L2_MMU_CONFIG is an implementation-defined register. Different Mali GPUs define slightly different MAX_READS and MAX_WRITES fields, which throttle outstanding reads and writes when set to non-zero values. When left as zero, reads and writes are not throttled. Both kbase and panfrost always zero these registers. Per discussion with Steven Price, there are two reasons these quirks may be used: 1. Simulating slower memory subsystems. This use case is only of interest to system-on-chip designers; it is not relevant to mainline. 2. Working around broken memory subsystems. Hopefully we never see this case in mainline. If we do, we'll need to set this register based on an SoC-compatible, rather than generally matching on the GPU model. To the best of our knowledge, these fields are zero at reset, so the write is not necessary. Let's remove the write to aid porting to new Mali GPUs, which have different layouts for the L2_MMU_CONFIG register. Signed-off-by: Alyssa Rosenzweig Suggested-by: Steven Price Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_gpu.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panf= rost/panfrost_gpu.c index 295bef27fb55..e1a6e763d0dc 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -127,18 +127,6 @@ static void panfrost_gpu_init_quirks(struct panfrost_d= evice *pfdev) gpu_write(pfdev, GPU_TILER_CONFIG, quirks); =20 =20 - quirks =3D gpu_read(pfdev, GPU_L2_MMU_CONFIG); - - /* Limit read & write ID width for AXI */ - if (panfrost_has_hw_feature(pfdev, HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) - quirks &=3D ~(L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS | - L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES); - else - quirks &=3D ~(L2_MMU_CONFIG_LIMIT_EXTERNAL_READS | - L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES); - - gpu_write(pfdev, GPU_L2_MMU_CONFIG, quirks); - quirks =3D 0; if ((panfrost_model_eq(pfdev, 0x860) || panfrost_model_eq(pfdev, 0x880)) = && pfdev->features.revision >=3D 0x2000) --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DDF21C433F5 for ; Wed, 25 May 2022 14:58:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244944AbiEYO64 (ORCPT ); Wed, 25 May 2022 10:58:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244982AbiEYO6c (ORCPT ); Wed, 25 May 2022 10:58:32 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95A79AFAC2 for ; Wed, 25 May 2022 07:58:29 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id C08BA1F450F4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490708; bh=yD9tXqnPqKUJrB/V6ILLlV5Xai1v3uJYnOrXEF5Bvc0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AuBIb9m4C+G5XSDYj+f4kMKfN0PrUv2457r+p8ZQwKcYe0SFvH2SG5Hudu8CcGJl5 z6J4Dvj0fchV4z7UtZU6ULXox+Qs2ODC2PoPxTdyC8186FZ35DOBFCwsx5rNijnvj8 ClrbJD1t1YkyooEz8j+OSZv2YCfqBXWZY9yzkeiXggjJCZVZ30I+OWgtS0S2tnM/pv 70K7E4y1Fy5R/dAKYUNHLmDMHdrIly8ehu2mqUygBnPoUw3dZPYOsbL12pgc3QlrDf l+T0ZI6kOHIUvtDsLfAwX7dO9yK15ZhphX0iV3cvQMVZepLWIUeYleaTgmCxEwmZB8 G/fuwZD7goWUQ== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 8/9] drm/panfrost: Add Mali-G57 "Natt" support Date: Wed, 25 May 2022 10:57:53 -0400 Message-Id: <20220525145754.25866-9-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the features, issues, and GPU ID for Mali-G57, a first-generation Valhall GPU. Other first- and second-generation Valhall GPUs should be similar. v2: Split out issue list for r0p0 from newer Natt GPUs, as TTRX_3485 was fixed in r0p1. Unfortunately, MT8192 has a r0p0, so we do need to handle TTRX_3485. Signed-off-by: Alyssa Rosenzweig --- drivers/gpu/drm/panfrost/panfrost_features.h | 12 ++++++++++++ drivers/gpu/drm/panfrost/panfrost_gpu.c | 3 +++ drivers/gpu/drm/panfrost/panfrost_issues.h | 9 +++++++++ 3 files changed, 24 insertions(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_features.h b/drivers/gpu/drm= /panfrost/panfrost_features.h index 1a8bdebc86a3..7ed0cd3ea2d4 100644 --- a/drivers/gpu/drm/panfrost/panfrost_features.h +++ b/drivers/gpu/drm/panfrost/panfrost_features.h @@ -106,6 +106,18 @@ enum panfrost_hw_feature { BIT_ULL(HW_FEATURE_TLS_HASHING) | \ BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG)) =20 +#define hw_features_g57 (\ + BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \ + BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \ + BIT_ULL(HW_FEATURE_XAFFINITY) | \ + BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \ + BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \ + BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \ + BIT_ULL(HW_FEATURE_COHERENCY_REG) | \ + BIT_ULL(HW_FEATURE_AARCH64_MMU) | \ + BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \ + BIT_ULL(HW_FEATURE_CLEAN_ONLY_SAFE)) + static inline bool panfrost_has_hw_feature(struct panfrost_device *pfdev, enum panfrost_hw_feature feat) { diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panf= rost/panfrost_gpu.c index e1a6e763d0dc..6452e4e900dd 100644 --- a/drivers/gpu/drm/panfrost/panfrost_gpu.c +++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c @@ -201,6 +201,9 @@ static const struct panfrost_model gpu_models[] =3D { GPU_MODEL(g52, 0x7002), GPU_MODEL(g31, 0x7003, GPU_REV(g31, 1, 0)), + + GPU_MODEL(g57, 0x9001, + GPU_REV(g57, 0, 0)), }; =20 static void panfrost_gpu_init_features(struct panfrost_device *pfdev) diff --git a/drivers/gpu/drm/panfrost/panfrost_issues.h b/drivers/gpu/drm/p= anfrost/panfrost_issues.h index 4d41e0a13867..c5fa9e897a35 100644 --- a/drivers/gpu/drm/panfrost/panfrost_issues.h +++ b/drivers/gpu/drm/panfrost/panfrost_issues.h @@ -258,6 +258,15 @@ enum panfrost_hw_issue { =20 #define hw_issues_g76 0 =20 +#define hw_issues_g57 (\ + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ + BIT_ULL(HW_ISSUE_TTRX_3076)) + +#define hw_issues_g57_r0p0 (\ + BIT_ULL(HW_ISSUE_TTRX_2968_TTRX_3162) | \ + BIT_ULL(HW_ISSUE_TTRX_3076) | \ + BIT_ULL(HW_ISSUE_TTRX_3485)) + static inline bool panfrost_has_hw_issue(const struct panfrost_device *pfd= ev, enum panfrost_hw_issue issue) { --=20 2.35.1 From nobody Tue May 5 10:02:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3B776C433EF for ; Wed, 25 May 2022 14:58:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241974AbiEYO6v (ORCPT ); Wed, 25 May 2022 10:58:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35684 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245001AbiEYO6e (ORCPT ); Wed, 25 May 2022 10:58:34 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2676BAEE33 for ; Wed, 25 May 2022 07:58:32 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: alyssa) with ESMTPSA id A30401F45100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1653490711; bh=bnSaHHVglxBRFZ7QCHCJpUPrtjkabwhr6q4XjWzl/x8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gQzv38aAliUhyRLJkVW0dgD0LQe/e6pcBEUVwVDwGq3tPWfWx/7xcyCFozJd6zng2 N46U1nK6IHBFGRaTLu18Z2t0KZOytRs+7K9dGpx3GYPmJllV418XWHjB7vHVNm+EK+ iPU5u8dDOaRdEfY63wBWN73nhlB/hvJZtrcvBUd/5PrnZ2hZur/j1+RcF5SrH66nj+ NxC7ykKDNV4iBms9MI3lfQazIRCK0UV+nVKCrZRaUWryUR0yGDP/dI/6jbevOnypWh Zw2FadDYq7eyE4eVRQD5wNxHXcMl2LnJ6QnaZSLt4EKdX8g05yC2DnBumlA0abnUie d5RBAQ2OgGFwg== From: Alyssa Rosenzweig To: dri-devel@lists.freedesktop.org Cc: Rob Herring , Tomeu Vizoso , Steven Price , Alyssa Rosenzweig , David Airlie , Daniel Vetter , =?UTF-8?q?N=C3=ADcolas=20F=20=2E=20R=20=2E=20A=20=2E=20Prado?= , AngeloGioacchino Del Regno , linux-kernel@vger.kernel.org Subject: [PATCH v2 9/9] drm/panfrost: Add arm,mali-valhall-jm compatible Date: Wed, 25 May 2022 10:57:54 -0400 Message-Id: <20220525145754.25866-10-alyssa.rosenzweig@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> References: <20220525145754.25866-1-alyssa.rosenzweig@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The most important Valhall-specific quirks have been handled, so add the Valhall compatible and probe. v2: Use arm,mali-valhall-jm compatible. Signed-off-by: Alyssa Rosenzweig Reviewed-by: Steven Price --- drivers/gpu/drm/panfrost/panfrost_drv.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panf= rost/panfrost_drv.c index 7fcbc2a5b6cd..b48b6f2af029 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -664,6 +664,7 @@ static const struct of_device_id dt_match[] =3D { { .compatible =3D "arm,mali-t860", .data =3D &default_data, }, { .compatible =3D "arm,mali-t880", .data =3D &default_data, }, { .compatible =3D "arm,mali-bifrost", .data =3D &default_data, }, + { .compatible =3D "arm,mali-valhall-jm", .data =3D &default_data, }, { .compatible =3D "mediatek,mt8183-mali", .data =3D &mediatek_mt8183_data= }, {} }; --=20 2.35.1