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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id k24-20020a05600c1c9800b003974027722csm2703693wms.47.2022.05.24.08.28.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 May 2022 08:28:05 -0700 (PDT) From: Alexandre Bailon To: rafael@kernel.org, rui.zhang@intel.com, daniel.lezcano@linaro.org, amitk@kernel.org Cc: linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, mka@chromium.org, robh+dt@kernel.org, krzk+dt@kernel.org, matthias.bgg@gmail.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, james.lo@mediatek.com, fan.chen@mediatek.com, louis.yu@mediatek.com, rex-bc.chen@mediatek.com, Alexandre Bailon Subject: [PATCH v7 2/6] dt-bindings: thermal: Add binding document for LVTS thermal controllers Date: Tue, 24 May 2022 17:25:49 +0200 Message-Id: <20220524152552.246193-3-abailon@baylibre.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220524152552.246193-1-abailon@baylibre.com> References: <20220524152552.246193-1-abailon@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds binding document for mt8192 and mt8195 thermal controllers. Signed-off-by: Alexandre Bailon --- .../thermal/mediatek,mt8192-lvts.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/mediatek,mt81= 92-lvts.yaml diff --git a/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts= .yaml b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml new file mode 100644 index 000000000000..914c877d1f2f --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/mediatek,mt8192-lvts.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/mediatek,mt8192-lvts.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek SoC LVTS thermal controller + +maintainers: + - Yu-Chia Chang + - Ben Tseng + +allOf: + - $ref: thermal-sensor.yaml# + - $ref: /nvmem/nvmem-consumer.yaml# + +properties: + compatible: + enum: + - mediatek,mt8192-lvts + - mediatek,mt8195-lvts + + reg: + minItems: 2 + maxItems: 4 + + interrupts: + maxItems: 2 + + clocks: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + + nvmem-cells: + maxItems: 2 + description: Calibration data for thermal sensors + + nvmem-cell-names: + items: + - const: e_data1 + - const: e_data2 + + resets: + $ref: /schemas/types.yaml#/definitions/phandle-array + + +required: + - '#thermal-sensor-cells' + - compatible + - reg + - interrupts + - clocks + - nvmem-cells + - nvmem-cell-names + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + lvts: lvts@1100b000 { + compatible =3D "mediatek,mt8195-lvts"; + #thermal-sensor-cells =3D <1>; + reg =3D <0 0x1100b000 0 0x1000>, + <0 0x11278000 0 0x1000>; + interrupts =3D , + ; + clocks =3D <&infracfg_ao CLK_INFRA_AO_THERM>; + resets =3D <&infracfg_ao MT8195_INFRA_RST0_THERM_CTRL_SWRST>, + <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>; + nvmem-cells =3D <&lvts_e_data1 &lvts_e_data2>; + nvmem-cell-names =3D "e_data1","e_data2"; + }; +... --=20 2.35.1