From nobody Wed Apr 29 03:27:32 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2AEAC433F5 for ; Tue, 24 May 2022 13:53:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236372AbiEXNxC (ORCPT ); Tue, 24 May 2022 09:53:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52630 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230467AbiEXNw7 (ORCPT ); Tue, 24 May 2022 09:52:59 -0400 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 57B068A32F for ; Tue, 24 May 2022 06:52:57 -0700 (PDT) Received: by mail-wr1-x429.google.com with SMTP id u27so24996142wru.8 for ; Tue, 24 May 2022 06:52:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BYC1tIsAjiq1cBKpe9O8OQgijyZp38kdmJuYTBXJuLg=; b=D0c5KaQWwqZx7KqTeU12Kg8rmuImfcrejKebtAJx08mLaBjPZqMogK/3Z+j4WjBMhe Y8OXJLwEyBxcm/bnd+eyk9CuuTwP5gsdlg+7XemeoLCBmQO5+N9Ns+ytfbSWhFUIUSZH BID28EumYJ/UOXlxYuKGN6VcyNm5mrtQ5LDFAAccyF/f8yWAtfS5VaP+27umL9+bnFE/ NQwlS/HYIEzfAPkjFGVs/1h2cAs5EoPDHFaweAogrR4FFavpURDq5iJPiMTdcyBrq8bW jcREIayYSMBsapnVrJtEqc42Dvl+FlVHP0JJAnWgVUzKo4i266f8joFFK9/RAztxSZcO owTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=BYC1tIsAjiq1cBKpe9O8OQgijyZp38kdmJuYTBXJuLg=; b=poBM7MTthPihedmC9MqKIelkfRG7prSeLWodTesgYregwYUR/QvPLRMM3UcOhNN22U /QZIUZHYJ96iZ+CkPeCrxXVDsd9E5busiD0DY4L7AbkgEXfePE/IHRIBMXhjiCohLUKS n5cjU45lnwtzsXkHjA0lJkz6WTASnScJc60RUE4dNjA6gSeSnsecc5CfALp3nOgFH3wN UnyS/ZB6kNnZRDP9J0U4t5rS1v3yn11D+ERy3OYzZptrOFA73b2bLgU0a7YLIWrb8093 bwPm6HBK1EF9YLt4EL7VutbAmFuhslReMy/p/4p3codYhHzulzMww0idXqoMeVjtTa/s TcCg== X-Gm-Message-State: AOAM531m1ZZCIzjK9wGtrtj5VdatJtRWVOViF39LorzZcUhv/+Y46gQH d+ByTVudasKrWldL71E3+lY= X-Google-Smtp-Source: ABdhPJx3GOqmRRS4uwNy8z0N/+6oBX6gnvCmSAvLiOsTq+RHHfFHKYw85t+5mILf159laLfP29jJ3Q== X-Received: by 2002:adf:e849:0:b0:20d:129c:6a2d with SMTP id d9-20020adfe849000000b0020d129c6a2dmr22650587wrn.533.1653400375642; Tue, 24 May 2022 06:52:55 -0700 (PDT) Received: from orangepi3.mydomain.example ([195.234.74.2]) by smtp.gmail.com with ESMTPSA id w24-20020a7bc758000000b0039747cf8354sm2325870wmk.39.2022.05.24.06.52.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 May 2022 06:52:55 -0700 (PDT) From: Roman Stratiienko X-Google-Original-From: Roman Stratiienko To: mripard@kernel.org, wens@csie.org, jernej.skrabec@gmail.com, airlied@linux.ie, daniel@ffwll.ch, samuel@sholland.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, megi@xff.cz Cc: Roman Stratiienko Subject: [PATCH] drm/sun4i: Fix blend registers corruption for DE2.0/DE3.0 Date: Tue, 24 May 2022 13:52:49 +0000 Message-Id: <20220524135249.49993-1-roman.o.stratiienko@globallogic.com> X-Mailer: git-send-email 2.30.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Corruption happens when plane zpos is updated Example scenario: Initial frame blender state: PLANE_ZPOS =3D {0, 1, 2, 3} BLD_ROUTE =3D {0, 1, 2, 0} BLD_EN =3D {1, 1, 1, 0} New frame commit (Only ZPOS has been changed): PLANE_ZPOS =3D {0->2, 1->0, 2->1, 3} Expected results after plane state update: Z0 Z1 Z2 Z3 BLD_ROUTE =3D {1, 2, 0, 0} BLD_EN =3D {1, 1, 1, 0} What is currently happening: 1. sun8i_vi_layer_enable(enabled=3Dtrue, zpos=3D2, old_zpos=3D0): BLD_ROUTE =3D {1->0, 1, 2->0, 0} BLD_EN =3D {1->0, 1, 1->1, 0} 2. sun8i_ui_layer_enable(enabled=3Dtrue, zpos=3D0, old_zpos=3D1): BLD_ROUTE =3D {0->1, 1->0, 0, 0} BLD_EN =3D {0->1, 1->0, 1, 0} 3. sun8i_ui_layer_enable(enabled=3Dtrue, zpos=3D1, old_zpos=3D2): BLD_ROUTE =3D {1, 0->2, 0->0, 0} BLD_EN =3D {1, 0->2, 1->0, 0} After updating of all the planes we are ending up with BLD_EN[2]=3D0, which makes this channel disabled. To fix this issue, clear BLEND registers before updating the planes and do not clear the old state while processing every plane. Signed-off-by: Roman Stratiienko --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 16 +++++++++++++++ drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 28 ++++---------------------- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 28 ++++---------------------- 3 files changed, 24 insertions(+), 48 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/su= n8i_mixer.c index f5e8aeaa3cdf..004377a000fc 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -248,6 +248,21 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_f= ormat) return -EINVAL; } =20 +static void sun8i_atomic_begin(struct sunxi_engine *engine, + struct drm_crtc_state *old_state) +{ + struct sun8i_mixer *mixer =3D engine_to_sun8i_mixer(engine); + u32 bld_base =3D sun8i_blender_base(mixer); + + regmap_write(engine->regs, + SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), + 0); + + regmap_write(engine->regs, + SUN8I_MIXER_BLEND_ROUTE(bld_base), + 0); +} + static void sun8i_mixer_commit(struct sunxi_engine *engine) { DRM_DEBUG_DRIVER("Committing changes\n"); @@ -299,6 +314,7 @@ static struct drm_plane **sun8i_layers_init(struct drm_= device *drm, } =20 static const struct sunxi_engine_ops sun8i_engine_ops =3D { + .atomic_begin =3D sun8i_atomic_begin, .commit =3D sun8i_mixer_commit, .layers_init =3D sun8i_layers_init, }; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i= /sun8i_ui_layer.c index 7845c2a53a7f..b294a882626a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -24,8 +24,7 @@ #include "sun8i_ui_scaler.h" =20 static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) + int overlay, bool enable, unsigned int zpos) { u32 val, bld_base, ch_base; =20 @@ -44,18 +43,6 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mi= xer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); =20 - if (!enable || zpos !=3D old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - if (enable) { val =3D SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); =20 @@ -291,31 +278,24 @@ static int sun8i_ui_layer_atomic_check(struct drm_pla= ne *plane, static void sun8i_ui_layer_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state =3D drm_atomic_get_old_plane_state(stat= e, - plane); struct sun8i_ui_layer *layer =3D plane_to_sun8i_ui_layer(plane); - unsigned int old_zpos =3D old_state->normalized_zpos; struct sun8i_mixer *mixer =3D layer->mixer; =20 - sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); + sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0); } =20 static void sun8i_ui_layer_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state =3D drm_atomic_get_old_plane_state(stat= e, - plane); struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); struct sun8i_ui_layer *layer =3D plane_to_sun8i_ui_layer(plane); unsigned int zpos =3D new_state->normalized_zpos; - unsigned int old_zpos =3D old_state->normalized_zpos; struct sun8i_mixer *mixer =3D layer->mixer; =20 if (!new_state->visible) { sun8i_ui_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + layer->overlay, false, 0); return; } =20 @@ -328,7 +308,7 @@ static void sun8i_ui_layer_atomic_update(struct drm_pla= ne *plane, sun8i_ui_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); + true, zpos); } =20 static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs =3D= { diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i= /sun8i_vi_layer.c index bb7c43036dfa..4653244b2fd8 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -18,8 +18,7 @@ #include "sun8i_vi_scaler.h" =20 static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, - int overlay, bool enable, unsigned int zpos, - unsigned int old_zpos) + int overlay, bool enable, unsigned int zpos) { u32 val, bld_base, ch_base; =20 @@ -38,18 +37,6 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mi= xer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); =20 - if (!enable || zpos !=3D old_zpos) { - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), - 0); - - regmap_update_bits(mixer->engine.regs, - SUN8I_MIXER_BLEND_ROUTE(bld_base), - SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), - 0); - } - if (enable) { val =3D SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); =20 @@ -395,31 +382,24 @@ static int sun8i_vi_layer_atomic_check(struct drm_pla= ne *plane, static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state =3D drm_atomic_get_old_plane_state(stat= e, - plane); struct sun8i_vi_layer *layer =3D plane_to_sun8i_vi_layer(plane); - unsigned int old_zpos =3D old_state->normalized_zpos; struct sun8i_mixer *mixer =3D layer->mixer; =20 - sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, - old_zpos); + sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0); } =20 static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) { - struct drm_plane_state *old_state =3D drm_atomic_get_old_plane_state(stat= e, - plane); struct drm_plane_state *new_state =3D drm_atomic_get_new_plane_state(stat= e, plane); struct sun8i_vi_layer *layer =3D plane_to_sun8i_vi_layer(plane); unsigned int zpos =3D new_state->normalized_zpos; - unsigned int old_zpos =3D old_state->normalized_zpos; struct sun8i_mixer *mixer =3D layer->mixer; =20 if (!new_state->visible) { sun8i_vi_layer_enable(mixer, layer->channel, - layer->overlay, false, 0, old_zpos); + layer->overlay, false, 0); return; } =20 @@ -432,7 +412,7 @@ static void sun8i_vi_layer_atomic_update(struct drm_pla= ne *plane, sun8i_vi_layer_update_buffer(mixer, layer->channel, layer->overlay, plane); sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, - true, zpos, old_zpos); + true, zpos); } =20 static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs =3D= { --=20 2.30.2