From nobody Thu Mar 28 19:34:51 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2638CC433FE for ; Fri, 20 May 2022 14:32:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350347AbiETOcc (ORCPT ); Fri, 20 May 2022 10:32:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350313AbiETOcQ (ORCPT ); Fri, 20 May 2022 10:32:16 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 564B15AA54; Fri, 20 May 2022 07:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653057134; x=1684593134; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=G0U51dIDeKS9iJa8qsaG7KUn90eS3J81yP2z2SUNTgg=; b=IRh8RbE3rJIvSAKHkuuiR78CduiTvScKV2rZpQ7ELnY+DNu5QHxDJKC7 LGeqRvwWaZfBfRaiFS1lQLnSwRGTv+hIQ00dfXug8SbIujwfU9hHE5Zcx yeMTh6R8vo3YhxFMAFASdlhAjngTeJ/VcVWK2s2pnG7sZs7ehye7Kmuh9 slC+H6EhZjdShIWTKicO+97iTEwykhF8TxfvfEIAB6kbJUpL94ePzF/f4 dF0ISlJZISd2fcJq1/BpOIydn5BzGN7cOB0eRrySChz3Aq4vvf82cozYA VuxiIuA0XWcwzsfmEopD2MgP/BbIny6YeZ2Gpvim5henBv41PE1dYb02T w==; X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="271439339" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="271439339" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:10 -0700 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="662286644" Received: from rhweight-wrk1.ra.intel.com ([137.102.106.43]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:10 -0700 From: matthew.gerlach@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: Matthew Gerlach , Krzysztof Kozlowski Subject: [PATCH v6 1/3] dt-bindings: soc: add bindings for Intel HPS Copy Engine Date: Fri, 20 May 2022 07:32:06 -0700 Message-Id: <20220520143208.1160506-2-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> References: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Matthew Gerlach Add device tree bindings documentation for the Intel Hard Processor System (HPS) Copy Engine. Signed-off-by: Matthew Gerlach Reviewed-by: Krzysztof Kozlowski --- v6: - move from soc/intel to the dma directory - remove unnecessary parent device tree node from example v5: - add Reviewed-by: Krzysztof Kozlowski v4: - move from soc to soc/intel/ v3: - remove unused label - move from misc to soc - remove 0x from #address-cells/#size-cells values - change hps_cp_eng@0 to dma-controller@0 - remote inaccurate 'items:' tag --- .../bindings/dma/intel,hps-copy-engine.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/dma/intel,hps-copy-en= gine.yaml diff --git a/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.ya= ml b/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml new file mode 100644 index 000000000000..6332305db1de --- /dev/null +++ b/Documentation/devicetree/bindings/dma/intel,hps-copy-engine.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2022, Intel Corporation +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/dma/intel,hps-copy-engine.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Intel HPS Copy Engine + +maintainers: + - Matthew Gerlach + +description: | + The Intel Hard Processor System (HPS) Copy Engine is an IP block used to= copy + a bootable image from host memory to HPS DDR. Additionally, there is a + register the HPS can use to indicate the state of booting the copied ima= ge as + well as a keep-a-live indication to the host. + +properties: + compatible: + const: intel,hps-copy-engine + + '#dma-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + dma-controller@0 { + compatible =3D "intel,hps-copy-engine"; + reg =3D <0x00000000 0x00001000>; + #dma-cells =3D <1>; + }; --=20 2.25.1 From nobody Thu Mar 28 19:34:51 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D9DEC433F5 for ; Fri, 20 May 2022 14:32:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350336AbiETOc3 (ORCPT ); Fri, 20 May 2022 10:32:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350304AbiETOcQ (ORCPT ); Fri, 20 May 2022 10:32:16 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63905169E20; Fri, 20 May 2022 07:32:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653057135; x=1684593135; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=7k1HLML8EiHrtt/rP2Re4XQ7J53RxaR/YSDTSazTTZk=; b=g/wkxz54qfWo+hDubXtDAvqJ7IMBHI9zSqhLk8/oPpvqt6vCgPLho/NA 9e+ABIF6HnW5LgFfx3faRcXqTU+8APrja9upx6vFEwEZavaNfJNvN+1xz fJ7QlXWL8T0uX3aS00MRPB/Qq4kAqa1mpkJIyvqMsf2hy7pq0MY9FoS7l 4D5Fx1zGncZQ4WsBa21e+jvaDplZe6AKwUrvaQYujxXW806OGK0sr0fJh FFZ2O5XLTuZMxyKmdHwNTe+YZdZtgDqc0D8xuWKWcMbAHZ1usmJn/CHPO 5TzOJkJ61Xh3bZnpd2I+seHAB3iLl7sQ/vG1nXy7DXDOZtU8R71qhjsJO Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="271439341" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="271439341" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:11 -0700 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="662286645" Received: from rhweight-wrk1.ra.intel.com ([137.102.106.43]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:10 -0700 From: matthew.gerlach@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: Matthew Gerlach , Krzysztof Kozlowski Subject: [PATCH v6 2/3] dt-bindings: intel: add binding for Intel n6000 Date: Fri, 20 May 2022 07:32:07 -0700 Message-Id: <20220520143208.1160506-3-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> References: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Matthew Gerlach Add the binding string for the Agilex based Intel n6000 board. Signed-off-by: Matthew Gerlach Acked-by: Krzysztof Kozlowski --- v3: - added Acked-by --- Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Doc= umentation/devicetree/bindings/arm/intel,socfpga.yaml index 6e043459fcd5..61a454a40e87 100644 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml @@ -18,6 +18,7 @@ properties: items: - enum: - intel,n5x-socdk + - intel,socfpga-agilex-n6000 - intel,socfpga-agilex-socdk - const: intel,socfpga-agilex =20 --=20 2.25.1 From nobody Thu Mar 28 19:34:51 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B2AAC433EF for ; Fri, 20 May 2022 14:32:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350354AbiETOcg (ORCPT ); Fri, 20 May 2022 10:32:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350311AbiETOcQ (ORCPT ); Fri, 20 May 2022 10:32:16 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78E795DA36; Fri, 20 May 2022 07:32:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1653057134; x=1684593134; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Rj7oGtN5LoVAeeqFFjCZt1C5yNvjDB+nOkDtsQLjZRE=; b=FtWgxLgaJYXyx1X4sYVM4XDWkMRi/il0xnJYcUuDsioxlPGim6f3bKsn ooRb1GX/i7RBPYGscIxd03R0R7ObfrTeBVHKCE5Jg/9HUQSQQ9SMdBVcF tr0w5VpyYirAAJY08gFRDmKP/Iw5CaWQ2/yePm8M1BWznHvtXfqDOCynZ sOGzVKaC6redgz/I/yZuMRFJcBkls8kZahoEG0WmC0Mee0HImP+YgbSmc Sc3/0VDNFxJnL+OJLa+FX9o/EtWrN2L6YAmC57/9zT+UZl1Kzi/JcCUz8 5LUI7Oj/1mUrKbnczizjID5XEw466gN+x44EGn7y8aukwke2AH5RUptQD Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10353"; a="271439346" X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="271439346" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:11 -0700 X-IronPort-AV: E=Sophos;i="5.91,239,1647327600"; d="scan'208";a="662286646" Received: from rhweight-wrk1.ra.intel.com ([137.102.106.43]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 May 2022 07:32:10 -0700 From: matthew.gerlach@linux.intel.com To: dinguyen@kernel.org, robh+dt@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: Matthew Gerlach , Krzysztof Kozlowski Subject: [PATCH v6 3/3] arm64: dts: intel: add device tree for n6000 Date: Fri, 20 May 2022 07:32:08 -0700 Message-Id: <20220520143208.1160506-4-matthew.gerlach@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> References: <20220520143208.1160506-1-matthew.gerlach@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Matthew Gerlach Add a device tree for the n6000 instantiation of Agilex Hard Processor System (HPS). Signed-off-by: Matthew Gerlach Acked-by: Krzysztof Kozlowski --- v5: - add Acked-by: Krzysztof Kozlowski v3: - add unit number to memory node - remove unused label - remove 0x from #address-cells/#size-cells values - change hps_cp_eng@0 to dma-controller@0 - remove spi node with unaccepted compatible value v2: - fix copy engine node name - fix compatible field for copy engine - remove redundant status field - add compatibility field for the board - fix SPDX - fix how osc1 clock frequency is set --- arch/arm64/boot/dts/intel/Makefile | 3 +- .../boot/dts/intel/socfpga_agilex_n6000.dts | 66 +++++++++++++++++++ 2 files changed, 68 insertions(+), 1 deletion(-) create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel= /Makefile index 0b5477442263..c2a723838344 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -1,5 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-only -dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=3D socfpga_agilex_socdk.dtb \ +dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) +=3D socfpga_agilex_n6000.dtb \ + socfpga_agilex_socdk.dtb \ socfpga_agilex_socdk_nand.dtb \ socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) +=3D keembay-evm.dtb diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts b/arch/arm6= 4/boot/dts/intel/socfpga_agilex_n6000.dts new file mode 100644 index 000000000000..6231a69204b1 --- /dev/null +++ b/arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts @@ -0,0 +1,66 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021-2022, Intel Corporation + */ +#include "socfpga_agilex.dtsi" + +/ { + model =3D "SoCFPGA Agilex n6000"; + compatible =3D "intel,socfpga-agilex-n6000", "intel,socfpga-agilex"; + + aliases { + serial0 =3D &uart1; + serial1 =3D &uart0; + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + ethernet2 =3D &gmac2; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@0 { + device_type =3D "memory"; + /* We expect the bootloader to fill in the reg */ + reg =3D <0 0 0 0>; + }; + + soc { + bus@80000000 { + compatible =3D "simple-bus"; + reg =3D <0x80000000 0x60000000>, + <0xf9000000 0x00100000>; + reg-names =3D "axi_h2f", "axi_h2f_lw"; + #address-cells =3D <2>; + #size-cells =3D <1>; + ranges =3D <0x00000000 0x00000000 0xf9000000 0x00001000>; + + dma-controller@0 { + compatible =3D "intel,hps-copy-engine"; + reg =3D <0x00000000 0x00000000 0x00001000>; + #dma-cells =3D <1>; + }; + }; + }; +}; + +&osc1 { + clock-frequency =3D <25000000>; +}; + +&uart0 { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&watchdog0 { + status =3D "okay"; +}; + +&fpga_mgr { + status =3D "disabled"; +}; --=20 2.25.1