From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AAEB2C433F5 for ; Sun, 15 May 2022 12:42:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236706AbiEOMm2 (ORCPT ); Sun, 15 May 2022 08:42:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236666AbiEOMmM (ORCPT ); Sun, 15 May 2022 08:42:12 -0400 Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 756141208F for ; Sun, 15 May 2022 05:42:11 -0700 (PDT) Received: by mail-pl1-x62e.google.com with SMTP id n8so12029731plh.1 for ; Sun, 15 May 2022 05:42:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H2M3w87N8EOgC0/E1kAJwjCB00j3VlGn1SiaTA0GCI4=; b=EYf+o3rbH2eW5IncWe6cMBP0B6uHWzKwOKWro70z/747jg3zJZyrOV142C6BB8aU3W 1B6LNQX5Ih2MJuYXjGEgJ4kFwezLdm6OVmil8HLgZRheIjanZNG/TNasOLfaS1o1oyGT xSFdT/LV+t2WLsWc2ceBXUJWgoihZO1vgLtw7+qca4Y3EPMZU8RPT3ODmzy0H8sXtTpa jkzue1yPoAdd51LwBu0KkJ1gD3lkiPER3SFFKTmyxQT32kKz4f1P+rRP1Yh4hB3qoXBc a+BYtZo63lM9v8Mj6qZgGHlwblgIJ3xIcQ0oAbMcH1Njt4ox6d7VxBiQUFovUALOnoQs 2znA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H2M3w87N8EOgC0/E1kAJwjCB00j3VlGn1SiaTA0GCI4=; b=l1kXzCzDc1oHk2MxPWXoWu6mDH8q5wMkb9npuisfqTp7De3G7QEiSeHtK83JdhEoEL P/J6WWNZO1Yv8Ab+hIjZS9IfpgXyrcY/UYIs9CkAfOvPv3k0jK5QgAUDYqLO3Pm1COHi 0X1AEZnhxCXoPldsdwCnGxkmLPMWh2BNVVBp9ugvf6bct1GEJT15iuLCVxcs7cNRm/wV UdWDlPfXKCfjNXvvwtgOnvPwaNdxZmJ7V1EGqvQL19KuS4SLFG9WoVBVBI+yB/Cq9QsA MPGhmK25KT0gvJJnk0uxLd8F+WJ5revn1TWfIqf7m4dAs0OBSSZiOVXgIQ4iJhQ1QXBQ 4f3w== X-Gm-Message-State: AOAM532oPQl/5QFMBRmqbVEfFaZnNQnUUOif4tsoCPGv/FSmxn397VrF QF9rviHSRUd0eFbm7I37aCE3y/ZQucU= X-Google-Smtp-Source: ABdhPJzxBhwVV+BdYvtR01oKfFqfWOB27LkD5kc+uhejdXzN4Ws0fe09+84sGHS105erznma5LCd/Q== X-Received: by 2002:a17:902:8487:b0:15f:b2c:435 with SMTP id c7-20020a170902848700b0015f0b2c0435mr13365405plo.33.1652618530476; Sun, 15 May 2022 05:42:10 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id b13-20020a170902e94d00b0015e8d4eb208sm5054498pll.82.2022.05.15.05.42.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:09 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH 01/13] openrisc: Add gcc machine instruction flag configuration Date: Sun, 15 May 2022 21:41:46 +0900 Message-Id: <20220515124158.3167452-2-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" OpenRISC GCC supports flags to enable the backend to output instructions if they are supported by a target processor. This patch adds configuration flags to enable configuring these flags to tune the kernel for a particular CPU configuration. In the future we could also enable all of these flags by default and provide instruction emulation in the kernel to make these choices easier for users but this is what we provide for now. Signed-off-by: Stafford Horne --- arch/openrisc/Kconfig | 53 ++++++++++++++++++++++++++++++++++++++++++ arch/openrisc/Makefile | 17 ++++++++++++++ 2 files changed, 70 insertions(+) diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index 0d68adf6e02b..ea7eac20911a 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -114,6 +114,59 @@ config OPENRISC_HAVE_INST_DIV default y help Select this if your implementation has a hardware divide instruction + +config OPENRISC_HAVE_INST_CMOV + bool "Have instruction l.cmov for conditional move" + default y + help + This config enables gcc to generate l.cmov instructions when compiling + the kernel which in general will improve performance and reduce the + binary size. + + Select this if your implementation has support for the Class II + l.cmov conistional move instruction. + + Say N if you are unsure. + +config OPENRISC_HAVE_INST_ROR + bool "Have instruction l.ror for rotate right" + default y + help + This config enables gcc to generate l.ror instructions when compiling + the kernel which in general will improve performance and reduce the + binary size. + + Select this if your implementation has support for the Class II + l.ror rotate right instruction. + + Say N if you are unsure. + +config OPENRISC_HAVE_INST_RORI + bool "Have instruction l.rori for rotate right with immediate" + default y + help + This config enables gcc to generate l.rori instructions when compiling + the kernel which in general will improve performance and reduce the + binary size. + + Select this if your implementation has support for the Class II + l.rori rotate right with immediate instruction. + + Say N if you are unsure. + +config OPENRISC_HAVE_INST_SEXT + bool "Have instructions l.ext* for sign extension" + default y + help + This config enables gcc to generate l.ext* instructions when compiling + the kernel which in general will improve performance and reduce the + binary size. + + Select this if your implementation has support for the Class II + l.exths, l.extbs, l.exthz and l.extbz size extend instructions. + + Say N if you are unsure. + endmenu =20 config NR_CPUS diff --git a/arch/openrisc/Makefile b/arch/openrisc/Makefile index 760b734fb822..b446510173cd 100644 --- a/arch/openrisc/Makefile +++ b/arch/openrisc/Makefile @@ -21,6 +21,7 @@ OBJCOPYFLAGS :=3D -O binary -R .note -R .comment -S LIBGCC :=3D $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) =20 KBUILD_CFLAGS +=3D -pipe -ffixed-r10 -D__linux__ +KBUILD_CFLAGS +=3D -msfimm -mshftimm =20 all: vmlinux.bin =20 @@ -38,6 +39,22 @@ else KBUILD_CFLAGS +=3D $(call cc-option,-msoft-div) endif =20 +ifeq ($(CONFIG_OPENRISC_HAVE_INST_CMOV),y) + KBUILD_CFLAGS +=3D $(call cc-option,-mcmov) +endif + +ifeq ($(CONFIG_OPENRISC_HAVE_INST_ROR),y) + KBUILD_CFLAGS +=3D $(call cc-option,-mror) +endif + +ifeq ($(CONFIG_OPENRISC_HAVE_INST_RORI),y) + KBUILD_CFLAGS +=3D $(call cc-option,-mrori) +endif + +ifeq ($(CONFIG_OPENRISC_HAVE_INST_SEXT),y) + KBUILD_CFLAGS +=3D $(call cc-option,-msext) +endif + head-y :=3D arch/openrisc/kernel/head.o =20 libs-y +=3D $(LIBGCC) --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 161E0C433EF for ; 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Sun, 15 May 2022 05:42:13 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Randy Dunlap Subject: [PATCH 02/13] openrisc: Cleanup emergency print handling Date: Sun, 15 May 2022 21:41:47 +0900 Message-Id: <20220515124158.3167452-3-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The emergency print support only works for 8250 compatible serial ports. Now that OpenRISC platforms may be configured with different serial port hardware we don't want emergency print to try to print to non-existent hardware which will cause lockups. This patch contains several fixes to get emergency print working again: - Update symbol loading to not assume the location of symbols - Split the putc print operation out to its own function to allow for different future implementations. - Update _emergency_print_nr and _emergency_print to use the putc function. - Guard serial 8250 specific sequences by CONFIG_SERIAL_8250 - Update string line feed from lf,cr to cr,lf. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/head.S | 148 +++++++++++++++++++++--------------- 1 file changed, 85 insertions(+), 63 deletions(-) diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S index 15f1b38dfe03..b1f3a65c271c 100644 --- a/arch/openrisc/kernel/head.S +++ b/arch/openrisc/kernel/head.S @@ -297,19 +297,23 @@ /* temporary store r3, r9 into r1, r10 */ ;\ l.addi r1,r3,0x0 ;\ l.addi r10,r9,0x0 ;\ - /* the string referenced by r3 must be low enough */ ;\ + LOAD_SYMBOL_2_GPR(r9,_string_unhandled_exception) ;\ + tophys (r3,r9) ;\ l.jal _emergency_print ;\ - l.ori r3,r0,lo(_string_unhandled_exception) ;\ + l.nop ;\ l.mfspr r3,r0,SPR_NPC ;\ l.jal _emergency_print_nr ;\ - l.andi r3,r3,0x1f00 ;\ - /* the string referenced by r3 must be low enough */ ;\ + l.andi r3,r3,0x1f00 ;\ + LOAD_SYMBOL_2_GPR(r9,_string_epc_prefix) ;\ + tophys (r3,r9) ;\ l.jal _emergency_print ;\ - l.ori r3,r0,lo(_string_epc_prefix) ;\ + l.nop ;\ l.jal _emergency_print_nr ;\ - l.mfspr r3,r0,SPR_EPCR_BASE ;\ + l.mfspr r3,r0,SPR_EPCR_BASE ;\ + LOAD_SYMBOL_2_GPR(r9,_string_nl) ;\ + tophys (r3,r9) ;\ l.jal _emergency_print ;\ - l.ori r3,r0,lo(_string_nl) ;\ + l.nop ;\ /* end of printing */ ;\ l.addi r3,r1,0x0 ;\ l.addi r9,r10,0x0 ;\ @@ -1530,65 +1534,99 @@ trampoline_out: l.jr r9 l.nop =20 - /* - * DSCR: prints a string referenced by r3. + * DESC: Prints ASCII character stored in r7 * - * PRMS: r3 - address of the first character of null - * terminated string to be printed + * PRMS: r7 - a 32-bit value with an ASCII character in the first byte + * position. * - * PREQ: UART at UART_BASE_ADD has to be initialized + * PREQ: The UART at UART_BASE_ADD has to be initialized * - * POST: caller should be aware that r3, r9 are changed + * POST: internally used but restores: + * r4 - to store UART_BASE_ADD + * r5 - for loading OFF_TXFULL / THRE,TEMT + * r6 - for storing bitmask (SERIAL_8250) */ -ENTRY(_emergency_print) +ENTRY(_emergency_putc) EMERGENCY_PRINT_STORE_GPR4 EMERGENCY_PRINT_STORE_GPR5 EMERGENCY_PRINT_STORE_GPR6 - EMERGENCY_PRINT_STORE_GPR7 -2: - l.lbz r7,0(r3) - l.sfeq r7,r0 - l.bf 9f - l.nop =20 -// putc: l.movhi r4,hi(UART_BASE_ADD) + l.ori r4,r4,lo(UART_BASE_ADD) =20 +#elif defined(CONFIG_SERIAL_8250) + /* Check UART LSR THRE (hold) bit */ l.addi r6,r0,0x20 1: l.lbz r5,5(r4) l.andi r5,r5,0x20 l.sfeq r5,r6 l.bnf 1b - l.nop + l.nop =20 + /* Write character */ l.sb 0(r4),r7 =20 + /* Check UART LSR THRE|TEMT (hold, empty) bits */ l.addi r6,r0,0x60 1: l.lbz r5,5(r4) l.andi r5,r5,0x60 l.sfeq r5,r6 l.bnf 1b - l.nop + l.nop +#endif + EMERGENCY_PRINT_LOAD_GPR6 + EMERGENCY_PRINT_LOAD_GPR5 + EMERGENCY_PRINT_LOAD_GPR4 + l.jr r9 + l.nop + +/* + * DSCR: prints a string referenced by r3. + * + * PRMS: r3 - address of the first character of null + * terminated string to be printed + * + * PREQ: UART at UART_BASE_ADD has to be initialized + * + * POST: caller should be aware that r3, r9 are changed + */ +ENTRY(_emergency_print) + EMERGENCY_PRINT_STORE_GPR7 + EMERGENCY_PRINT_STORE_GPR9 + + /* Load character to r7, check for null terminator */ +2: l.lbz r7,0(r3) + l.sfeqi r7,0x0 + l.bf 9f + l.nop + + l.jal _emergency_putc + l.nop =20 /* next character */ l.j 2b - l.addi r3,r3,0x1 + l.addi r3,r3,0x1 =20 9: + EMERGENCY_PRINT_LOAD_GPR9 EMERGENCY_PRINT_LOAD_GPR7 - EMERGENCY_PRINT_LOAD_GPR6 - EMERGENCY_PRINT_LOAD_GPR5 - EMERGENCY_PRINT_LOAD_GPR4 l.jr r9 - l.nop + l.nop =20 +/* + * DSCR: prints a number in r3 in hex. + * + * PRMS: r3 - a 32-bit unsigned integer + * + * PREQ: UART at UART_BASE_ADD has to be initialized + * + * POST: caller should be aware that r3, r9 are changed + */ ENTRY(_emergency_print_nr) - EMERGENCY_PRINT_STORE_GPR4 - EMERGENCY_PRINT_STORE_GPR5 - EMERGENCY_PRINT_STORE_GPR6 EMERGENCY_PRINT_STORE_GPR7 EMERGENCY_PRINT_STORE_GPR8 + EMERGENCY_PRINT_STORE_GPR9 =20 l.addi r8,r0,32 // shift register =20 @@ -1600,58 +1638,39 @@ ENTRY(_emergency_print_nr) /* don't skip the last zero if number =3D=3D 0x0 */ l.sfeqi r8,0x4 l.bf 2f - l.nop + l.nop =20 l.sfeq r7,r0 l.bf 1b - l.nop + l.nop =20 2: l.srl r7,r3,r8 =20 l.andi r7,r7,0xf l.sflts r8,r0 - l.bf 9f + l.bf 9f =20 + /* Numbers greater than 9 translate to a-f */ l.sfgtui r7,0x9 l.bnf 8f - l.nop + l.nop l.addi r7,r7,0x27 =20 -8: - l.addi r7,r7,0x30 -// putc: - l.movhi r4,hi(UART_BASE_ADD) - - l.addi r6,r0,0x20 -1: l.lbz r5,5(r4) - l.andi r5,r5,0x20 - l.sfeq r5,r6 - l.bnf 1b - l.nop - - l.sb 0(r4),r7 - - l.addi r6,r0,0x60 -1: l.lbz r5,5(r4) - l.andi r5,r5,0x60 - l.sfeq r5,r6 - l.bnf 1b - l.nop + /* Convert to ascii and output character */ +8: l.jal _emergency_putc + l.addi r7,r7,0x30 =20 /* next character */ l.j 2b l.addi r8,r8,-0x4 =20 9: + EMERGENCY_PRINT_LOAD_GPR9 EMERGENCY_PRINT_LOAD_GPR8 EMERGENCY_PRINT_LOAD_GPR7 - EMERGENCY_PRINT_LOAD_GPR6 - EMERGENCY_PRINT_LOAD_GPR5 - EMERGENCY_PRINT_LOAD_GPR4 l.jr r9 - l.nop - + l.nop =20 /* * This should be used for debugging only. @@ -1676,7 +1695,9 @@ ENTRY(_emergency_print_nr) =20 ENTRY(_early_uart_init) l.movhi r3,hi(UART_BASE_ADD) + l.ori r3,r3,lo(UART_BASE_ADD) =20 +#if defined(CONFIG_SERIAL_8250) l.addi r4,r0,0x7 l.sb 0x2(r3),r4 =20 @@ -1694,9 +1715,10 @@ ENTRY(_early_uart_init) l.addi r4,r0,((UART_DIVISOR) & 0x000000ff) l.sb UART_DLL(r3),r4 l.sb 0x3(r3),r5 +#endif =20 l.jr r9 - l.nop + l.nop =20 .align 0x1000 .global _secondary_evbar @@ -1711,13 +1733,13 @@ _secondary_evbar: =20 .section .rodata _string_unhandled_exception: - .string "\n\rRunarunaround: Unhandled exception 0x\0" + .string "\r\nRunarunaround: Unhandled exception 0x\0" =20 _string_epc_prefix: .string ": EPC=3D0x\0" =20 _string_nl: - .string "\n\r\0" + .string "\r\n\0" =20 =20 /* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D[ page aligned structure= s ]=3D=3D=3D */ --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9D96C433FE for ; Sun, 15 May 2022 12:42:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236753AbiEOMmk (ORCPT ); Sun, 15 May 2022 08:42:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58602 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236677AbiEOMmT (ORCPT ); Sun, 15 May 2022 08:42:19 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D0561274D for ; Sun, 15 May 2022 05:42:18 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id ds11so392355pjb.0 for ; Sun, 15 May 2022 05:42:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LZhkT/STYABSG9JFFXmVnUhiG8e1lb5tF7lB29mjolw=; b=HTEYr+6PFZb39JW1W9CGgOnL+UBCeh8qfaIHP9HxIb8+fup5A+23/EYQbRXR9M2ipS iV1IFYNfg6D72qQ0Th6GWW8Fn6IpEF6vXgfKSsquVLv7XaPL7pxuL9vGARqCDpOsyhwB upIXkH9tPsooCuGm+y0jYJgvjDW7pysBYvaBQ52qzT1ognIvUBd2O572jWgk8FLCSsD9 H2W9PszQLF3DwERFaUsUm4aosAajMnAI/KzDcENl/6nncvnKkSbqfP+lXlwFV9Ml59g8 laY4XsgWMaFS+cQ+Skq0b3oHBaavVI42dRTbx9ebIyFUl8cdUdezBXQinFto1hdsNQD4 fm9g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LZhkT/STYABSG9JFFXmVnUhiG8e1lb5tF7lB29mjolw=; b=hG4FAeFjvYEXek6lgrIgK4xc/MwGxLhgb+i1VmiB/YjO1tl2j/MBpWqUZJeFaUKNx/ 8smi+488XdIjiw6rfIAZCpFk0k8AFTYXwEq5pgc60iyZZ6x9AT0lTcIqbVy6Hfdc7jQF d9jcc+Lb8k6kifBjpwXkSuxW7RykljKH30oET9rcFIwVxRqhU7zE17DY2ap1Q4CebnRq PNH6UCvuoZY9ZvBznXQMx1DwQBARakMpYzwgANygwqvXon4NGRcc55ETg5zW12h6BYps lboRej7GMXi+uEu/trdT148i2BivUm4PXzo7Uub324IYATk4DB1SsSvc9BSgnwwUr+Nm X+FA== X-Gm-Message-State: AOAM532noO9EdEg/lAsbTxr2Ey4Flz8McKhmMM1RqxvB7PBPRmQFaBca WXwJdn48RgbcU8ycfgAGlQZUw/6UfLgahg== X-Google-Smtp-Source: ABdhPJyegSgNu3P86pqOLF041EckwBsKCfaN53VQlGxpKQyqJM4h9bAQ149bfGSkEfyYv+DRpOoQwQ== X-Received: by 2002:a17:90b:391:b0:1df:42e2:ae17 with SMTP id ga17-20020a17090b039100b001df42e2ae17mr2312009pjb.198.1652618537439; Sun, 15 May 2022 05:42:17 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id p21-20020a1709028a9500b0015e8d4eb24asm5058042plo.148.2022.05.15.05.42.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:16 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Randy Dunlap Subject: [PATCH 03/13] openrisc: Add support for liteuart emergency printing Date: Sun, 15 May 2022 21:41:48 +0900 Message-Id: <20220515124158.3167452-4-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This patch adds support for sending emergency print output, such as unhandled exception details, to a liteuart serial device. This is the default device available on litex platforms. If a developer want to use this they should update UART_BASE_ADD to the address of liteuart. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/head.S | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S index b1f3a65c271c..21db50563f97 100644 --- a/arch/openrisc/kernel/head.S +++ b/arch/openrisc/kernel/head.S @@ -1555,6 +1555,17 @@ ENTRY(_emergency_putc) l.movhi r4,hi(UART_BASE_ADD) l.ori r4,r4,lo(UART_BASE_ADD) =20 +#if defined(CONFIG_SERIAL_LITEUART) + /* Check OFF_TXFULL status */ +1: l.lwz r5,4(r4) + l.andi r5,r5,0xff + l.sfnei r5,0 + l.bf 1b + l.nop + + /* Write character */ + l.andi r7,r7,0xff + l.sw 0(r4),r7 #elif defined(CONFIG_SERIAL_8250) /* Check UART LSR THRE (hold) bit */ l.addi r6,r0,0x20 --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5D56C433FE for ; Sun, 15 May 2022 12:42:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236790AbiEOMmp (ORCPT ); Sun, 15 May 2022 08:42:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236698AbiEOMm0 (ORCPT ); Sun, 15 May 2022 08:42:26 -0400 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4501712A9A for ; Sun, 15 May 2022 05:42:22 -0700 (PDT) Received: by mail-pl1-x630.google.com with SMTP id n18so12020876plg.5 for ; Sun, 15 May 2022 05:42:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=URPrkUOTksZy0vkIOlXm6I32VTQjSzL208bMcPxmSHk=; b=Qf2SFi15nUqunuSsHbUvOLDs9jx8EfYTjiHnmxRleIxk/xBIm5RBYHeYAfO61uuwQz Nx7D+WbgMss1gQdJ/eOx5k92CPGxwSXFZ+Y4aZ6ubNX1DJpG3P725ZT4/dpxk/d/kwK7 woSya6rxwp2rUb7YMhfIcYnLjfERr7ZOzLk8ep6bzDdf5d1WvElKtXVybkityqGG9ROl ZoozNwXhbmjbvJeYgkGSR84jbY4x5A4HDFxx2MCjsgc2BMdcmAg1U06pc1LHe3UT/Xgg i4oETKM3qSNwABkBbRJ+8bO5YDnwY+xpv+NcJUw5rXqNJPs1ReyB7hgPpCmnRhL9c4bz ADPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=URPrkUOTksZy0vkIOlXm6I32VTQjSzL208bMcPxmSHk=; b=wIXNY38N/Diy1xue6osrzMI3HvR8e/elbjl4WGNtldoZlAQE7VL6kbEOIOE5JyDEk2 +T8LKmCWhs3DEPq3MGoazid+Vmyot4oLRkZbOzNfPvFCMCtti4a7NxmbA8w2o5qK/IT6 QPtoQHBTfizECPGmw8Xo/Jr5Bv0XjcTMG0pmTJLAiw2t+16W9nyfGfNuww+OKHzRAaHd N3W9kOp5xcjLH3hAJeYYggVhE7ZqMEC5CuwSPHOjWXz/ssACRkqU8LdpFZmxUINaBecV vy7yXNSUX+46yiF5/9k0ZPguilnqFQwYA/J5kH3G4tQnBSM2HY8JMPu2JbwGJI6iwN7i ciAQ== X-Gm-Message-State: AOAM531IG5unVsgtkBVWkIyLXh4bOBlOubgogUJoopiL2lSInAL2PMj8 XPF3bylMQa9fEFjpX3eu/vsRg/mcA/JscQ== X-Google-Smtp-Source: ABdhPJw6rtgLAlUzww8OqkwRf7uyo9N6Q1iShOza3I7ojiZdLV37sJ8d+/UQ4p0TsSZWLhy2rIHjJw== X-Received: by 2002:a17:902:d2c6:b0:161:6e0e:c5e1 with SMTP id n6-20020a170902d2c600b001616e0ec5e1mr2329079plc.139.1652618541066; Sun, 15 May 2022 05:42:21 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id j15-20020a170903024f00b0015eee3ab203sm5157820plh.49.2022.05.15.05.42.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:20 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Andrey Bacherov , Jonas Bonn , Stefan Kristiansson , Randy Dunlap , Petr Mladek , Jessica Yu , Marc Zyngier , Chris Down , Mark Rutland Subject: [PATCH 04/13] openrisc: Add syscall details to emergency syscall debugging Date: Sun, 15 May 2022 21:41:49 +0900 Message-Id: <20220515124158.3167452-5-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When bringing linux on the or1k Marocchino we ran into issues starting init. This patch adds the syscall number and return address to assist tracing syscalls even before strace is able to be used. By default this is all disabled but a developer could adjust the ifdef to enable debugging. Cc: Andrey Bacherov Signed-off-by: Stafford Horne --- arch/openrisc/kernel/entry.S | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index 3ca1b1f490b9..54a87bba35ca 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -601,7 +601,7 @@ UNHANDLED_EXCEPTION(_vector_0xb00,0xb00) */ =20 _string_syscall_return: - .string "syscall return %ld \n\r\0" + .string "syscall r9:0x%08x -> syscall(%ld) return %ld\0" .align 4 =20 ENTRY(_sys_call_handler) @@ -679,15 +679,25 @@ _syscall_return: _syscall_debug: l.movhi r3,hi(_string_syscall_return) l.ori r3,r3,lo(_string_syscall_return) - l.ori r27,r0,1 + l.ori r27,r0,2 l.sw -4(r1),r27 l.sw -8(r1),r11 - l.addi r1,r1,-8 + l.lwz r29,PT_ORIG_GPR11(r1) + l.sw -12(r1),r29 + l.lwz r29,PT_GPR9(r1) + l.sw -16(r1),r29 l.movhi r27,hi(_printk) l.ori r27,r27,lo(_printk) l.jalr r27 - l.nop - l.addi r1,r1,8 + l.addi r1,r1,-16 + l.addi r1,r1,16 +#endif +#if 0 +_syscall_show_regs: + l.movhi r27,hi(show_registers) + l.ori r27,r27,lo(show_registers) + l.jalr r27 + l.or r3,r1,r1 #endif =20 _syscall_check_trace_leave: --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88559C433EF for ; Sun, 15 May 2022 12:43:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236853AbiEOMnA (ORCPT ); Sun, 15 May 2022 08:43:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236686AbiEOMmc (ORCPT ); Sun, 15 May 2022 08:42:32 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD4EC15A1F for ; Sun, 15 May 2022 05:42:25 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id p12so11744707pfn.0 for ; Sun, 15 May 2022 05:42:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6s5Kt+Fz8ODBsnaEn4hTWh6elxNZ/IIbeZw2XTvUCZg=; b=lc4V5YUtnupgMS1c/MZU4qcj6d//G0LcTlJukHwOujvp6HpBir50JhV0btF13sYGaM +ISPLqzfWMDqUFxUmRI+AbO6W5vX00yMekcn+tyQQ+l/jjrIBdhaeGzx/TTFHj5Q1Bbi XUEKteAQBVsAH8CxeUEvgC0rh5qxejXb7V7zHsQzVKnoOIH0OA1v8Eep6sjG5vaatiZY PbtPtG8lid4FqjJhO3AHqHYXLFYzh7UEGvJWCUMkNLQ4rsRuOnXitTiC6ZHqOoduZZyb xEEnrCMWTFZbGjnhy9pIBKl+9qnJqh6l9wXMLska0Ihh1l9cJrFRnUZM738zT/7+wtwr BDWQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6s5Kt+Fz8ODBsnaEn4hTWh6elxNZ/IIbeZw2XTvUCZg=; b=mbb7XwaZecI7cOaoqHrYJfmQsBZDr/KFHpvSucXx6EBkZeNMlqbYOFj4/+JACP2hPQ uwuNl3tskIX5889J1OyFblnYBH2m4ZpX71epdaEIIQ13i9FIaWbm7e/12g/pKcuBTmFc RBRP0huPCRv6jBN/yyBlGhpsdPFlojaB1QBwmHdLHxEJ1jTk1lCm1o3y1Ay+76vZKame eYsisOwXOqmwuMXYlwUMXUdQCtzr+L2kKH2lpM7dfRhNglYMknOe0vcDlMSosr46oJ2b 6CswdCBbsptBw64JsKSrmdqglCBA87Gs88Y5CydGqzg6upaNO6NMtbWSZxKucSkEAGzV mIAg== X-Gm-Message-State: AOAM532WJz6PCoPT9QiIMiC7ATcr51bEqUBwJMUBP1ooUfz+2aIK0R7K 8IERGWxt17AgoT220v5WkOMKgB8+E0/6Nw== X-Google-Smtp-Source: ABdhPJwJ4gVjq1yTaJlnMlKZjQnOGd/oZ8PLVA3fKrwt2RCNYbcWKLfnUWK1/23W4NuqBcXxbOz8xg== X-Received: by 2002:a63:e348:0:b0:3db:7729:c0fe with SMTP id o8-20020a63e348000000b003db7729c0femr11490004pgj.482.1652618544750; Sun, 15 May 2022 05:42:24 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id m14-20020a17090ade0e00b001df4a599a7asm607145pjv.17.2022.05.15.05.42.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:24 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , "Eric W. Biederman" , Andrew Morton , Michael Ellerman , "Russell King (Oracle)" , Kefeng Wang Subject: [PATCH 05/13] openrisc: Pretty print show_registers memory dumps Date: Sun, 15 May 2022 21:41:50 +0900 Message-Id: <20220515124158.3167452-6-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently show registers, print memory dumps character by character and there is no address information, so its a bit difficult to use. For example before a stack dump looks as follows. [ 13.650000] Stack: [ 13.650000] Call trace [ 13.690000] [<(ptrval)>] ? put_timespec64+0x44/0x60 [ 13.690000] [<(ptrval)>] ? _data_page_fault_handler+0x104/0x10c [ 13.700000] [ 13.700000] Code: [ 13.700000] 13 [ 13.700000] ff [ 13.700000] ff [ 13.700000] f9 [ 13.710000] 84 [ 13.710000] 82 [ 13.710000] ff [ 13.710000] bc [ 13.710000] 07 [ 13.710000] fd [ 13.720000] 4e [ 13.720000] 67 [ 13.720000] 84 [ 13.720000] 62 [ 13.720000] ff ... This change updates this to print the address and data a word at time. [ 0.830000] Stack: [ 0.830000] Call trace: [ 0.830000] [<(ptrval)>] load_elf_binary+0x744/0xf5c [ 0.830000] [<(ptrval)>] ? __kernel_read+0x144/0x184 [ 0.830000] [<(ptrval)>] bprm_execve+0x27c/0x3e4 [ 0.830000] [<(ptrval)>] kernel_execve+0x16c/0x1a0 [ 0.830000] [<(ptrval)>] run_init_process+0xa0/0xec [ 0.830000] [<(ptrval)>] ? kernel_init+0x0/0x14c [ 0.830000] [<(ptrval)>] kernel_init+0x7c/0x14c [ 0.830000] [<(ptrval)>] ? calculate_sigpending+0x30/0x40 [ 0.830000] [<(ptrval)>] ret_from_fork+0x1c/0x84 [ 0.830000] [ 0.830000] c1033dbc: c1033dec [ 0.830000] c1033dc0: c015258c [ 0.830000] c1033dc4: c129da00 [ 0.830000] c1033dc8: 00000002 [ 0.830000] c1033dcc: 00000000 [ 0.830000] c1033dd0: c129da00 [ 0.830000] c1033dd4: 00000000 [ 0.830000] c1033dd8: 00000000 [ 0.830000] (c1033ddc:) 00001e04 [ 0.830000] c1033de0: 001501fc [ 0.830000] c1033de4: c1033e68 [ 0.830000] c1033de8: c0152e60 [ 0.830000] c1033dec: c129da5c [ 0.830000] c1033df0: c0674a20 [ 0.830000] c1033df4: c1033e50 [ 0.830000] c1033df8: c00e3d6c [ 0.830000] c1033dfc: c129da5c [ 0.830000] c1033e00: 00000003 [ 0.830000] c1033e04: 00150000 [ 0.830000] c1033e08: 00002034 [ 0.830000] c1033e0c: 001501fc [ 0.830000] c1033e10: 00000000 [ 0.830000] c1033e14: 00150000 [ 0.830000] c1033e18: 0014ebbc [ 0.830000] c1033e1c: 00002000 [ 0.830000] c1033e20: 00000003 [ 0.830000] c1033e24: c12a07e0 [ 0.830000] c1033e28: 00000000 [ 0.830000] c1033e2c: 00000000 [ 0.830000] c1033e30: 00000000 [ 0.830000] c1033e34: 40040000 [ 0.830000] c1033e38: 00000000 [ 0.830000] [ 0.830000] Code: [ 0.830000] c00047a4: 9c21fff8 [ 0.830000] c00047a8: d4012000 [ 0.830000] c00047ac: d4011804 [ 0.830000] c00047b0: e4040000 [ 0.830000] c00047b4: 10000005 [ 0.830000] c00047b8: 9c84ffff [ 0.830000] (c00047bc:) d8030000 [ 0.830000] c00047c0: 03fffffc [ 0.830000] c00047c4: 9c630001 [ 0.830000] c00047c8: 9d640001 [ 0.830000] c00047cc: 84810000 [ 0.830000] c00047d0: 84610004 Now we are also printing a bit of the stack as well as the code. The stack is output to help with debugging. There may be concern about exposing sensitive information on the stack, but we are already dumping all register content which would have similar sensitive information. So I am going ahead as this proves useful in investigation. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/traps.c | 46 ++++++++++++++++++++++++++---------- 1 file changed, 33 insertions(+), 13 deletions(-) diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index 0446a3c34372..f2478bba77b9 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -46,6 +46,14 @@ void print_trace(void *data, unsigned long addr, int rel= iable) (void *) addr); } =20 +static void print_data(unsigned long base_addr, unsigned long word, int i) +{ + if (i =3D=3D 0) + printk("(%08lx:)\t%08lx", base_addr + (i * 4), word); + else + printk(" %08lx:\t%08lx", base_addr + (i * 4), word); +} + /* displays a short stack trace */ void show_stack(struct task_struct *task, unsigned long *esp, const char *= loglvl) { @@ -99,22 +107,36 @@ void show_registers(struct pt_regs *regs) printk("\nStack: "); show_stack(NULL, (unsigned long *)esp, KERN_EMERG); =20 + if (esp < PAGE_OFFSET) + goto bad_stack; + + printk("\n"); + for (i =3D -8; i < 24; i +=3D 1) { + unsigned long word; + + if (__get_user(word, &((unsigned long *)esp)[i])) { +bad_stack: + printk(" Bad Stack value."); + break; + } + + print_data(esp, word, i); + } + printk("\nCode: "); if (regs->pc < PAGE_OFFSET) goto bad; =20 - for (i =3D -24; i < 24; i++) { - unsigned char c; - if (__get_user(c, &((unsigned char *)regs->pc)[i])) { + for (i =3D -6; i < 6; i +=3D 1) { + unsigned long word; + + if (__get_user(word, &((unsigned long *)regs->pc)[i])) { bad: printk(" Bad PC value."); break; } =20 - if (i =3D=3D 0) - printk("(%02x) ", c); - else - printk("%02x ", c); + print_data(regs->pc, word, i); } } printk("\n"); @@ -185,13 +207,11 @@ void nommu_dump_state(struct pt_regs *regs, printk("\nCode: "); =20 for (i =3D -24; i < 24; i++) { - unsigned char c; - c =3D ((unsigned char *)(__pa(regs->pc)))[i]; + unsigned long word; + + word =3D ((unsigned long *)(__pa(regs->pc)))[i]; =20 - if (i =3D=3D 0) - printk("(%02x) ", c); - else - printk("%02x ", c); + print_data(regs->pc, word, i); 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Sun, 15 May 2022 05:42:28 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id o8-20020a656a48000000b003c14af50622sm4957616pgu.58.2022.05.15.05.42.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:27 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Karol Gugala , Mateusz Holenko , Gabriel Somlo , Joel Stanley , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , KP Singh , netdev@vger.kernel.org, bpf@vger.kernel.org Subject: [PATCH 06/13] openrisc: Update litex defconfig to support glibc userland Date: Sun, 15 May 2022 21:41:51 +0900 Message-Id: <20220515124158.3167452-7-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" I have been using a litex SoC for glibc verification. Update the default litex config to support required userspace API's needed for the full glibc testsuite to pass. This includes enabling the litex mmc driver and filesystems used in a typical litex environment. Signed-off-by: Stafford Horne --- arch/openrisc/configs/or1klitex_defconfig | 33 +++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/openrisc/configs/or1klitex_defconfig b/arch/openrisc/conf= igs/or1klitex_defconfig index d695879a4d26..4c0138340bd9 100644 --- a/arch/openrisc/configs/or1klitex_defconfig +++ b/arch/openrisc/configs/or1klitex_defconfig @@ -1,22 +1,55 @@ +CONFIG_SYSVIPC=3Dy +CONFIG_POSIX_MQUEUE=3Dy +CONFIG_CGROUPS=3Dy +CONFIG_NAMESPACES=3Dy +CONFIG_USER_NS=3Dy CONFIG_BLK_DEV_INITRD=3Dy CONFIG_CC_OPTIMIZE_FOR_SIZE=3Dy +CONFIG_SGETMASK_SYSCALL=3Dy CONFIG_EMBEDDED=3Dy CONFIG_OPENRISC_BUILTIN_DTB=3D"or1klitex" +# CONFIG_OPENRISC_HAVE_INST_RORI is not set CONFIG_HZ_100=3Dy +CONFIG_OPENRISC_HAVE_SHADOW_GPRS=3Dy CONFIG_NET=3Dy CONFIG_PACKET=3Dy +CONFIG_PACKET_DIAG=3Dy CONFIG_UNIX=3Dy +CONFIG_UNIX_DIAG=3Dy CONFIG_INET=3Dy +CONFIG_IP_MULTICAST=3Dy +CONFIG_IP_ADVANCED_ROUTER=3Dy +CONFIG_INET_UDP_DIAG=3Dy +CONFIG_INET_RAW_DIAG=3Dy +# CONFIG_WIRELESS is not set +# CONFIG_ETHTOOL_NETLINK is not set CONFIG_DEVTMPFS=3Dy CONFIG_DEVTMPFS_MOUNT=3Dy CONFIG_OF_OVERLAY=3Dy CONFIG_NETDEVICES=3Dy CONFIG_LITEX_LITEETH=3Dy +# CONFIG_WLAN is not set CONFIG_SERIAL_LITEUART=3Dy CONFIG_SERIAL_LITEUART_CONSOLE=3Dy CONFIG_TTY_PRINTK=3Dy +# CONFIG_GPIO_CDEV is not set +CONFIG_MMC=3Dy +CONFIG_MMC_LITEX=3Dy +# CONFIG_VHOST_MENU is not set +# CONFIG_IOMMU_SUPPORT is not set CONFIG_LITEX_SOC_CONTROLLER=3Dy +CONFIG_EXT2_FS=3Dy +CONFIG_EXT3_FS=3Dy +CONFIG_MSDOS_FS=3Dy +CONFIG_VFAT_FS=3Dy +CONFIG_EXFAT_FS=3Dy CONFIG_TMPFS=3Dy +CONFIG_NFS_FS=3Dy +CONFIG_NFS_V3_ACL=3Dy +CONFIG_NFS_V4=3Dy +CONFIG_NLS_CODEPAGE_437=3Dy +CONFIG_NLS_ISO8859_1=3Dy +CONFIG_LSM=3D"lockdown,yama,loadpin,safesetid,integrity,bpf" CONFIG_PRINTK_TIME=3Dy CONFIG_PANIC_ON_OOPS=3Dy CONFIG_SOFTLOCKUP_DETECTOR=3Dy --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CB4EC433F5 for ; Sun, 15 May 2022 12:42:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236716AbiEOMmv (ORCPT ); Sun, 15 May 2022 08:42:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236691AbiEOMme (ORCPT ); Sun, 15 May 2022 08:42:34 -0400 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C247217E00 for ; Sun, 15 May 2022 05:42:32 -0700 (PDT) Received: by mail-pg1-x52b.google.com with SMTP id h186so9056459pgc.3 for ; Sun, 15 May 2022 05:42:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ikZ+PR/EklJmOrxEmrNGimc9Z26aJRLTxGu7euJ5K94=; b=ksSpxTNN13tMggvaejsEI+GQ4F41SIaUMtsGc/Fbqvm0NY7LV1vR2jqG1m7GoxPGku PhKShLPS2YaFrCkWF6qzNE5E8jWTrJU+moMax9b1xoFBY6SRdkK8bVp2Zc/G/nSySbjW liOdoPCmqor7GMxuSCOuApzqyuWuAqnY0sdvxKZMccFR3frD5U5yhzHbEI5vUEAwePLj 7NigwZjZe3z2aNqzabMoA3gJKXQB748Hy11fqo1cWv8xhly2r4khbd9fxdgzD7LDLZow RisaBQqRaleTGpSUZAdrxcMWrZ4s18sPFISuodoVqegDk4/ERIEhkV9Mf2goI4bvRbnb pyFQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ikZ+PR/EklJmOrxEmrNGimc9Z26aJRLTxGu7euJ5K94=; b=thop4apizQEV9hNUxEE6rnmvxCYs4iLDKq3E5+2Xg8f7uhzEYK2xEqm0ixYXhsJ5FS eO3xYju3ZZUEhFawsuc54tbC0ixE2MTso/gCCmCB9ObfZgUVH4ySBVGlF4MsGFRxUD1K L5d/NeXPqA6plExsgewXYI3uS5RGRNF4bmtDUG3YTlpwI9Y+TmtOverxXZYFc2mxD3w5 FidalKtYhIwYWNQRl9MKNtdlUY5iUMSGF0Tx1xrfiqxJ0eZCOwWMJjbcQbnna03GURBL 7zseRo+EayVZ7rxnjnAliy5i5s0HVIZElY7lKddmv/jlDCbrir0hrcoO5xq7jiC5pRfv 0OUA== X-Gm-Message-State: AOAM530uyOmD464HldUuu6XeSZW8BqNCcfFCZUKC1661+j4Tcx38CXGA lI2ipTgqnipyoVCKA+ALH4gerXregzIqyQ== X-Google-Smtp-Source: ABdhPJwTNC03YPfYWQHf0N8lARTn79n+/NuIFfhPaElPQM+ruE5EgRmd23V1wPxuw7p6lSSipEta1Q== X-Received: by 2002:a63:d34d:0:b0:3db:a518:1ff8 with SMTP id u13-20020a63d34d000000b003dba5181ff8mr9206517pgi.593.1652618552046; Sun, 15 May 2022 05:42:32 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id t19-20020a170902b21300b0015ef63f2382sm5054670plr.231.2022.05.15.05.42.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:31 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , "Eric W. Biederman" , Andrew Morton , "Russell King (Oracle)" , Kefeng Wang Subject: [PATCH 07/13] openrisc/traps: Declare file scope symbols as static Date: Sun, 15 May 2022 21:41:52 +0900 Message-Id: <20220515124158.3167452-8-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Sparse was reporting the following warnings: arch/openrisc/kernel/traps.c:37:5: warning: symbol 'kstack_depth_to_pri= nt' was not declared. Should it be static? arch/openrisc/kernel/traps.c:39:22: warning: symbol 'lwa_addr' was not = declared. Should it be static? arch/openrisc/kernel/traps.c:41:6: warning: symbol 'print_trace' was no= t declared. Should it be static? The function print_trace and local variables kstack_depth_to_print and lwa_addr are not used outside of this file. This patch marks them as static. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/traps.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index f2478bba77b9..9e0937eb31ca 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -34,11 +34,11 @@ #include #include =20 -int kstack_depth_to_print =3D 0x180; +static int kstack_depth_to_print =3D 0x180; int lwa_flag; -unsigned long __user *lwa_addr; +static unsigned long __user *lwa_addr; =20 -void print_trace(void *data, unsigned long addr, int reliable) +static void print_trace(void *data, unsigned long addr, int reliable) { const char *loglvl =3D data; =20 --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED46FC433EF for ; Sun, 15 May 2022 12:43:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236761AbiEOMnK (ORCPT ); Sun, 15 May 2022 08:43:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236702AbiEOMmg (ORCPT ); Sun, 15 May 2022 08:42:36 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 234D211C0C for ; Sun, 15 May 2022 05:42:36 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id cu23-20020a17090afa9700b001d98d8e53b7so11231993pjb.0 for ; Sun, 15 May 2022 05:42:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/YxdBnzui3ni5Jh3oFs5foUUYY4daAUO1PEkpPdCqlo=; b=CUCIL+9IqRDN2tJAKVtzSzg97nX5O/JVAGHwOTY5DEpkHUytrXA/oXzlwAwXb2WBb8 8N2nRud02vIqlwXUP4YZnnsD9AxZu8iQtGS0pp5/8XppjqZnmaE07Wz82rf+a+DSfpBt ekv1ybRFgnpr6UTANmIfRECHA1i/xQ91h9vPuP/t/pCZxhtGF74ECwz0v0/Jb4den/pl B2ymDTQk0nfTvlwnAMloyqPyY3m/ADG/xu5L98Zldy5/WwcpmZd6SsdGC2mICJOlk7rc tHvBznNJt1polk4ODdmghCrvTMXZVeA5uN4J9yIr5meyA9JA1Yk88zBWmxmOxcmEmSBH nVoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/YxdBnzui3ni5Jh3oFs5foUUYY4daAUO1PEkpPdCqlo=; b=M4vMQDulvNAxcSieL1zKyWKhJRnp6ZI9szLio2DCrIF/tZ4/j2LRH265XeVmyGCbW2 X1Qqo5pCdGWt6IT8a+ITAVqFLSFFQMeZiWPNo11p+nd+XoahDrk4q0xfqcHMbHvqTXGu MFhTU3jH1S/MwalQjkYVyvqmpWp74xZv5Sbr3zm7xW3JpTEsQ7pBNQzZggG6OrLWkLfG FRdYQnhWqxF6Vm3Hd7S18/R/wxVvXzvdwlRhamKwx3O54XkquR0NUEb4LeDocBD5cgpj GRDOYSe6QZrIRmcaYTllz8f92jBlzJ8UiyknMG816vOUiuTiIKB+YqBEvz+OTbLKpSX+ ayFw== X-Gm-Message-State: AOAM530zrFgP4ckzEu/FN7DxZdRey5jXXTi6QKsdtWkCVMiApx4WjiCw hzSPCMtY54z+z9OsUNAJCeVWetF8SyP0og== X-Google-Smtp-Source: ABdhPJwll4DIMNy2JuWm6ejdna8WNoX3+eiQHDVN4fLW8HnaNS1u+hk/bQv2o6r610cu+5jGCXD9vQ== X-Received: by 2002:a17:903:240f:b0:156:8e81:a0a3 with SMTP id e15-20020a170903240f00b001568e81a0a3mr13027370plo.13.1652618555086; Sun, 15 May 2022 05:42:35 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id c9-20020aa78e09000000b0050dc76281ebsm4945390pfr.197.2022.05.15.05.42.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:34 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , "Eric W. Biederman" , Michael Ellerman , Andrew Morton , "Russell King (Oracle)" , Kefeng Wang Subject: [PATCH 08/13] openrisc/traps: Remove die_if_kernel function Date: Sun, 15 May 2022 21:41:53 +0900 Message-Id: <20220515124158.3167452-9-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This was noticed when I saw this warning: arch/openrisc/kernel/traps.c:234:6: warning: no previous prototype for = 'die_if_kernel' [-Wmissing-prototypes] 234 | void die_if_kernel(const char *str, struct pt_regs *regs, long = err) | ^~~~~~~~~~~~~ The die_if_kernel function is not used in the OpenRISC port so remove it. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/traps.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index 9e0937eb31ca..99cd2e6f8873 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -235,15 +235,6 @@ void __noreturn die(const char *str, struct pt_regs *r= egs, long err) make_task_dead(SIGSEGV); } =20 -/* This is normally the 'Oops' routine */ -void die_if_kernel(const char *str, struct pt_regs *regs, long err) -{ - if (user_mode(regs)) - return; - - die(str, regs, err); -} - void unhandled_exception(struct pt_regs *regs, int ea, int vector) { printk("Unable to handle exception at EA =3D0x%x, vector 0x%x", --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 801F8C433F5 for ; Sun, 15 May 2022 12:43:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236894AbiEOMnR (ORCPT ); Sun, 15 May 2022 08:43:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59480 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236751AbiEOMmk (ORCPT ); Sun, 15 May 2022 08:42:40 -0400 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A80413F75 for ; Sun, 15 May 2022 05:42:39 -0700 (PDT) Received: by mail-pl1-x62c.google.com with SMTP id q4so12000384plr.11 for ; Sun, 15 May 2022 05:42:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g7Q4DIyBFdkOfQfLesIacT6b2x85qOReA4ewSFpfUcU=; b=Lo6scrQ+k9iHe4huyVLvgU/wxxBjA9bU8Ih1wmkpJo0Ev0Rlpkd25v1GKuGMlqkX92 WhVHWnsm2nWCy3gNU+y1xjk2pto+37bnLdMW3kD0/lEbz2M1JP0suKY4CLM1rvk5Z7CH 2xadzZOzkWj/MD3u73lOVz3iUthzEzb2rkQqezefryB2ovt/hkV8mbVLG5h9JNNjnFfA poh54JesuZhk4+fKKyORu0rR0HlP82O00aymUyUQgEH6UwcmkHr6TLdlcK7+Y/ZifE1+ 4EV+dlTkeiLs0q8Sdvbh5mntq3H9ULNfMyNdQb4C8vzJBK2aS0p44umitDyzX+pfs9u0 A9+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g7Q4DIyBFdkOfQfLesIacT6b2x85qOReA4ewSFpfUcU=; b=32CvXkMN7blI2lZmTLArjFsg4bXuk7Sfm1WQ2WXORLozkueesm0Bp8/PPV2M3/zIlm kq42q7Lk9i4n3aJIMRJUN/ACUyDZeP8dlVvdTsdaXt+C5dVgq6udGAVX0sGkXUfqEGoZ mCnY6VBUWu4ohkdx/VD0uqOIm40+vsoFlvO/8lJqWYC8qTh1erRcr5Jsnf+Xha0o3JuL FjaBv9rIfINmvmd1/N8G8sAlBG6BunOggTX3NYWLOGaKLVe4kz63aTfXO0/Y1VaqFYxo qlpGah2CQEVKdvzYvtocau7vlBJBmLMIpAqTkZ2SdoU+Dwy0QbNiMMYpSDVdoFCdaeOx eK5A== X-Gm-Message-State: AOAM533Xmw8cjWEyEZR/rtv1AcnOL9wgKdDSZ6qJo9NAJwiA0W9lT3NT 3KH++X/H0QjKNxpuHl5mX7GGFFVlgVMZCg== X-Google-Smtp-Source: ABdhPJwEa15HWk3Et/kczvNW94n1lSxp/nf7itF2ZI5UFYnj6sBZE9pkT79HfOEXd7/OGPTL5nmjyw== X-Received: by 2002:a17:902:f78d:b0:14d:522e:deb3 with SMTP id q13-20020a170902f78d00b0014d522edeb3mr13304884pln.173.1652618558263; Sun, 15 May 2022 05:42:38 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id f38-20020a631026000000b003c14af5062csm4751375pgl.68.2022.05.15.05.42.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:37 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , "Eric W. Biederman" , Kefeng Wang , Andrew Morton , Michael Ellerman Subject: [PATCH 09/13] openrisc/traps: Declare unhandled_exception for asmlinkage Date: Sun, 15 May 2022 21:41:54 +0900 Message-Id: <20220515124158.3167452-10-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Noticed this when workin on warnings. As unhandled_exception is used in entry.S we should attribute it with asmlinkage. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/traps.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/openrisc/kernel/traps.c b/arch/openrisc/kernel/traps.c index 99cd2e6f8873..fd9a0f2b66c4 100644 --- a/arch/openrisc/kernel/traps.c +++ b/arch/openrisc/kernel/traps.c @@ -235,7 +235,7 @@ void __noreturn die(const char *str, struct pt_regs *re= gs, long err) make_task_dead(SIGSEGV); } =20 -void unhandled_exception(struct pt_regs *regs, int ea, int vector) +asmlinkage void unhandled_exception(struct pt_regs *regs, int ea, int vect= or) { printk("Unable to handle exception at EA =3D0x%x, vector 0x%x", ea, vector); --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7E3FC433F5 for ; Sun, 15 May 2022 12:43:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236810AbiEOMny (ORCPT ); Sun, 15 May 2022 08:43:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59524 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236851AbiEOMnA (ORCPT ); Sun, 15 May 2022 08:43:00 -0400 Received: from mail-pg1-x535.google.com (mail-pg1-x535.google.com [IPv6:2607:f8b0:4864:20::535]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B07622E9DA for ; Sun, 15 May 2022 05:42:43 -0700 (PDT) Received: by mail-pg1-x535.google.com with SMTP id a191so11713032pge.2 for ; Sun, 15 May 2022 05:42:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JuZm0iyeNXKvBw7CRNXXxjER+lmIsZfs9nGcE1KNIMA=; b=HnBtgyglcpAF47QDC7sGEQOlZ8dA2kdM7Qk0V0OskPV+UUv2/Fg0VNfgf/3BP67ae+ EWEvu4jP9ZYPFJU1Jl+KsBypKmSHGBT2LbO3zFpUG3sUQMl8Pen4x3klqlH0lkpX7CIZ 2QZhW569rFu2lUyA/d6tuBXR7dc3pNrTuLXxqpq+bh2xDns6v0/abZpuEnLnxw5ztYy2 oOByW3u1YuNsxat9rJzzWc0WJwNW2mWI1UcpkqpR2sAZVCUjFYfXoTZLMY06brZlH7yO WpSultNnn/SOkiYM04ODjT6uK9n+oQJpB+TuedLmW3/ohjD8K4r8y0MZnQhm9l1WPvZW 34MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JuZm0iyeNXKvBw7CRNXXxjER+lmIsZfs9nGcE1KNIMA=; b=6SG+WtyoeADEj15HFlJQZrG60+u9xi7PZ73vZClwa+5NLdb+Jm1tk+n5xJQqjg/CAI Zi9hB6TF644rZ4ikN63fqRowMHSPtNrOD86/k0GJBKBpkhQxYETb7gtlr2Z0AtC1+smR IdiN828P1+oWUQUKnbvPa0SGNOOLkHfOilWkcJwJFyAb1xgNjKO9YaRPjlU5/b9fZnhP XyAB0wCCz1/J5FrGmovMyclBjLdw4bjRAfEXEeGrmghC1GdcYCIPnWK3MhnAScttvjdF TgNUvggKEVvqLH8+r8POb6l6/Rk0rGF1FoD3M/Zwj32OpAGpra17vYZ1NEADi/xU2igV Aw9g== X-Gm-Message-State: AOAM533ZLm8oFnpCBqDh6J5Q0qxI1D/1tam8Ho1+DJkAmeAnpWhtSpQG 2I9dyyvnfFZWqAgBjq/MumOAQHndRmijIw== X-Google-Smtp-Source: ABdhPJzqvncFRUIuRAfj62LKQruwUlpe0XsMKkrLRlM+M8DkM4ubr+ddMYmcks46kDiHJU3mIwGNFQ== X-Received: by 2002:a63:491f:0:b0:3f2:6b20:fa10 with SMTP id w31-20020a63491f000000b003f26b20fa10mr1000385pga.531.1652618561911; Sun, 15 May 2022 05:42:41 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id k1-20020a637b41000000b003dafe6e72ffsm4844337pgn.88.2022.05.15.05.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:41 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Randy Dunlap , Geert Uytterhoeven Subject: [PATCH 10/13] openrisc/time: Fix symbol scope warnings Date: Sun, 15 May 2022 21:41:55 +0900 Message-Id: <20220515124158.3167452-11-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Spare reported the following warnings: arch/openrisc/kernel/time.c:64:1: warning: symbol 'clockevent_openrisc_= timer' was not declared. Should it be static? arch/openrisc/kernel/time.c:66:6: warning: symbol 'openrisc_clockevent_= init' was not declared. Should it be static? This patch fixes by: - Add static declaration to clockevent_openrisc_timer as it's used only in this file. - Add include for asm/time.h for openrisc_clockevent_init declaration. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/time.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c index 6d18989d63d0..8e26c1af5441 100644 --- a/arch/openrisc/kernel/time.c +++ b/arch/openrisc/kernel/time.c @@ -23,6 +23,7 @@ #include =20 #include +#include =20 /* Test the timer ticks to count, used in sync routine */ inline void openrisc_timer_set(unsigned long count) @@ -61,7 +62,7 @@ static int openrisc_timer_set_next_event(unsigned long de= lta, * timers) we cannot enable the PERIODIC feature. The tick timer can run = using * one-shot events, so no problem. */ -DEFINE_PER_CPU(struct clock_event_device, clockevent_openrisc_timer); +static DEFINE_PER_CPU(struct clock_event_device, clockevent_openrisc_timer= ); =20 void openrisc_clockevent_init(void) { --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 336A1C433F5 for ; Sun, 15 May 2022 12:44:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236808AbiEOMoC (ORCPT ); Sun, 15 May 2022 08:44:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236783AbiEOMnl (ORCPT ); Sun, 15 May 2022 08:43:41 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D693B1262F for ; Sun, 15 May 2022 05:42:46 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id l20-20020a17090a409400b001dd2a9d555bso11860364pjg.0 for ; Sun, 15 May 2022 05:42:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GLuZhVjtGK5TbXwgi8Odrp2p8Tu7QkWjhdCCk7ovaas=; b=fHtUivnJoBf3l4Gf5biNPi9eZWy15SghJR1BJwRCBbwC7wMdjWc/qEjslDCqaSNuTu h52U9exkwSZj6vYxkXcLULEg4OFBLPXo89w/bT2QGVDandmJsW0Yy2M8qro0mjRC0ia5 FdwD52GptLNwKXd/ssnRQy5zjgdlOb87+AeGdq04w+DWssKGTs8D/rcPVdY2Ygz/RyfZ BiX/N1hvuDm64MZ9kVjwYOWb4gjHA0FK70BOPAkFdW+9WDSNigqjlBowPo6dAHXgiTMj TaOYMNDu52zdlH5+DjwOHW1hECQSAhWnxB3Q6WdHXaTr2g/+kOS35KwTvxaZkr8OV924 /kfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GLuZhVjtGK5TbXwgi8Odrp2p8Tu7QkWjhdCCk7ovaas=; b=h5uV2dU+mas0+ovarxJ2D836PaiQReRD499a4ztF7wkF5cKtOgSxmP5qzcz3c7GL+m 8BJ3fD1cY+K23Acr6UU28sOXi5VUYBo3anF/XfYvnZ/ux+CRnfyGJoTnEjVbJ9KMnn4D yL6jMjfrKEm6hrznVkZ1qGAMp/zWusDlXWb4PKuyyMZtuI+ul3O+Hg2KFxRLN4Qo6O6m bYfHoarh7GT8/W6BqsU8ViRYvHUPN5I+gnCJSrcfseUeGNbwEF7Sl1hPaF3p5nIGlMPF O9xZYfCFVZ+HsIcDHJRcsvdOrGW3/iSVFqhTZ0C7p5R/TcCmEMJ3IC/3J0jtDkMbYk9I JQZA== X-Gm-Message-State: AOAM531Bn3liTwvTNQKFydJwjG7wbeLYGmeRfTs6BD0+IDe5iMbqOypH b2YFcd+NKzmsi2bJg14qXmCc5ylx2HzvQQ== X-Google-Smtp-Source: ABdhPJyfDRaC1XGZwXsUE0diCH1PbRApttn1a39/4+JR6GneKpJfCrvz3Sa/Jrpxp8+gb+crg+a9jQ== X-Received: by 2002:a17:90b:4b4b:b0:1dc:8724:3f75 with SMTP id mi11-20020a17090b4b4b00b001dc87243f75mr25340838pjb.178.1652618565106; Sun, 15 May 2022 05:42:45 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id t12-20020a17090a950c00b001dbe7ccdd4dsm6551557pjo.10.2022.05.15.05.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:44 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson Subject: [PATCH 11/13] openrisc/delay: Add include to fix symbol not declared warning Date: Sun, 15 May 2022 21:41:56 +0900 Message-Id: <20220515124158.3167452-12-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add asm/timex.h include for read_current_timer prototype. Sparse reporting the following warning: arch/openrisc/lib/delay.c:23:5: warning: symbol 'read_current_timer' wa= s not declared. Should it be static? Signed-off-by: Stafford Horne --- arch/openrisc/lib/delay.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/openrisc/lib/delay.c b/arch/openrisc/lib/delay.c index 036ae57180ef..5e89e4131304 100644 --- a/arch/openrisc/lib/delay.c +++ b/arch/openrisc/lib/delay.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FD44C433F5 for ; Sun, 15 May 2022 12:44:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236909AbiEOMn6 (ORCPT ); Sun, 15 May 2022 08:43:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59862 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236937AbiEOMnl (ORCPT ); Sun, 15 May 2022 08:43:41 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1CAED2EA17 for ; Sun, 15 May 2022 05:42:49 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id p12so11744707pfn.0 for ; Sun, 15 May 2022 05:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=E6nKYG584PAtoQ8/jvqpBx36KvgGo8qJoQWKQdOpBKU=; b=pS/jHvHWwnFrMXvw/NKO7jVf7rgAWmrSVIhik0j+dafXTZMkW49m+3oCGrFQqDzbos fEEJzmYybyqQFqXj6DKvTAXpZ59cC2trVDVaFT3N2OPV98AUho+qv5H2EI3gdseGYAc9 dC/I5NtukRdxetaDlvbcln8bqw9kuGMdgQfjUQ50erk4ehtML9NK0f+DvIKGzaceJh08 whIQDqUpRrBI1AoXyeTdk0QEn6KMdAiUODtkefc4xfMwDrHiwgFBrdxFfDK+hACaNZqM z7AC5DtDZr+ue5N5p0LbiL8fEqedqJHRk98LeinCbc0Wsv2OeWheFz/FdlTzn8F6fvrq 9jhw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=E6nKYG584PAtoQ8/jvqpBx36KvgGo8qJoQWKQdOpBKU=; b=afZYSkyqAC/ZU0BnK8IfLg9/Z3wlnHO45VgOsfzfsbQLh3z5lYFTGbeh27l34fvZK3 dNYXx/GPTeSVq0BdBqUcyQr4TImlW1sUb8tgV4odZ/j2RVZIjIMfCk3ie+wWQvIgHm9y 4aa4UwNDqU+BxFTjvKR+KJSPe4Voyt0F4E8N6lpaElL+zK9pwedCHHjSfYl3awLlL5K5 +9KaN/YwCuIopsn1ivqbib3eikKzQ+Hrhhl/UHX1niD0jl0aWbSeoMctMaKLUl9togDt TsSIO4WOJl8R+sq+E9kVq0ojcgpQmKgJ7e+WIuGAlLhgZiFaBKjdFCw4H38x8gAVoT4J L2ng== X-Gm-Message-State: AOAM530AqAxdhlV6x3t6rLvFjK+CmKNMR1myJphWCzpHhNgHyGfznJXs OVZe53CeDoWcVJQXdOB1LKm50Q/bBgzpkQ== X-Google-Smtp-Source: ABdhPJzK3nMYwucViE+6UcrtAYIhYH8yd+pU+/ungG8bLNSFY/C8q7rakJXXY7nDCSbGIll7b+Lapw== X-Received: by 2002:a65:6a16:0:b0:39d:4f3:67e6 with SMTP id m22-20020a656a16000000b0039d04f367e6mr11720141pgu.84.1652618568182; Sun, 15 May 2022 05:42:48 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id c3-20020a170903234300b0015e8d4eb1f6sm5209876plh.64.2022.05.15.05.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:47 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Andrew Morton , Randy Dunlap , "Eric W. Biederman" , Qi Zheng Subject: [PATCH 12/13] openrisc/fault: Fix symbol scope warnings Date: Sun, 15 May 2022 21:41:57 +0900 Message-Id: <20220515124158.3167452-13-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Sparse reported the following warning: arch/openrisc/mm/fault.c:27:15: warning: symbol 'pte_misses' was not de= clared. Should it be static? arch/openrisc/mm/fault.c:28:15: warning: symbol 'pte_errors' was not de= clared. Should it be static? arch/openrisc/mm/fault.c:33:16: warning: symbol 'current_pgd' was not d= eclared. Should it be static? This patch fixes these by: - Remove unused pte_misses and pte_errors counters which are no longer used. - Add asm/mmu_context.h include to provide the current_pgd declaration. Signed-off-by: Stafford Horne --- arch/openrisc/mm/fault.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/openrisc/mm/fault.c b/arch/openrisc/mm/fault.c index 80bb66ad42f6..516cba14dec9 100644 --- a/arch/openrisc/mm/fault.c +++ b/arch/openrisc/mm/fault.c @@ -18,15 +18,13 @@ #include =20 #include +#include #include #include =20 #define NUM_TLB_ENTRIES 64 #define TLB_OFFSET(add) (((add) >> PAGE_SHIFT) & (NUM_TLB_ENTRIES-1)) =20 -unsigned long pte_misses; /* updated by do_page_fault() */ -unsigned long pte_errors; /* updated by do_page_fault() */ - /* __PHX__ :: - check the vmalloc_fault in do_page_fault() * - also look into include/asm/mmu_context.h */ --=20 2.31.1 From nobody Fri May 8 01:39:09 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 124ABC433F5 for ; Sun, 15 May 2022 12:44:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236929AbiEOMoz (ORCPT ); Sun, 15 May 2022 08:44:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60608 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236959AbiEOMnm (ORCPT ); Sun, 15 May 2022 08:43:42 -0400 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EF29F2EA3B for ; Sun, 15 May 2022 05:42:52 -0700 (PDT) Received: by mail-pl1-x633.google.com with SMTP id s14so12023583plk.8 for ; Sun, 15 May 2022 05:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YyxbfrF93QriCFR9e9/Ieq2jTtQBkK6LoG1jr7zyJxk=; b=U4Co/+AWH+Ddsj+Q3im68TyC5N9SC0cFTsnznuJFxX/IyRuGJJQYvXXTz6iIE5+vem H+EVLemfG7PuYiboxjaQNH//2vdhQSqBBeGk8cn/C+EREkfxrVY7g4ABXEeldgIS7Ykb iDSe1HAlyhvep86v+yfc+G4juohyWhoQ1owOBShDac2HcLZlkANNdKK2CqOvCwO+Pz6V EHdXeR/wC+d2M4vMbGf1JMDRs5eNlGAnPD8BgmZkWGjeUQyBpZOUY7oKCkUOcse1rs3s jYFMGjRNaTYflTH5Ri0hCJAqZHN1/7y53N6sy8JrOJJ68F0fRPrisPYMw+zbEpA99Hjs HMGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YyxbfrF93QriCFR9e9/Ieq2jTtQBkK6LoG1jr7zyJxk=; b=WaczfPMogF6NfCkrhzDfJ8dof0eecnsB8r28Ij+QEXFP4HQ7FC+XMHvPxRkWSxfJ4/ bZzAvCDKzdWYCwEP/4yHiQctbWyIZXO2+dVtknvWmXNFTCDkV/TGoMM05ioBNSgjFMIp tg3BP7eLPUn0aJfSoLyx9U0RlvklWJJeD5JcV4MUiKsb/hlpZGLPzR6U3zL3pmN5ZHT1 dtfagfHJB6JPgHH+SSA53NUoqxTEkdfbfRDJfHVv6gZrFzMFtAV+11d3px9Ghh6imree Qj7PkcVKWZgQMuCfLJgAg8xZbyRHgRuuFE6mEw/6Kpv5hrN7OScnrvVXarAeN1yYimuh l/Ng== X-Gm-Message-State: AOAM531EnvxGZMYtk0oj24AOqWp9KbQSAlystAqWF4DF57lZJkduN3vx OT8q7lh+bEA7R8ZRAhNBx0crOq5bdkDLoQ== X-Google-Smtp-Source: ABdhPJwv2LEfSzfEbP9zNb35/Pe2z5GG2Xehf3U8lWg9Vput1lt9MRyGSG/JsXoyvckZIL5sLBZssA== X-Received: by 2002:a17:902:f682:b0:15e:951b:8091 with SMTP id l2-20020a170902f68200b0015e951b8091mr13108157plg.106.1652618571891; Sun, 15 May 2022 05:42:51 -0700 (PDT) Received: from localhost ([2409:10:24a0:4700:e8ad:216a:2a9d:6d0c]) by smtp.gmail.com with ESMTPSA id bc12-20020a170902930c00b0015e8d4eb20esm5069369plb.88.2022.05.15.05.42.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 05:42:51 -0700 (PDT) From: Stafford Horne To: LKML Cc: Openrisc , Stafford Horne , Jonas Bonn , Stefan Kristiansson , Randy Dunlap Subject: [PATCH 13/13] openrisc: Remove unused IMMU tlb workardound Date: Sun, 15 May 2022 21:41:58 +0900 Message-Id: <20220515124158.3167452-14-shorne@gmail.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20220515124158.3167452-1-shorne@gmail.com> References: <20220515124158.3167452-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This looks to be some historical code that was used to convert TLB misses on branches from l.bf, l.jal, l.j etc all to a trampoline using l.jr (jump register). I don't see this being used and I don't know the history of it so remove it. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/head.S | 209 ------------------------------------ 1 file changed, 209 deletions(-) diff --git a/arch/openrisc/kernel/head.S b/arch/openrisc/kernel/head.S index 21db50563f97..9b59d0ca665c 100644 --- a/arch/openrisc/kernel/head.S +++ b/arch/openrisc/kernel/head.S @@ -1325,215 +1325,6 @@ i_pte_not_present: =20 /* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D[ debugging aids ]=3D=3D=3D */ =20 - .align 64 -_immu_trampoline: - .space 64 -_immu_trampoline_top: - -#define TRAMP_SLOT_0 (0x0) -#define TRAMP_SLOT_1 (0x4) -#define TRAMP_SLOT_2 (0x8) -#define TRAMP_SLOT_3 (0xc) -#define TRAMP_SLOT_4 (0x10) -#define TRAMP_SLOT_5 (0x14) -#define TRAMP_FRAME_SIZE (0x18) - -ENTRY(_immu_trampoline_workaround) - // r2 EEA - // r6 is physical EEA - tophys(r6,r2) - - LOAD_SYMBOL_2_GPR(r5,_immu_trampoline) - tophys (r3,r5) // r3 is trampoline (physical) - - LOAD_SYMBOL_2_GPR(r4,0x15000000) - l.sw TRAMP_SLOT_0(r3),r4 - l.sw TRAMP_SLOT_1(r3),r4 - l.sw TRAMP_SLOT_4(r3),r4 - l.sw TRAMP_SLOT_5(r3),r4 - - // EPC =3D EEA - 0x4 - l.lwz r4,0x0(r6) // load op @ EEA + 0x0 (fc address) - l.sw TRAMP_SLOT_3(r3),r4 // store it to _immu_trampoline_data - l.lwz r4,-0x4(r6) // load op @ EEA - 0x4 (f8 address) - l.sw TRAMP_SLOT_2(r3),r4 // store it to _immu_trampoline_data - - l.srli r5,r4,26 // check opcode for write access - l.sfeqi r5,0 // l.j - l.bf 0f - l.sfeqi r5,0x11 // l.jr - l.bf 1f - l.sfeqi r5,1 // l.jal - l.bf 2f - l.sfeqi r5,0x12 // l.jalr - l.bf 3f - l.sfeqi r5,3 // l.bnf - l.bf 4f - l.sfeqi r5,4 // l.bf - l.bf 5f -99: - l.nop - l.j 99b // should never happen - l.nop 1 - - // r2 is EEA - // r3 is trampoline address (physical) - // r4 is instruction - // r6 is physical(EEA) - // - // r5 - -2: // l.jal - - /* 19 20 aa aa l.movhi r9,0xaaaa - * a9 29 bb bb l.ori r9,0xbbbb - * - * where 0xaaaabbbb is EEA + 0x4 shifted right 2 - */ - - l.addi r6,r2,0x4 // this is 0xaaaabbbb - - // l.movhi r9,0xaaaa - l.ori r5,r0,0x1920 // 0x1920 =3D=3D l.movhi r9 - l.sh (TRAMP_SLOT_0+0x0)(r3),r5 - l.srli r5,r6,16 - l.sh (TRAMP_SLOT_0+0x2)(r3),r5 - - // l.ori r9,0xbbbb - l.ori r5,r0,0xa929 // 0xa929 =3D=3D l.ori r9 - l.sh (TRAMP_SLOT_1+0x0)(r3),r5 - l.andi r5,r6,0xffff - l.sh (TRAMP_SLOT_1+0x2)(r3),r5 - - /* falthrough, need to set up new jump offset */ - - -0: // l.j - l.slli r6,r4,6 // original offset shifted left 6 - 2 -// l.srli r6,r6,6 // original offset shifted right 2 - - l.slli r4,r2,4 // old jump position: EEA shifted left 4 -// l.srli r4,r4,6 // old jump position: shifted right 2 - - l.addi r5,r3,0xc // new jump position (physical) - l.slli r5,r5,4 // new jump position: shifted left 4 - - // calculate new jump offset - // new_off =3D old_off + (old_jump - new_jump) - - l.sub r5,r4,r5 // old_jump - new_jump - l.add r5,r6,r5 // orig_off + (old_jump - new_jump) - l.srli r5,r5,6 // new offset shifted right 2 - - // r5 is new jump offset - // l.j has opcode 0x0... - l.sw TRAMP_SLOT_2(r3),r5 // write it back - - l.j trampoline_out - l.nop - -/* ----------------------------- */ - -3: // l.jalr - - /* 19 20 aa aa l.movhi r9,0xaaaa - * a9 29 bb bb l.ori r9,0xbbbb - * - * where 0xaaaabbbb is EEA + 0x4 shifted right 2 - */ - - l.addi r6,r2,0x4 // this is 0xaaaabbbb - - // l.movhi r9,0xaaaa - l.ori r5,r0,0x1920 // 0x1920 =3D=3D l.movhi r9 - l.sh (TRAMP_SLOT_0+0x0)(r3),r5 - l.srli r5,r6,16 - l.sh (TRAMP_SLOT_0+0x2)(r3),r5 - - // l.ori r9,0xbbbb - l.ori r5,r0,0xa929 // 0xa929 =3D=3D l.ori r9 - l.sh (TRAMP_SLOT_1+0x0)(r3),r5 - l.andi r5,r6,0xffff - l.sh (TRAMP_SLOT_1+0x2)(r3),r5 - - l.lhz r5,(TRAMP_SLOT_2+0x0)(r3) // load hi part of jump instruction - l.andi r5,r5,0x3ff // clear out opcode part - l.ori r5,r5,0x4400 // opcode changed from l.jalr -> l.jr - l.sh (TRAMP_SLOT_2+0x0)(r3),r5 // write it back - - /* falthrough */ - -1: // l.jr - l.j trampoline_out - l.nop - -/* ----------------------------- */ - -4: // l.bnf -5: // l.bf - l.slli r6,r4,6 // original offset shifted left 6 - 2 -// l.srli r6,r6,6 // original offset shifted right 2 - - l.slli r4,r2,4 // old jump position: EEA shifted left 4 -// l.srli r4,r4,6 // old jump position: shifted right 2 - - l.addi r5,r3,0xc // new jump position (physical) - l.slli r5,r5,4 // new jump position: shifted left 4 - - // calculate new jump offset - // new_off =3D old_off + (old_jump - new_jump) - - l.add r6,r6,r4 // (orig_off + old_jump) - l.sub r6,r6,r5 // (orig_off + old_jump) - new_jump - l.srli r6,r6,6 // new offset shifted right 2 - - // r6 is new jump offset - l.lwz r4,(TRAMP_SLOT_2+0x0)(r3) // load jump instruction - l.srli r4,r4,16 - l.andi r4,r4,0xfc00 // get opcode part - l.slli r4,r4,16 - l.or r6,r4,r6 // l.b(n)f new offset - l.sw TRAMP_SLOT_2(r3),r6 // write it back - - /* we need to add l.j to EEA + 0x8 */ - tophys (r4,r2) // may not be needed (due to shifts down_ - l.addi r4,r4,(0x8 - 0x8) // jump target =3D r2 + 0x8 (compensate for 0x8) - // jump position =3D r5 + 0x8 (0x8 compensated) - l.sub r4,r4,r5 // jump offset =3D target - new_position + 0x8 - - l.slli r4,r4,4 // the amount of info in imediate of jump - l.srli r4,r4,6 // jump instruction with offset - l.sw TRAMP_SLOT_4(r3),r4 // write it to 4th slot - - /* fallthrough */ - -trampoline_out: - // set up new EPC to point to our trampoline code - LOAD_SYMBOL_2_GPR(r5,_immu_trampoline) - l.mtspr r0,r5,SPR_EPCR_BASE - - // immu_trampoline is (4x) CACHE_LINE aligned - // and only 6 instructions long, - // so we need to invalidate only 2 lines - - /* Establish cache block size - If BS=3D0, 16; - If BS=3D1, 32; - r14 contain block size - */ - l.mfspr r21,r0,SPR_ICCFGR - l.andi r21,r21,SPR_ICCFGR_CBS - l.srli r21,r21,7 - l.ori r23,r0,16 - l.sll r14,r23,r21 - - l.mtspr r0,r5,SPR_ICBIR - l.add r5,r5,r14 - l.mtspr r0,r5,SPR_ICBIR - - l.jr r9 - l.nop - /* * DESC: Prints ASCII character stored in r7 * --=20 2.31.1