From nobody Sun May 10 09:54:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F393C4332F for ; Fri, 13 May 2022 15:16:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354285AbiEMPQL (ORCPT ); Fri, 13 May 2022 11:16:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377700AbiEMPQG (ORCPT ); Fri, 13 May 2022 11:16:06 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EBD415A0AE; Fri, 13 May 2022 08:16:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652454963; x=1683990963; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=24oKuYXEcnWrp4B5Kh3zaIWR0+FTuDd0VrQkGRVBuc8=; b=Zli9crThxZTE1+om0dNbqy2cGf66DQff5k/c/2j647Jf1pHXO4BwvGFW kNpTojiraQgyntFjeikTfQyaBl4HoBGfuh9gPUTF5hInX2Mum++f2aWEH Q/Rb94QmCT3bTZKnb9cv7Y+2YF2Up+bqGx1MlTV7WTR4tvavY8TvLhU5f dSTg4ytSTJwdPcOw2f+v1wzJzzK4WKSZSalTN/dOMLZYn06SYOj/XAczC Max2/PN89n8cxD9SPqA6X0E5XGoJhpUFGULg77qn62/ZYDe+HFMqhjS/q q/TvwPSVeu1vLCHSLtlX5XiQV+84kbDHYymvks4xZ+thMSWpCZDc5dBqd Q==; X-IronPort-AV: E=McAfee;i="6400,9594,10346"; a="269160146" X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="269160146" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2022 08:16:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="698518050" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by orsmga004.jf.intel.com with ESMTP; 13 May 2022 08:16:02 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, irogers@google.com, jolsa@kernel.org, namhyung@kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: peterz@infradead.org, zhengjun.xing@linux.intel.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, Kan Liang Subject: [PATCH 1/4] perf evsel: Fixes topdown events in a weak group for the hybrid platform Date: Fri, 13 May 2022 08:15:51 -0700 Message-Id: <20220513151554.1054452-2-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220513151554.1054452-1-kan.liang@linux.intel.com> References: <20220513151554.1054452-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The patch ("perf evlist: Keep topdown counters in weak group") fixes the perf metrics topdown event issue when the topdown events are in a weak group on a non-hybrid platform. However, it doesn't work for the hybrid platform. $./perf stat -e '{cpu_core/slots/,cpu_core/topdown-bad-spec/, cpu_core/topdown-be-bound/,cpu_core/topdown-fe-bound/, cpu_core/topdown-retiring/,cpu_core/branch-instructions/, cpu_core/branch-misses/,cpu_core/bus-cycles/,cpu_core/cache-misses/, cpu_core/cache-references/,cpu_core/cpu-cycles/,cpu_core/instructions/, cpu_core/mem-loads/,cpu_core/mem-stores/,cpu_core/ref-cycles/, cpu_core/cache-misses/,cpu_core/cache-references/}:W' -a sleep 1 Performance counter stats for 'system wide': 751,765,068 cpu_core/slots/ = (84.07%) cpu_core/topdown-bad-spec/ cpu_core/topdown-be-bound/ cpu_core/topdown-fe-bound/ cpu_core/topdown-retiring/ 12,398,197 cpu_core/branch-instructions/ = (84.07%) 1,054,218 cpu_core/branch-misses/ = (84.24%) 539,764,637 cpu_core/bus-cycles/ = (84.64%) 14,683 cpu_core/cache-misses/ = (84.87%) 7,277,809 cpu_core/cache-references/ = (77.30%) 222,299,439 cpu_core/cpu-cycles/ = (77.28%) 63,661,714 cpu_core/instructions/ = (84.85%) 0 cpu_core/mem-loads/ = (77.29%) 12,271,725 cpu_core/mem-stores/ = (77.30%) 542,241,102 cpu_core/ref-cycles/ = (84.85%) 8,854 cpu_core/cache-misses/ = (76.71%) 7,179,013 cpu_core/cache-references/ = (76.31%) 1.003245250 seconds time elapsed A hybrid platform has a different PMU name for the core PMUs, while the current perf hard code the PMU name "cpu". The evsel->pmu_name can be used to replace the "cpu" to fix the issue. For a hybrid platform, the pmu_name must be non-NULL. Because there are at least two core PMUs. The PMU has to be specified. For a non-hybrid platform, the pmu_name may be NULL. Because there is only one core PMU, "cpu". For a NULL pmu_name, we can safely assume that it is a "cpu" PMU. With the patch, $perf stat -e '{cpu_core/slots/,cpu_core/topdown-bad-spec/, cpu_core/topdown-be-bound/,cpu_core/topdown-fe-bound/, cpu_core/topdown-retiring/,cpu_core/branch-instructions/, cpu_core/branch-misses/,cpu_core/bus-cycles/,cpu_core/cache-misses/, cpu_core/cache-references/,cpu_core/cpu-cycles/,cpu_core/instructions/, cpu_core/mem-loads/,cpu_core/mem-stores/,cpu_core/ref-cycles/, cpu_core/cache-misses/,cpu_core/cache-references/}:W' -a sleep 1 Performance counter stats for 'system wide': 766,620,266 cpu_core/slots/ = (84.06%) 73,172,129 cpu_core/topdown-bad-spec/ # 9.5% bad speculat= ion (84.06%) 193,443,341 cpu_core/topdown-be-bound/ # 25.0% backend boun= d (84.06%) 403,940,929 cpu_core/topdown-fe-bound/ # 52.3% frontend bou= nd (84.06%) 102,070,237 cpu_core/topdown-retiring/ # 13.2% retiring = (84.06%) 12,364,429 cpu_core/branch-instructions/ = (84.03%) 1,080,124 cpu_core/branch-misses/ = (84.24%) 564,120,383 cpu_core/bus-cycles/ = (84.65%) 36,979 cpu_core/cache-misses/ = (84.86%) 7,298,094 cpu_core/cache-references/ = (77.30%) 227,174,372 cpu_core/cpu-cycles/ = (77.31%) 63,886,523 cpu_core/instructions/ = (84.87%) 0 cpu_core/mem-loads/ = (77.31%) 12,208,782 cpu_core/mem-stores/ = (77.31%) 566,409,738 cpu_core/ref-cycles/ = (84.87%) 23,118 cpu_core/cache-misses/ = (76.71%) 7,212,602 cpu_core/cache-references/ = (76.29%) 1.003228667 seconds time elapsed Signed-off-by: Kan Liang --- tools/perf/arch/x86/util/evsel.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/tools/perf/arch/x86/util/evsel.c b/tools/perf/arch/x86/util/ev= sel.c index 00cb4466b4ca..24510bcb4bf4 100644 --- a/tools/perf/arch/x86/util/evsel.c +++ b/tools/perf/arch/x86/util/evsel.c @@ -33,8 +33,9 @@ void arch_evsel__fixup_new_cycles(struct perf_event_attr = *attr) =20 bool arch_evsel__must_be_in_group(const struct evsel *evsel) { - if ((evsel->pmu_name && strcmp(evsel->pmu_name, "cpu")) || - !pmu_have_event("cpu", "slots")) + const char *pmu_name =3D evsel->pmu_name ? evsel->pmu_name : "cpu"; + + if (!pmu_have_event(pmu_name, "slots")) return false; =20 return evsel->name && --=20 2.35.1 From nobody Sun May 10 09:54:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F2193C433EF for ; Fri, 13 May 2022 15:16:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381878AbiEMPQk (ORCPT ); Fri, 13 May 2022 11:16:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350280AbiEMPQH (ORCPT ); Fri, 13 May 2022 11:16:07 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 188315A0BF; Fri, 13 May 2022 08:16:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652454966; x=1683990966; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NDrXSu1JZN2Qn0vkeSf7Zhq/N60jq8iWu8H5Bfn2kII=; b=cjhIIeyKc+p/a/sJr9uPSdCZlMt/GLI4RFAsijnj/1rZN1CnpH6wQbeY H4H4wM1kAzKXsveO7CcFf6tc7MYx3+iozPMfs68/2n5lF4AGGGRmi3eeB Gj9kkaR0gyHAJtytkS/WdYT2ECrs6Bca6Uq5I9Nackhcx+qF3Dm2Dqlu8 bx2GXmp+Xck9/fpFa5QyKFSvdUlmeXH4B3s2NdUX8BSD2czloxDiZ65sa Hbnqf3bvVQt54ZxdbEEFak2HSGqM4ZPsw8i6VmfJDxb4S2XLoTr1SmMeB pmz3tMdU8tN4eeJuBD5mDRhL4VkPevCsNDV2E39Mc9YQk+G9El9S/Zoxo w==; X-IronPort-AV: E=McAfee;i="6400,9594,10346"; a="269160149" X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="269160149" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2022 08:16:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="698518055" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by orsmga004.jf.intel.com with ESMTP; 13 May 2022 08:16:02 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, irogers@google.com, jolsa@kernel.org, namhyung@kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: peterz@infradead.org, zhengjun.xing@linux.intel.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, Kan Liang Subject: [PATCH 2/4] perf stat: Always keep perf metrics topdown events in a group Date: Fri, 13 May 2022 08:15:52 -0700 Message-Id: <20220513151554.1054452-3-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220513151554.1054452-1-kan.liang@linux.intel.com> References: <20220513151554.1054452-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang If any member in a group has a different cpu mask than the other members, the current perf stat disables group. when the perf metrics topdown events are part of the group, the below error will be triggered. $ perf stat -e "{slots,topdown-retiring,uncore_imc_free_running_0/dclk/}" -= a sleep 1 WARNING: grouped events cpus do not match, disabling group: anon group { slots, topdown-retiring, uncore_imc_free_running_0/dclk/ } Performance counter stats for 'system wide': 141,465,174 slots topdown-retiring 1,605,330,334 uncore_imc_free_running_0/dclk/ The perf metrics topdown events must always be grouped with a slots event as leader. With the patch, the topdown events aren't broken from the group for the splitting. $ perf stat -e "{slots,topdown-retiring,uncore_imc_free_running_0/dclk/}" -= a sleep 1 WARNING: grouped events cpus do not match, disabling group: anon group { slots, topdown-retiring, uncore_imc_free_running_0/dclk/ } Performance counter stats for 'system wide': 346,110,588 slots 124,608,256 topdown-retiring 1,606,869,976 uncore_imc_free_running_0/dclk/ 1.003877592 seconds time elapsed Fixes: a9a1790247bd ("perf stat: Ensure group is defined on top of the same= cpu mask") Signed-off-by: Kan Liang --- tools/perf/builtin-stat.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/tools/perf/builtin-stat.c b/tools/perf/builtin-stat.c index a96f106dc93a..af2248868a4f 100644 --- a/tools/perf/builtin-stat.c +++ b/tools/perf/builtin-stat.c @@ -272,8 +272,11 @@ static void evlist__check_cpu_maps(struct evlist *evli= st) } =20 for_each_group_evsel(pos, leader) { - evsel__set_leader(pos, pos); - pos->core.nr_members =3D 0; + if (!evsel__must_be_in_group(pos) && pos !=3D leader) { + evsel__set_leader(pos, pos); + pos->core.nr_members =3D 0; + leader->core.nr_members--; + } } evsel->core.leader->nr_members =3D 0; } --=20 2.35.1 From nobody Sun May 10 09:54:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED352C433F5 for ; Fri, 13 May 2022 15:16:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381832AbiEMPQo (ORCPT ); Fri, 13 May 2022 11:16:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381173AbiEMPQH (ORCPT ); Fri, 13 May 2022 11:16:07 -0400 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EC2C5A141; Fri, 13 May 2022 08:16:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652454966; x=1683990966; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WaaPZTGXGvvrIUYYvLuGheNzDThV1e0SRqk9uhMThso=; b=XHLubT2k7LVqpMqjG5th6UYYjvI7PXog8AEIZp3dqYCTJ4qugsFLh2BG EcQzBqPnPV41rmFK2TgRv9Mr9a0yYAWg6aOVWxi2lF6A38cpWIP3PfauP NJclxEdsgo0FALOFRSbmqFWVAZiTjoKU6liYjdxBSqiXN80fo3UykobBK x9z/QnnTUb+YT4vnClpxsrYCeaEK7VMONMwhSPRqLwBbpgaL8dhgV7YaY pWgD7g0s8VsRFKYBiE2vvvNOy1+piFNAmgFpAEf9Mr/Q53iUEnU754Cvy fBZV9Bip2RiF5naH8t1ui2WWZCFG7ztdOyROmPcEos9+Gog0TfUTvt/I3 g==; X-IronPort-AV: E=McAfee;i="6400,9594,10346"; a="269160154" X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="269160154" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2022 08:16:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="698518059" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by orsmga004.jf.intel.com with ESMTP; 13 May 2022 08:16:02 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, irogers@google.com, jolsa@kernel.org, namhyung@kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: peterz@infradead.org, zhengjun.xing@linux.intel.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, Kan Liang Subject: [PATCH 3/4] perf parse-events: Support different format of the topdown event name Date: Fri, 13 May 2022 08:15:53 -0700 Message-Id: <20220513151554.1054452-4-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220513151554.1054452-1-kan.liang@linux.intel.com> References: <20220513151554.1054452-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The evsel->name may have a different format for a topdown event, a pure topdown name (e.g., topdown-fe-bound), or a PMU name + a topdown name (e.g., cpu/topdown-fe-bound/). The cpu/topdown-fe-bound/ kind format isn't supported by the arch_evlist__leader(). This format is a very common format for a hybrid platform, which requires specifying the PMU name for each event. Without the patch, $perf stat -e '{instructions,slots,cpu/topdown-fe-bound/}' -a sleep 1 Performance counter stats for 'system wide': instructions slots cpu/topdown-fe-bound/ 1.003482041 seconds time elapsed Some events weren't counted. Try disabling the NMI watchdog: echo 0 > /proc/sys/kernel/nmi_watchdog perf stat ... echo 1 > /proc/sys/kernel/nmi_watchdog The events in group usually have to be from the same PMU. Try reorganizing = the group. With the patch, perf stat -e '{instructions,slots,cpu/topdown-fe-bound/}' -a sleep 1 Performance counter stats for 'system wide': 157,383,996 slots 25,011,711 instructions 27,441,686 cpu/topdown-fe-bound/ 1.003530890 seconds time elapsed Fixes: bc355822f0d9 ("perf parse-events: Move slots only with topdown") Signed-off-by: Kan Liang Reviewed-by: Ian Rogers --- tools/perf/arch/x86/util/evlist.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/perf/arch/x86/util/evlist.c b/tools/perf/arch/x86/util/e= vlist.c index cfc208d71f00..75564a7df15b 100644 --- a/tools/perf/arch/x86/util/evlist.c +++ b/tools/perf/arch/x86/util/evlist.c @@ -36,7 +36,7 @@ struct evsel *arch_evlist__leader(struct list_head *list) if (slots =3D=3D first) return first; } - if (!strncasecmp(evsel->name, "topdown", 7)) + if (strcasestr(evsel->name, "topdown")) has_topdown =3D true; if (slots && has_topdown) return slots; --=20 2.35.1 From nobody Sun May 10 09:54:06 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 774CEC433EF for ; Fri, 13 May 2022 15:16:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1381841AbiEMPQT (ORCPT ); Fri, 13 May 2022 11:16:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1381225AbiEMPQG (ORCPT ); Fri, 13 May 2022 11:16:06 -0400 Received: from mga06.intel.com (mga06b.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8B46358E74; Fri, 13 May 2022 08:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1652454964; x=1683990964; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=cwPKNv7wzL/0rUqY/ySsyGakmxNjz3VMfdoNwADaX60=; b=IBCDMPNAYPXEUBzNxFmAarfy0b2UHJcq5gNyplvJoW9dXU2KgXzOxMxm vIEzAHR1izgjGEf5gEVyoX7pWFWNA+Ze4euIMwPCNPUSiW80iK5P2QuyI CTsQDnzQlk6LFBHmFQZpZdiWcPVPSu9xonGEPCCzvQNhLBSVHR3SfxmUg PdE6zKHGOabhL3jNaLw89eLu4sKyUML304yvXlBTNG+dsN+ZfCQKJrCVF gAkusxg+5F36oR778FswfPTTfeqrUsaFA2Fb9RlBycJIRGwCpiAqwClmh fV5OnfD6/EWwodv4UN08oi3f05MnjoGd6e9nnZECry3Slrsn/N9q1su4h A==; X-IronPort-AV: E=McAfee;i="6400,9594,10346"; a="330924529" X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="330924529" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2022 08:16:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,223,1647327600"; d="scan'208";a="698518062" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by orsmga004.jf.intel.com with ESMTP; 13 May 2022 08:16:02 -0700 From: kan.liang@linux.intel.com To: acme@kernel.org, mingo@redhat.com, irogers@google.com, jolsa@kernel.org, namhyung@kernel.org, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: peterz@infradead.org, zhengjun.xing@linux.intel.com, adrian.hunter@intel.com, ak@linux.intel.com, eranian@google.com, Kan Liang Subject: [PATCH 4/4] perf parse-events: Move slots event for the hybrid platform too Date: Fri, 13 May 2022 08:15:54 -0700 Message-Id: <20220513151554.1054452-5-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220513151554.1054452-1-kan.liang@linux.intel.com> References: <20220513151554.1054452-1-kan.liang@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Kan Liang The commit 94dbfd6781a0 ("perf parse-events: Architecture specific leader override") introduced a feature to reorder the slots event to fulfill the restriction of the perf metrics topdown group. But the feature doesn't work on the hybrid machine. $perf stat -e "{cpu_core/instructions/,cpu_core/slots/,cpu_core/topdown-ret= iring/}" -a sleep 1 Performance counter stats for 'system wide': cpu_core/instructions/ cpu_core/slots/ cpu_core/topdown-retiring/ 1.002871801 seconds time elapsed A hybrid platform has a different PMU name for the core PMUs, while current perf hard code the PMU name "cpu". Introduce a new function to check whether the system supports the perf metrics feature. The result is cached for the future usage. For X86, the core PMU name always has "cpu" prefix. With the patch, $perf stat -e "{cpu_core/instructions/,cpu_core/slots/,cpu_core/topdown-ret= iring/}" -a sleep 1 Performance counter stats for 'system wide': 76,337,010 cpu_core/slots/ 10,416,809 cpu_core/instructions/ 11,692,372 cpu_core/topdown-retiring/ 1.002805453 seconds time elapsed Signed-off-by: Kan Liang --- tools/perf/arch/x86/util/evlist.c | 5 +++-- tools/perf/arch/x86/util/topdown.c | 18 ++++++++++++++++++ tools/perf/arch/x86/util/topdown.h | 7 +++++++ 3 files changed, 28 insertions(+), 2 deletions(-) create mode 100644 tools/perf/arch/x86/util/topdown.h diff --git a/tools/perf/arch/x86/util/evlist.c b/tools/perf/arch/x86/util/e= vlist.c index 75564a7df15b..68f681ad54c1 100644 --- a/tools/perf/arch/x86/util/evlist.c +++ b/tools/perf/arch/x86/util/evlist.c @@ -3,6 +3,7 @@ #include "util/pmu.h" #include "util/evlist.h" #include "util/parse-events.h" +#include "topdown.h" =20 #define TOPDOWN_L1_EVENTS "{slots,topdown-retiring,topdown-bad-spec,topdow= n-fe-bound,topdown-be-bound}" #define TOPDOWN_L2_EVENTS "{slots,topdown-retiring,topdown-bad-spec,topdow= n-fe-bound,topdown-be-bound,topdown-heavy-ops,topdown-br-mispredict,topdown= -fetch-lat,topdown-mem-bound}" @@ -25,12 +26,12 @@ struct evsel *arch_evlist__leader(struct list_head *lis= t) =20 first =3D list_first_entry(list, struct evsel, core.node); =20 - if (!pmu_have_event("cpu", "slots")) + if (!topdown_sys_has_perf_metrics()) return first; =20 /* If there is a slots event and a topdown event then the slots event com= es first. */ __evlist__for_each_entry(list, evsel) { - if (evsel->pmu_name && !strcmp(evsel->pmu_name, "cpu") && evsel->name) { + if (evsel->pmu_name && !strncmp(evsel->pmu_name, "cpu", 3) && evsel->nam= e) { if (strcasestr(evsel->name, "slots")) { slots =3D evsel; if (slots =3D=3D first) diff --git a/tools/perf/arch/x86/util/topdown.c b/tools/perf/arch/x86/util/= topdown.c index 2f3d96aa92a5..95b9fdef59ab 100644 --- a/tools/perf/arch/x86/util/topdown.c +++ b/tools/perf/arch/x86/util/topdown.c @@ -3,6 +3,24 @@ #include "api/fs/fs.h" #include "util/pmu.h" #include "util/topdown.h" +#include "topdown.h" + +bool topdown_sys_has_perf_metrics(void) +{ + static bool has_perf_metrics; + static bool cached; + struct perf_pmu *pmu; + + if (cached) + return has_perf_metrics; + + pmu =3D perf_pmu__find_by_type(PERF_TYPE_RAW); + if (pmu && pmu_have_event(pmu->name, "slots")) + has_perf_metrics =3D true; + + cached =3D true; + return has_perf_metrics; +} =20 /* * Check whether we can use a group for top down. diff --git a/tools/perf/arch/x86/util/topdown.h b/tools/perf/arch/x86/util/= topdown.h new file mode 100644 index 000000000000..46bf9273e572 --- /dev/null +++ b/tools/perf/arch/x86/util/topdown.h @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _TOPDOWN_H +#define _TOPDOWN_H 1 + +bool topdown_sys_has_perf_metrics(void); + +#endif --=20 2.35.1