From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4164CC433EF for ; Fri, 13 May 2022 09:25:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378990AbiEMJZj (ORCPT ); Fri, 13 May 2022 05:25:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378785AbiEMJZg (ORCPT ); Fri, 13 May 2022 05:25:36 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 836A22A28CB; Fri, 13 May 2022 02:25:34 -0700 (PDT) X-UUID: ae0bf1c4f3844786a839cccb77ca2e0f-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:f7a445aa-ab51-446f-a571-bd9fb33e59a0,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:-5 X-CID-META: VersionHash:2a19b09,CLOUDID:413332a7-eab7-4b74-a74d-5359964535a9,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:0,BEC:nil X-UUID: ae0bf1c4f3844786a839cccb77ca2e0f-20220513 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1099558783; Fri, 13 May 2022 17:25:31 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:30 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:28 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , Steve Cho , , , , , , Subject: [PATCH v6, 1/7] dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for lat soc Date: Fri, 13 May 2022 17:25:20 +0800 Message-ID: <20220513092526.9670-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Adds decoder dt-bindings for compatible "mediatek,mtk-vcodec-lat-soc". Signed-off-by: Yunfei Dong Acked-by: Rob Herring --- .../media/mediatek,vcodec-subdev-decoder.yaml | 51 +++++++++++++------ 1 file changed, 35 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev= -decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-sub= dev-decoder.yaml index 6415c9f29130..6854e7f2ce9f 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml @@ -17,20 +17,20 @@ description: | =20 About the Decoder Hardware Block Diagram, please check below: =20 - +---------------------------------+-----------------------------------= -+ - | | = | - | input -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output= | - | || | || = | - +------------||-------------------+---------------------||------------= -+ - lat workqueue | core workqueue - -------------||-----------------------------------------||------------= ------ - || || - \/ <----------------HW index-------------->\/ - +------------------------------------------------------+ - | enable/disable | - | clk power irq iommu | - | (lat/lat soc/core0/core1) | - +------------------------------------------------------+ + +------------------------------------------------+--------------------= -----------------+ + | | = | + | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> co= re HW -> output | + | || || | = || | + +------------||-------------||-------------------+--------------------= -||--------------+ + || lat || | core = workqueue + -------------||-------------||-------------------|--------------------= -||--------------- + ||<------------||----------------HW index----------------= >|| + \/ \/ = \/ + +----------------------------------------------------------= ---+ + | enable/disable = | + | clk power irq iommu = | + | (lat/lat soc/core0/core1) = | + +----------------------------------------------------------= ---+ =20 As above, there are parent and child devices, child mean each hardware. = The child device controls the information of each hardware independent which include clk/= power/irq. @@ -45,6 +45,13 @@ description: | For the smi common may not the same for each hardware, can't combine all= hardware in one node, or leading to iommu fault when access dram data. =20 + Lat soc is a hardware which is related with some larb(local arbiter) por= ts. For mt8195 + platform, there are some ports like RDMA, UFO in lat soc larb, need to e= nable its power and + clock when lat start to work, don't have interrupt. + + mt8195: lat soc HW + lat HW + core HW + mt8192: lat HW + core HW + properties: compatible: enum: @@ -88,7 +95,9 @@ patternProperties: =20 properties: compatible: - const: mediatek,mtk-vcodec-lat + enum: + - mediatek,mtk-vcodec-lat + - mediatek,mtk-vcodec-lat-soc =20 reg: maxItems: 1 @@ -126,7 +135,6 @@ patternProperties: required: - compatible - reg - - interrupts - iommus - clocks - clock-names @@ -197,6 +205,17 @@ required: - dma-ranges - ranges =20 +if: + properties: + compatible: + contains: + enum: + - mediatek,mtk-vcodec-lat + +then: + required: + - interrupts + additionalProperties: false =20 examples: --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17489C43217 for ; Fri, 13 May 2022 09:26:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379026AbiEMJZ4 (ORCPT ); Fri, 13 May 2022 05:25:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378997AbiEMJZm (ORCPT ); Fri, 13 May 2022 05:25:42 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 89BA72A28C4; Fri, 13 May 2022 02:25:38 -0700 (PDT) X-UUID: 5b9ddf3c4b094b32aeeff7893ec0d781-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:30ca3764-6493-4d2f-be0f-8eec07cf63c7,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,AC TION:release,TS:90 X-CID-INFO: VERSION:1.1.5,REQID:30ca3764-6493-4d2f-be0f-8eec07cf63c7,OB:0,LOB: 0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:90 X-CID-META: VersionHash:2a19b09,CLOUDID:8a891cf2-ab23-4aed-a67b-f96514452486,C OID:8ee79baca8ee,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: 5b9ddf3c4b094b32aeeff7893ec0d781-20220513 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 594576137; Fri, 13 May 2022 17:25:33 +0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:32 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:31 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:30 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 2/7] media: mediatek: vcodec: Add to support lat soc hardware Date: Fri, 13 May 2022 17:25:21 +0800 Message-ID: <20220513092526.9670-3-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add lat soc compatible and to support lat soc power/clk helper. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/mtk_vcodec_dec_hw.c | 12 +++++++++--- .../platform/mediatek/vcodec/mtk_vcodec_dec_hw.h | 2 ++ .../platform/mediatek/vcodec/mtk_vcodec_dec_pm.c | 16 ++++++++++++++++ .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 1 + 4 files changed, 28 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c b/d= rivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c index 14bed2bd4283..376db0e433d7 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.c @@ -28,6 +28,10 @@ static const struct of_device_id mtk_vdec_hw_match[] =3D= { .compatible =3D "mediatek,mtk-vcodec-core", .data =3D (void *)MTK_VDEC_CORE, }, + { + .compatible =3D "mediatek,mtk-vcodec-lat-soc", + .data =3D (void *)MTK_VDEC_LAT_SOC, + }, {}, }; MODULE_DEVICE_TABLE(of, mtk_vdec_hw_match); @@ -166,9 +170,11 @@ static int mtk_vdec_hw_probe(struct platform_device *p= dev) subdev_dev->reg_base[VDEC_HW_SYS] =3D main_dev->reg_base[VDEC_HW_SYS]; set_bit(subdev_dev->hw_idx, main_dev->subdev_bitmap); =20 - ret =3D mtk_vdec_hw_init_irq(subdev_dev); - if (ret) - goto err; + if (IS_SUPPORT_VDEC_HW_IRQ(hw_idx)) { + ret =3D mtk_vdec_hw_init_irq(subdev_dev); + if (ret) + goto err; + } =20 subdev_dev->reg_base[VDEC_HW_MISC] =3D devm_platform_ioremap_resource(pdev, 0); diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h b/d= rivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h index a63e4b1b81c3..36faa8d9d681 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_hw.h @@ -17,6 +17,8 @@ #define VDEC_IRQ_CLR 0x10 #define VDEC_IRQ_CFG_REG 0xa4 =20 +#define IS_SUPPORT_VDEC_HW_IRQ(hw_idx) ((hw_idx) !=3D MTK_VDEC_LAT_SOC) + /** * enum mtk_vdec_hw_reg_idx - subdev hardware register base index * @VDEC_HW_SYS : vdec soc register index diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c b/d= rivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c index 0fb7e5ba635b..d69faa463d04 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c @@ -174,6 +174,14 @@ static void mtk_vcodec_dec_child_dev_on(struct mtk_vco= dec_dev *vdec_dev, mtk_vcodec_dec_pw_on(pm); mtk_vcodec_dec_clock_on(pm); } + + if (hw_idx =3D=3D MTK_VDEC_LAT0) { + pm =3D mtk_vcodec_dec_get_pm(vdec_dev, MTK_VDEC_LAT_SOC); + if (pm) { + mtk_vcodec_dec_pw_on(pm); + mtk_vcodec_dec_clock_on(pm); + } + } } =20 static void mtk_vcodec_dec_child_dev_off(struct mtk_vcodec_dev *vdec_dev, @@ -186,6 +194,14 @@ static void mtk_vcodec_dec_child_dev_off(struct mtk_vc= odec_dev *vdec_dev, mtk_vcodec_dec_clock_off(pm); mtk_vcodec_dec_pw_off(pm); } + + if (hw_idx =3D=3D MTK_VDEC_LAT0) { + pm =3D mtk_vcodec_dec_get_pm(vdec_dev, MTK_VDEC_LAT_SOC); + if (pm) { + mtk_vcodec_dec_clock_off(pm); + mtk_vcodec_dec_pw_off(pm); + } + } } =20 void mtk_vcodec_dec_enable_hardware(struct mtk_vcodec_ctx *ctx, int hw_idx) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h b/driv= ers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h index a29041a0b7e0..0e3db8ccb398 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h @@ -104,6 +104,7 @@ enum mtk_vdec_hw_id { MTK_VDEC_CORE, MTK_VDEC_LAT0, MTK_VDEC_LAT1, + MTK_VDEC_LAT_SOC, MTK_VDEC_HW_MAX, }; =20 --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEEF5C433FE for ; Fri, 13 May 2022 09:27:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379109AbiEMJ0d (ORCPT ); Fri, 13 May 2022 05:26:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379009AbiEMJZt (ORCPT ); Fri, 13 May 2022 05:25:49 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 87AE7E4A; Fri, 13 May 2022 02:25:41 -0700 (PDT) X-UUID: 53143719f33c41ce9411d22abb4668ae-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:01d6e588-00c4-4499-9d2c-964ba603b69f,OB:20,L OB:20,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,A CTION:release,TS:95 X-CID-INFO: VERSION:1.1.5,REQID:01d6e588-00c4-4499-9d2c-964ba603b69f,OB:20,LOB :20,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:95 X-CID-META: VersionHash:2a19b09,CLOUDID:048a1cf2-ab23-4aed-a67b-f96514452486,C OID:b20ba0dbcb63,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: 53143719f33c41ce9411d22abb4668ae-20220513 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 510357662; Fri, 13 May 2022 17:25:36 +0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:35 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:34 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:31 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 3/7] dt-bindings: media: mediatek: vcodec: Adds decoder dt-bindings for mt8195 Date: Fri, 13 May 2022 17:25:22 +0800 Message-ID: <20220513092526.9670-4-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Adds decoder dt-bindings for mt8195. Signed-off-by: Yunfei Dong Reviewed-by: Macpaul Lin Reviewed-by: Rob Herring --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev= -decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-sub= dev-decoder.yaml index 6854e7f2ce9f..ca6a00be815a 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decode= r.yaml @@ -57,6 +57,7 @@ properties: enum: - mediatek,mt8192-vcodec-dec - mediatek,mt8186-vcodec-dec + - mediatek,mt8195-vcodec-dec =20 reg: maxItems: 1 --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39C45C433FE for ; Fri, 13 May 2022 09:26:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379120AbiEMJ0j (ORCPT ); Fri, 13 May 2022 05:26:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378994AbiEMJZu (ORCPT ); Fri, 13 May 2022 05:25:50 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C71BE5FB7; Fri, 13 May 2022 02:25:43 -0700 (PDT) X-UUID: 94f8dd7144924a2398e8434da866407f-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:a457d98d-fbc3-4dca-b620-9fdd86780dd3,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACT ION:release,TS:-5 X-CID-META: VersionHash:2a19b09,CLOUDID:bb3432a7-eab7-4b74-a74d-5359964535a9,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:0,BEC:nil X-UUID: 94f8dd7144924a2398e8434da866407f-20220513 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 383290882; Fri, 13 May 2022 17:25:38 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:37 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:36 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:34 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 4/7] media: mediatek: vcodec: Adds compatible for mt8195 Date: Fri, 13 May 2022 17:25:23 +0800 Message-ID: <20220513092526.9670-5-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Adds compatible for mt8195 platform. Signed-off-by: Yunfei Dong Reviewed-by: Macpaul Lin --- drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/= drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index 995e6e2fb1ab..928179354c24 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -465,6 +465,10 @@ static const struct of_device_id mtk_vcodec_match[] = =3D { .compatible =3D "mediatek,mt8186-vcodec-dec", .data =3D &mtk_vdec_single_core_pdata, }, + { + .compatible =3D "mediatek,mt8195-vcodec-dec", + .data =3D &mtk_lat_sig_core_pdata, + }, {}, }; =20 --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CEAE7C433F5 for ; Fri, 13 May 2022 09:26:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379029AbiEMJ0o (ORCPT ); Fri, 13 May 2022 05:26:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36958 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379010AbiEMJZv (ORCPT ); Fri, 13 May 2022 05:25:51 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52EF365FA; Fri, 13 May 2022 02:25:46 -0700 (PDT) X-UUID: da5e844f2c9e4d0ba9aa3e8a886b1c66-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:88f3d13e-a487-47c7-8517-ee4eb9856ce1,OB:10,L OB:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,AC TION:release,TS:95 X-CID-INFO: VERSION:1.1.5,REQID:88f3d13e-a487-47c7-8517-ee4eb9856ce1,OB:10,LOB :0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,AC TION:quarantine,TS:95 X-CID-META: VersionHash:2a19b09,CLOUDID:f28a1cf2-ab23-4aed-a67b-f96514452486,C OID:188a40b6d09d,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: da5e844f2c9e4d0ba9aa3e8a886b1c66-20220513 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1163099226; Fri, 13 May 2022 17:25:41 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:40 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:39 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:36 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 5/7] media: mediatek: vcodec: Different codec using different capture format Date: Fri, 13 May 2022 17:25:24 +0800 Message-ID: <20220513092526.9670-6-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Vp8 need to use MM21, but vp9 and h264 need to use HyFbc mode for mt8195. Vp8/vp9/h264 use the same MM21 format for mt8192. Signed-off-by: Yunfei Dong --- .../platform/mediatek/vcodec/mtk_vcodec_dec.c | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec.c b/driv= ers/media/platform/mediatek/vcodec/mtk_vcodec_dec.c index 52e5d36aa912..254649240b34 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec.c @@ -35,6 +35,44 @@ mtk_vdec_find_format(struct v4l2_format *f, return NULL; } =20 +static bool mtk_vdec_get_cap_fmt(struct mtk_vcodec_ctx *ctx, int format_in= dex) +{ + const struct mtk_vcodec_dec_pdata *dec_pdata =3D ctx->dev->vdec_pdata; + const struct mtk_video_fmt *fmt; + struct mtk_q_data *q_data; + int num_frame_count =3D 0, i; + bool ret =3D true; + + for (i =3D 0; i < *dec_pdata->num_formats; i++) { + if (dec_pdata->vdec_formats[i].type !=3D MTK_FMT_FRAME) + continue; + + num_frame_count++; + } + + if (num_frame_count =3D=3D 1) + return true; + + fmt =3D &dec_pdata->vdec_formats[format_index]; + q_data =3D &ctx->q_data[MTK_Q_DATA_SRC]; + switch (q_data->fmt->fourcc) { + case V4L2_PIX_FMT_VP8_FRAME: + if (fmt->fourcc =3D=3D V4L2_PIX_FMT_MM21) + ret =3D true; + break; + case V4L2_PIX_FMT_H264_SLICE: + case V4L2_PIX_FMT_VP9_FRAME: + if (fmt->fourcc =3D=3D V4L2_PIX_FMT_MM21) + ret =3D false; + break; + default: + ret =3D true; + break; + }; + + return ret; +} + static struct mtk_q_data *mtk_vdec_get_q_data(struct mtk_vcodec_ctx *ctx, enum v4l2_buf_type type) { @@ -566,6 +604,9 @@ static int vidioc_enum_fmt(struct v4l2_fmtdesc *f, void= *priv, dec_pdata->vdec_formats[i].type !=3D MTK_FMT_FRAME) continue; =20 + if (!output_queue && !mtk_vdec_get_cap_fmt(ctx, i)) + continue; + if (j =3D=3D f->index) break; ++j; --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 003A9C433F5 for ; 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Fri, 13 May 2022 17:25:44 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 13 May 2022 17:25:43 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:42 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:40 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 6/7] media: mediatek: vcodec: prevent kernel crash when scp ipi timeout Date: Fri, 13 May 2022 17:25:25 +0800 Message-ID: <20220513092526.9670-7-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" When SCP timeout during playing video, kernel crashes with following message. It's caused by accessing NULL pointer in vpu_dec_ipi_handler. This patch doesn't solve the root cause of NULL pointer, but merely prevent kernel crashed when encounter the NULL pointer. After applied this patch, kernel keeps alive, only the video player turns to green screen. [67242.065474] pc : vpu_dec_ipi_handler+0xa0/0xb20 [mtk_vcodec_dec] [67242.065485] [MTK_V4L2] level=3D0 fops_vcodec_open(),334: 18000000.vcodec_dec decoder [135] [67242.065523] lr : scp_ipi_handler+0x11c/0x244 [mtk_scp] [67242.065540] sp : ffffffbb4207fb10 [67242.065557] x29: ffffffbb4207fb30 x28: ffffffd00a1d5000 [67242.065592] x27: 1ffffffa0143aa24 x26: 0000000000000000 [67242.065625] x25: dfffffd000000000 x24: ffffffd0168bfdb0 [67242.065659] x23: 1ffffff76840ff74 x22: ffffffbb41fa8a88 [67242.065692] x21: ffffffbb4207fb9c x20: ffffffbb4207fba0 [67242.065725] x19: ffffffbb4207fb98 x18: 0000000000000000 [67242.065758] x17: 0000000000000000 x16: ffffffd042022094 [67242.065791] x15: 1ffffff77ed4b71a x14: 1ffffff77ed4b719 [67242.065824] x13: 0000000000000000 x12: 0000000000000000 [67242.065857] x11: 0000000000000000 x10: dfffffd000000001 [67242.065890] x9 : 0000000000000000 x8 : 0000000000000002 [67242.065923] x7 : 0000000000000000 x6 : 000000000000003f [67242.065956] x5 : 0000000000000040 x4 : ffffffffffffffe0 [67242.065989] x3 : ffffffd043b841b8 x2 : 0000000000000000 [67242.066021] x1 : 0000000000000010 x0 : 0000000000000010 [67242.066055] Call trace: [67242.066092] vpu_dec_ipi_handler+0xa0/0xb20 [mtk_vcodec_dec 12220d230d83a7426fc38c56b3e7bc6066955bae] [67242.066119] scp_ipi_handler+0x11c/0x244 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066145] mt8192_scp_irq_handler+0x70/0x128 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066172] scp_irq_handler+0xa0/0x114 [mtk_scp 8fb69c2ef141dd3192518b952b65aba35627b8bf] [67242.066200] irq_thread_fn+0x84/0xf8 [67242.066220] irq_thread+0x170/0x1ec [67242.066242] kthread+0x2f8/0x3b8 [67242.066264] ret_from_fork+0x10/0x30 [67242.066292] Code: 38f96908 35003628 91004340 d343fc08 (38f96908) Signed-off-by: Tinghan Shen Signed-off-by: Yunfei Dong Reviewed-by: Macpaul Lin --- drivers/media/platform/mediatek/vcodec/vdec_vpu_if.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/media/platform/mediatek/vcodec/vdec_vpu_if.c b/drivers= /media/platform/mediatek/vcodec/vdec_vpu_if.c index 35f4d5583084..1041dd663e76 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec_vpu_if.c +++ b/drivers/media/platform/mediatek/vcodec/vdec_vpu_if.c @@ -91,6 +91,11 @@ static void vpu_dec_ipi_handler(void *data, unsigned int= len, void *priv) struct vdec_vpu_inst *vpu =3D (struct vdec_vpu_inst *) (unsigned long)msg->ap_inst_addr; =20 + if (!vpu) { + mtk_v4l2_err("ap_inst_addr is NULL"); + return; + } + mtk_vcodec_debug(vpu, "+ id=3D%X", msg->msg_id); =20 vpu->failure =3D msg->status; --=20 2.18.0 From nobody Sun Sep 22 02:02:10 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26080C433F5 for ; Fri, 13 May 2022 09:27:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379070AbiEMJ1B (ORCPT ); Fri, 13 May 2022 05:27:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379031AbiEMJZ6 (ORCPT ); Fri, 13 May 2022 05:25:58 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F7BCE04; Fri, 13 May 2022 02:25:52 -0700 (PDT) X-UUID: 924b7ec1a7e040159c4316f30dd292ef-20220513 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.5,REQID:2dc767bd-aac2-4343-b605-c696962bf124,OB:10,L OB:30,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham,A CTION:release,TS:95 X-CID-INFO: VERSION:1.1.5,REQID:2dc767bd-aac2-4343-b605-c696962bf124,OB:10,LOB :30,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D,A CTION:quarantine,TS:95 X-CID-META: VersionHash:2a19b09,CLOUDID:cc8b1cf2-ab23-4aed-a67b-f96514452486,C OID:b20ba0dbcb63,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,QS:0,BEC:nil X-UUID: 924b7ec1a7e040159c4316f30dd292ef-20220513 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1822043192; Fri, 13 May 2022 17:25:48 +0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 13 May 2022 17:25:47 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 13 May 2022 17:25:46 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 13 May 2022 17:25:42 +0800 From: Yunfei Dong To: Yunfei Dong , Alexandre Courbot , Nicolas Dufresne , "Hans Verkuil" , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin , Andrew-CT Chen , Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Tomasz Figa CC: George Sun , Xiaoyong Lu , Hsin-Yi Wang , Fritz Koenig , Daniel Vetter , dri-devel , Irui Wang , "Steve Cho" , , , , , , Subject: [PATCH v6, 7/7] media: mediatek: vcodec: Add to support H264 inner racing mode Date: Fri, 13 May 2022 17:25:26 +0800 Message-ID: <20220513092526.9670-8-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220513092526.9670-1-yunfei.dong@mediatek.com> References: <20220513092526.9670-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" In order to reduce decoder latency, enable H264 inner racing mode. Send lat trans buffer information to core when trigger lat to work, need not to wait until lat decode done. Signed-off-by: Yunfei Dong --- .../mediatek/vcodec/mtk_vcodec_dec_drv.c | 4 +++ .../mediatek/vcodec/mtk_vcodec_dec_pm.c | 34 +++++++++++++++++++ .../platform/mediatek/vcodec/mtk_vcodec_drv.h | 11 ++++++ .../vcodec/vdec/vdec_h264_req_multi_if.c | 25 +++++++++++--- 4 files changed, 69 insertions(+), 5 deletions(-) diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c b/= drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c index 928179354c24..3f63abbf289e 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_drv.c @@ -388,6 +388,10 @@ static int mtk_vcodec_probe(struct platform_device *pd= ev) } } =20 + atomic_set(&dev->dec_active_cnt, 0); + memset(dev->vdec_racing_info, 0, sizeof(dev->vdec_racing_info)); + mutex_init(&dev->dec_racing_info_mutex); + ret =3D video_register_device(vfd_dec, VFL_TYPE_VIDEO, -1); if (ret) { mtk_v4l2_err("Failed to register video device"); diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c b/d= rivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c index d69faa463d04..4305e4eb9900 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_dec_pm.c @@ -144,6 +144,34 @@ static void mtk_vcodec_dec_disable_irq(struct mtk_vcod= ec_dev *vdec_dev, int hw_i } } =20 +static void mtk_vcodec_load_racing_info(struct mtk_vcodec_ctx *ctx) +{ + void __iomem *vdec_racing_addr; + int j; + + mutex_lock(&ctx->dev->dec_racing_info_mutex); + if (atomic_inc_return(&ctx->dev->dec_active_cnt) =3D=3D 1) { + vdec_racing_addr =3D ctx->dev->reg_base[VDEC_MISC] + 0x100; + for (j =3D 0; j < 132; j++) + writel(ctx->dev->vdec_racing_info[j], vdec_racing_addr + j * 4); + } + mutex_unlock(&ctx->dev->dec_racing_info_mutex); +} + +static void mtk_vcodec_record_racing_info(struct mtk_vcodec_ctx *ctx) +{ + void __iomem *vdec_racing_addr; + int j; + + mutex_lock(&ctx->dev->dec_racing_info_mutex); + if (atomic_dec_and_test(&ctx->dev->dec_active_cnt)) { + vdec_racing_addr =3D ctx->dev->reg_base[VDEC_MISC] + 0x100; + for (j =3D 0; j < 132; j++) + ctx->dev->vdec_racing_info[j] =3D readl(vdec_racing_addr + j * 4); + } + mutex_unlock(&ctx->dev->dec_racing_info_mutex); +} + static struct mtk_vcodec_pm *mtk_vcodec_dec_get_pm(struct mtk_vcodec_dev *= vdec_dev, int hw_idx) { @@ -214,11 +242,17 @@ void mtk_vcodec_dec_enable_hardware(struct mtk_vcodec= _ctx *ctx, int hw_idx) mtk_vcodec_dec_child_dev_on(ctx->dev, hw_idx); =20 mtk_vcodec_dec_enable_irq(ctx->dev, hw_idx); + + if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability)) + mtk_vcodec_load_racing_info(ctx); } EXPORT_SYMBOL_GPL(mtk_vcodec_dec_enable_hardware); =20 void mtk_vcodec_dec_disable_hardware(struct mtk_vcodec_ctx *ctx, int hw_id= x) { + if (IS_VDEC_INNER_RACING(ctx->dev->dec_capability)) + mtk_vcodec_record_racing_info(ctx); + mtk_vcodec_dec_disable_irq(ctx->dev, hw_idx); =20 mtk_vcodec_dec_child_dev_off(ctx->dev, hw_idx); diff --git a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h b/driv= ers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h index 0e3db8ccb398..eeee880eccdd 100644 --- a/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h +++ b/drivers/media/platform/mediatek/vcodec/mtk_vcodec_drv.h @@ -28,6 +28,7 @@ #define MTK_V4L2_BENCHMARK 0 #define WAIT_INTR_TIMEOUT_MS 1000 #define IS_VDEC_LAT_ARCH(hw_arch) ((hw_arch) >=3D MTK_VDEC_LAT_SINGLE_CORE) +#define IS_VDEC_INNER_RACING(capability) ((capability) & MTK_VCODEC_INNER_= RACING) =20 /* * enum mtk_hw_reg_idx - MTK hw register base index @@ -357,6 +358,7 @@ enum mtk_vdec_format_types { MTK_VDEC_FORMAT_H264_SLICE =3D 0x100, MTK_VDEC_FORMAT_VP8_FRAME =3D 0x200, MTK_VDEC_FORMAT_VP9_FRAME =3D 0x400, + MTK_VCODEC_INNER_RACING =3D 0x20000, }; =20 /** @@ -478,6 +480,10 @@ struct mtk_vcodec_enc_pdata { * @subdev_dev: subdev hardware device * @subdev_prob_done: check whether all used hw device is prob done * @subdev_bitmap: used to record hardware is ready or not + * + * @dec_active_cnt: used to mark whether need to record register value + * @vdec_racing_info: record register value + * @dec_racing_info_mutex: mutex lock used for inner racing mode */ struct mtk_vcodec_dev { struct v4l2_device v4l2_dev; @@ -523,6 +529,11 @@ struct mtk_vcodec_dev { void *subdev_dev[MTK_VDEC_HW_MAX]; int (*subdev_prob_done)(struct mtk_vcodec_dev *vdec_dev); DECLARE_BITMAP(subdev_bitmap, MTK_VDEC_HW_MAX); + + atomic_t dec_active_cnt; + u32 vdec_racing_info[132]; + /* Protects access to vdec_racing_info data */ + struct mutex dec_racing_info_mutex; }; =20 static inline struct mtk_vcodec_ctx *fh_to_ctx(struct v4l2_fh *fh) diff --git a/drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_mult= i_if.c b/drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_multi_if= .c index 1d9e753cf894..394b76e5d6c3 100644 --- a/drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_multi_if.c +++ b/drivers/media/platform/mediatek/vcodec/vdec/vdec_h264_req_multi_if.c @@ -626,6 +626,17 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, st= ruct mtk_vcodec_mem *bs, goto err_scp_decode; } =20 + share_info->trans_end =3D inst->ctx->msg_queue.wdma_addr.dma_addr + + inst->vsi->wdma_end_addr_offset; + share_info->trans_start =3D inst->ctx->msg_queue.wdma_wptr_addr; + share_info->nal_info =3D inst->vsi->dec.nal_info; + + if (IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { + memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params, + sizeof(share_info->h264_slice_params)); + vdec_msg_queue_qbuf(&inst->ctx->dev->msg_queue_core_ctx, lat_buf); + } + /* wait decoder done interrupt */ timeout =3D mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED, WAIT_INTR_TIMEOUT_MS, MTK_VDEC_LAT0); @@ -639,18 +650,22 @@ static int vdec_h264_slice_lat_decode(void *h_vdec, s= truct mtk_vcodec_mem *bs, =20 share_info->trans_end =3D inst->ctx->msg_queue.wdma_addr.dma_addr + inst->vsi->wdma_end_addr_offset; - share_info->trans_start =3D inst->ctx->msg_queue.wdma_wptr_addr; - share_info->nal_info =3D inst->vsi->dec.nal_info; vdec_msg_queue_update_ube_wptr(&lat_buf->ctx->msg_queue, share_info->tran= s_end); =20 - memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params, - sizeof(share_info->h264_slice_params)); - vdec_msg_queue_qbuf(&inst->ctx->dev->msg_queue_core_ctx, lat_buf); + if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) { + memcpy(&share_info->h264_slice_params, &inst->vsi->h264_slice_params, + sizeof(share_info->h264_slice_params)); + vdec_msg_queue_qbuf(&inst->ctx->dev->msg_queue_core_ctx, lat_buf); + } + mtk_vcodec_debug(inst, "dec num: %d lat crc: 0x%x 0x%x 0x%x", inst->slice= _dec_num, + inst->vsi->dec.crc[0], inst->vsi->dec.crc[1], inst->vsi->dec.crc[2]); =20 inst->slice_dec_num++; return 0; =20 err_scp_decode: + if (!IS_VDEC_INNER_RACING(inst->ctx->dev->dec_capability)) + vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); err_free_fb_out: vdec_msg_queue_qbuf(&inst->ctx->msg_queue.lat_ctx, lat_buf); mtk_vcodec_err(inst, "slice dec number: %d err: %d", inst->slice_dec_num,= err); --=20 2.18.0