From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0505EC433EF for ; Thu, 12 May 2022 20:56:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358509AbiELU4X (ORCPT ); Thu, 12 May 2022 16:56:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55894 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343780AbiELU4P (ORCPT ); Thu, 12 May 2022 16:56:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59B6236B65; Thu, 12 May 2022 13:56:13 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id C65E51F4585A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388972; bh=voeNFipaVaDn/LgNQuPTER6uB6OG5ivBXpY5Y5avsJo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ibQT9H69p13pHw/SCdfFDl4IahMmjlK46esoyQ20qVmwLCyRt0pAj61h5goMuOnrs xfW8CPDIOoSw72WSs63bolVyKJ/h0Byr+kWjjpeQI1KGDuJnO1hyHBkfzfNHPehFZ0 XUyNyBEju0tksLRRxOKHd4xft/UquyctJxThapJbEWuw43SFN/3tLeFZjy2zMf+VOV PZ5lSO2wcc0nHv9BlnW+v7Gq66qgCmGGfkULttndqObITuIT/nlpuI8/sqIn0CTJ9o t6qltg7vlvSR8MiROdqkYbEW0W6xNpluvMHmgGj3m79AcFKwJ6n1Czcglz7a7ITOTb Q2Q1ZYWs8qWgw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Allen-KH Cheng , Fabien Parent , Hsin-Yi Wang , Krzysztof Kozlowski , Maxim Kutnij , Rob Herring , Sam Shih , Sean Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 01/16] dt-bindings: arm64: dts: mediatek: Add mt8192-asurada-spherion Date: Thu, 12 May 2022 16:55:47 -0400 Message-Id: <20220512205602.158273-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for the Google Spherion board, which is used for Acer Chromebook 514 (CB514-2H). Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai Acked-by: Rob Herring --- (no changes since v2) Changes in v2: - Added this patch Documentation/devicetree/bindings/arm/mediatek.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 4a2bd9759c47..43fc3417e786 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -131,6 +131,14 @@ properties: - enum: - mediatek,mt8183-evb - const: mediatek,mt8183 + - description: Google Spherion (Acer Chromebook 514) + items: + - const: google,spherion-rev3 + - const: google,spherion-rev2 + - const: google,spherion-rev1 + - const: google,spherion-rev0 + - const: google,spherion + - const: mediatek,mt8192 - items: - enum: - mediatek,mt8192-evb --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21D32C433EF for ; Thu, 12 May 2022 20:56:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242972AbiELU41 (ORCPT ); Thu, 12 May 2022 16:56:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55990 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1357898AbiELU4Q (ORCPT ); Thu, 12 May 2022 16:56:16 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A89323B577; Thu, 12 May 2022 13:56:15 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 88FDF1F4585F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388974; bh=kTECtCnCJdyMoV3IS+2RVEgM65NrW1WbxMJuwruw03E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OXGD2zK3BE4xVxhQRivWQ0Itlq3pyAv1CSGziKJxycwm2Fb3SAnnBMOcrfMvJKvey urb3gzBfaBXh/qD+brsNxa8idBkeEYaRhs5N/pGBg1XNxzjvDZU7E1VbdI7fTW5vZL IcEp7H+Z9L62xLkAPhf+9tBC1YW/SO92xkB9rEHLNKkd3nYnXA1m/jBMmUudWMYK2W 9BnT44SeLsbn+AxV8YZQiVkxAZBpyggxXQ5iAMEwo3lhE7RJwdHNLXh0G4P+mcsaSz egxU8BuvImVb0nm2YATqRnz8OwFfFcBdTPjwEnQqm5iNGMQGRl0rq3woqGstUNT3RM Qyyed422g6UVQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Allen-KH Cheng , Hsin-Yi Wang , Krzysztof Kozlowski , Maxim Kutnij , Rob Herring , Sam Shih , Sean Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 02/16] dt-bindings: arm64: dts: mediatek: Add mt8192-asurada-hayato Date: Thu, 12 May 2022 16:55:48 -0400 Message-Id: <20220512205602.158273-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for the Google Hayato board. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai Acked-by: Rob Herring --- (no changes since v2) Changes in v2: - Added this patch Documentation/devicetree/bindings/arm/mediatek.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 43fc3417e786..bbe475788479 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -131,6 +131,11 @@ properties: - enum: - mediatek,mt8183-evb - const: mediatek,mt8183 + - description: Google Hayato + items: + - const: google,hayato-rev1 + - const: google,hayato + - const: mediatek,mt8192 - description: Google Spherion (Acer Chromebook 514) items: - const: google,spherion-rev3 --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4444BC433F5 for ; Thu, 12 May 2022 20:56:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358516AbiELU4c (ORCPT ); Thu, 12 May 2022 16:56:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358490AbiELU4T (ORCPT ); Thu, 12 May 2022 16:56:19 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E39164BCD; Thu, 12 May 2022 13:56:17 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id E3A041F4586A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388976; bh=10wBmgI34/J0do1CmgWx9w2vRpxw6AIOTWSkrzsF648=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=haO2jVVJrEZ4rl/0F732I3DooNC3vp3Fk8dN9sdEiv9UbT3o/uwH1+q7UmEbh2A5m wLVTJrUcBLFfzYe3meB28OGKPCSjhgBNHpEDhyofxz5ybT4usg0163HQNU8ux12wOA 6nwn3mx6LYlEUWqqH0zCg+NoY9TTBe1yvuSl5NpZoKqNRK71xrzV8WCaFKWmiWpK8y JQUdGrn4zFUFyGJjwVAFMi3eIiGDiHOQYRsW6Rz0HFoaO0t2L5HtEJJwC67O1a94/T vxY2Pp0jjOjpksqkuwdYN+iALRNYGLwDt8Ve+J53wHqA83h3Cekbr2W2iUZYHwv1Xp cOVTzIWvjnH8Q== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 03/16] arm64: dts: mediatek: Introduce MT8192-based Asurada board family Date: Thu, 12 May 2022 16:55:49 -0400 Message-Id: <20220512205602.158273-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce the MT8192 Asurada Chromebook platform, including the Asurada Spherion and Asurada Hayato boards. This is enough configuration to get serial output working on Spherion and Hayato. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Changed model name prefix from Mediatek to Google on Hayato and Spherion dts arch/arm64/boot/dts/mediatek/Makefile | 2 ++ .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 11 ++++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 13 ++++++++++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 26 +++++++++++++++++++ 4 files changed, 52 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.d= ts create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0= .dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index c7d4636a2cb7..4f2c258311d6 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -37,6 +37,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku3= 2.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-pumpkin.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-hayato-r1.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-spherion-r0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/ar= ch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts new file mode 100644 index 000000000000..00c76709a055 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + */ +/dts-v1/; +#include "mt8192-asurada.dtsi" + +/ { + model =3D "Google Hayato rev1"; + compatible =3D "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts new file mode 100644 index 000000000000..d384d584bbcf --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ +/dts-v1/; +#include "mt8192-asurada.dtsi" + +/ { + model =3D "Google Spherion (rev0 - 3)"; + compatible =3D "google,spherion-rev3", "google,spherion-rev2", + "google,spherion-rev1", "google,spherion-rev0", + "google,spherion", "mediatek,mt8192"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi new file mode 100644 index 000000000000..277bd38943fe --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2020 MediaTek Inc. + * Author: Seiya Wang + */ +/dts-v1/; +#include "mt8192.dtsi" + +/ { + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0 0x80000000>; + }; +}; + +&uart0 { + status =3D "okay"; +}; --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE559C433F5 for ; Thu, 12 May 2022 20:56:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358499AbiELU4g (ORCPT ); Thu, 12 May 2022 16:56:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358494AbiELU4V (ORCPT ); Thu, 12 May 2022 16:56:21 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A1147674DF; Thu, 12 May 2022 13:56:19 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id B80741F458B5 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388978; bh=fiBaCyrf7h8x5bjTRdPMlGfXIm342Oj/a4cpeBrl3sU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l+f9zEJ7VP9MzXzt0IYfsdkQE5fmFJAWRys3zfcykJ7fyL0tU9TXWzGsyThYNFSeS 9IrI4kaAD5tjNG5DQsUCK/aWja94qxkiOjDfFUO3bV6smV8Knj0m7hYP5XH+7PoJs/ 8HYDvXmUsMXVMyGAsTpm3VZPyxSjgO5IiUVgViC6REKkhjLOOe//OQttjOEe261UpH R9kPnxT+sWLVcLlLiMAX8N291r2gTzNQCn0kRuEDYkruQDtkAsf6Kx0U89tbydxCv1 gfRZomC2LW1VfKdtQu3Z9xc5apsaUQ61enOD8MOBQnANh9bgv+zAlawvGfVVxQAlx2 fGgod38F3Tw0w== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 04/16] arm64: dts: mediatek: asurada: Document GPIO names Date: Thu, 12 May 2022 16:55:50 -0400 Message-Id: <20220512205602.158273-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the gpio-line-names property to gpio-controller in order to document the usage of GPIOs on the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 228 ++++++++++++++++++ 1 file changed, 228 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 277bd38943fe..e10636298639 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -21,6 +21,234 @@ memory@40000000 { }; }; =20 +&pio { + /* 220 lines */ + gpio-line-names =3D "I2S_DP_LRCK", + "IS_DP_BCLK", + "I2S_DP_MCLK", + "I2S_DP_DATAOUT", + "SAR0_INT_ODL", + "EC_AP_INT_ODL", + "EDPBRDG_INT_ODL", + "DPBRDG_INT_ODL", + "DPBRDG_PWREN", + "DPBRDG_RST_ODL", + "I2S_HP_MCLK", + "I2S_HP_BCK", + "I2S_HP_LRCK", + "I2S_HP_DATAIN", + /* + * AP_FLASH_WP_L is crossystem ABI. Schematics + * call it AP_FLASH_WP_ODL. + */ + "AP_FLASH_WP_L", + "TRACKPAD_INT_ODL", + "EC_AP_HPD_OD", + "SD_CD_ODL", + "HP_INT_ODL_ALC", + "EN_PP1000_DPBRDG", + "AP_GPIO20", + "TOUCH_INT_L_1V8", + "UART_BT_WAKE_ODL", + "AP_GPIO23", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_CLK", + "EN_PP3300_DPBRDG_DX", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_MISO", + "I2S_HP_DATAOUT", + "AP_GPIO30", + "I2S_SPKR_MCLK", + "I2S_SPKR_BCLK", + "I2S_SPKR_LRCK", + "I2S_SPKR_DATAIN", + "I2S_SPKR_DATAOUT", + "AP_SPI_H1_TPM_CLK", + "AP_SPI_H1_TPM_CS_L", + "AP_SPI_H1_TPM_MISO", + "AP_SPI_H1_TPM_MOSI", + "BL_PWM", + "EDPBRDG_PWREN", + "EDPBRDG_RST_ODL", + "EN_PP3300_HUB", + "HUB_RST_L", + "", + "", + "", + "", + "", + "", + "SD_CLK", + "SD_CMD", + "SD_DATA3", + "SD_DATA0", + "SD_DATA2", + "SD_DATA1", + "", + "", + "", + "", + "", + "", + "PCIE_WAKE_ODL", + "PCIE_RST_L", + "PCIE_CLKREQ_ODL", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SPMI_SCL", + "SPMI_SDA", + "AP_GOOD", + "UART_DBG_TX_AP_RX", + "UART_AP_TX_DBG_RX", + "UART_AP_TX_BT_RX", + "UART_BT_TX_AP_RX", + "MIPI_DPI_D0_R", + "MIPI_DPI_D1_R", + "MIPI_DPI_D2_R", + "MIPI_DPI_D3_R", + "MIPI_DPI_D4_R", + "MIPI_DPI_D5_R", + "MIPI_DPI_D6_R", + "MIPI_DPI_D7_R", + "MIPI_DPI_D8_R", + "MIPI_DPI_D9_R", + "MIPI_DPI_D10_R", + "", + "", + "MIPI_DPI_DE_R", + "MIPI_DPI_D11_R", + "MIPI_DPI_VSYNC_R", + "MIPI_DPI_CLK_R", + "MIPI_DPI_HSYNC_R", + "PCM_BT_DATAIN", + "PCM_BT_SYNC", + "PCM_BT_DATAOUT", + "PCM_BT_CLK", + "AP_I2C_AUDIO_SCL", + "AP_I2C_AUDIO_SDA", + "SCP_I2C_SCL", + "SCP_I2C_SDA", + "AP_I2C_WLAN_SCL", + "AP_I2C_WLAN_SDA", + "AP_I2C_DPBRDG_SCL", + "AP_I2C_DPBRDG_SDA", + "EN_PP1800_DPBRDG_DX", + "EN_PP3300_EDP_DX", + "EN_PP1800_EDPBRDG_DX", + "EN_PP1000_EDPBRDG", + "SCP_JTAG0_TDO", + "SCP_JTAG0_TDI", + "SCP_JTAG0_TMS", + "SCP_JTAG0_TCK", + "SCP_JTAG0_TRSTN", + "EN_PP3000_VMC_PMU", + "EN_PP3300_DISPLAY_DX", + "TOUCH_RST_L_1V8", + "TOUCH_REPORT_DISABLE", + "", + "", + "AP_I2C_TRACKPAD_SCL_1V8", + "AP_I2C_TRACKPAD_SDA_1V8", + "EN_PP3300_WLAN", + "BT_KILL_L", + "WIFI_KILL_L", + "SET_VMC_VOLT_AT_1V8", + "EN_SPK", + "AP_WARM_RST_REQ", + "", + "", + "EN_PP3000_SD_S3", + "AP_EDP_BKLTEN", + "", + "", + "", + "AP_SPI_EC_CLK", + "AP_SPI_EC_CS_L", + "AP_SPI_EC_MISO", + "AP_SPI_EC_MOSI", + "AP_I2C_EDPBRDG_SCL", + "AP_I2C_EDPBRDG_SDA", + "MT6315_PROC_INT", + "MT6315_GPU_INT", + "UART_SERVO_TX_SCP_RX", + "UART_SCP_TX_SERVO_RX", + "BT_RTS_AP_CTS", + "AP_RTS_BT_CTS", + "UART_AP_WAKE_BT_ODL", + "WLAN_ALERT_ODL", + "EC_IN_RW_ODL", + "H1_AP_INT_ODL", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MSDC0_CMD", + "MSDC0_DAT0", + "MSDC0_DAT2", + "MSDC0_DAT4", + "MSDC0_DAT6", + "MSDC0_DAT1", + "MSDC0_DAT5", + "MSDC0_DAT7", + "MSDC0_DSL", + "MSDC0_CLK", + "MSDC0_DAT3", + "MSDC0_RST_L", + "SCP_VREQ_VAO", + "AUD_DAT_MOSI2", + "AUD_NLE_MOSI1", + "AUD_NLE_MOSI0", + "AUD_DAT_MISO2", + "AP_I2C_SAR_SDA", + "AP_I2C_SAR_SCL", + "AP_I2C_PWR_SCL", + "AP_I2C_PWR_SDA", + "AP_I2C_TS_SCL_1V8", + "AP_I2C_TS_SDA_1V8", + "SRCLKENA0", + "SRCLKENA1", + "AP_EC_WATCHDOG_L", + "PWRAP_SPI0_MI", + "PWRAP_SPI0_CSN", + "PWRAP_SPI0_MO", + "PWRAP_SPI0_CK", + "AP_RTC_CLK32K", + "AUD_CLK_MOSI", + "AUD_SYNC_MOSI", + "AUD_DAT_MOSI0", + "AUD_DAT_MOSI1", + "AUD_DAT_MISO0", + "AUD_DAT_MISO1"; +}; + &uart0 { status =3D "okay"; }; --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20D8DC433EF for ; Thu, 12 May 2022 20:56:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358535AbiELU4i (ORCPT ); Thu, 12 May 2022 16:56:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56652 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358512AbiELU4X (ORCPT ); Thu, 12 May 2022 16:56:23 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE95C674FC; Thu, 12 May 2022 13:56:21 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 080321F4586B DKIM-Signature: v=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add system-wide power supplies present on all of the boards in the Asurada family. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai Acked-by: Krzysztof Kozlowski --- Changes in v3: - Renamed nodes to be generic .../boot/dts/mediatek/mt8192-asurada.dtsi | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index e10636298639..ca55dd095e80 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -19,6 +19,70 @@ memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; }; + + /* system wide LDO 1.8V power rail */ + pp1800_ldo_g: regulator-1v8-g { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp1800_ldo_g"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&pp3300_g>; + }; + + /* system wide switching 3.3V power rail */ + pp3300_g: regulator-3v3-g { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_g"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide LDO 3.3V power rail */ + pp3300_ldo_z: regulator-3v3-z { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_ldo_z"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* separately switched 3.3V power rail */ + pp3300_u: regulator-3v3-u { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_u"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + /* enable pin wired to GPIO controlled by EC */ + vin-supply =3D <&pp3300_g>; + }; + + /* system wide switching 5.0V power rail */ + pp5000_a: regulator-5v0-a { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp5000_a"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide semi-regulated power rail from battery or USB */ + ppvar_sys: regulator-var-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "ppvar_sys"; + regulator-always-on; + regulator-boot-on; + }; }; =20 &pio { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D017EC433EF for ; Thu, 12 May 2022 20:56:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358543AbiELU4t (ORCPT ); Thu, 12 May 2022 16:56:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56728 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358517AbiELU4Z (ORCPT ); Thu, 12 May 2022 16:56:25 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 800F7674F5; Thu, 12 May 2022 13:56:23 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id EF0091F4586A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388982; bh=YqWlVpmLvyMqVh31pbNW57iaZRVckJ8tr9KyK+2OHmw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ADLIjj2n3ZAFp4Hg6jXTr9H+pg6wj9FtJseKNE+UWqtNdkGuQt7cl/xyEd9+WFulX 3YM6Kf+h4JKJTI/YCaqGIfQKSWwfZHFRdqZXKAkcJM53wbRvdzhOYd9fNoVf1IhqHJ f/Iudlfq7KgMxpJNqGD1YfGsyvdX3wfsPXO3fbNUaTR0DM/AmBPjcLrGYJphLyk2Ci dhq0gyXO/01gc9TuUMkwxzajbL3W1ePojbvGRJQHxIL/8TwnBGQkxBkKTAPZ0GQkZv QUFMwk8kLK6mFcwJDYQw/48wgbYGxij+qnZdweqRGm5sqxc+hTNCe2tNfkVfsFg/N/ EcRaHoqIqmjmw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 06/16] arm64: dts: mediatek: asurada: Enable and configure I2C and SPI busses Date: Thu, 12 May 2022 16:55:52 -0400 Message-Id: <20220512205602.158273-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform has five I2C controllers and two SPI controllers that are used. In preparation for enabling the devices connected to these controllers, enable and configure their busses. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ca55dd095e80..4fce48d0f653 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -85,6 +85,47 @@ ppvar_sys: regulator-var-sys { }; }; =20 +&i2c0 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; +}; + +&i2c1 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; +}; + +&i2c2 { + status =3D "okay"; + + clock-frequency =3D <400000>; + clock-stretch-ns =3D <12600>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; +}; + +&i2c3 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c3_pins>; +}; + +&i2c7 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c7_pins>; +}; + &pio { /* 220 lines */ gpio-line-names =3D "I2S_DP_LRCK", @@ -311,6 +352,95 @@ &pio { "AUD_DAT_MOSI1", "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <0>; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + spi1_pins: spi1-default-pins { + pins-cs-mosi-clk { + pinmux =3D , + , + ; + bias-disable; + }; + + pins-miso { + pinmux =3D ; + bias-pull-down; + }; + }; + + spi5_pins: spi5-default-pins { + pins-bus { + pinmux =3D , + , + , + ; + bias-disable; + }; + }; +}; + +&spi1 { + status =3D "okay"; + + mediatek,pad-select =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi1_pins>; +}; + +&spi5 { + status =3D "okay"; + + cs-gpios =3D <&pio 37 GPIO_ACTIVE_LOW>; + mediatek,pad-select =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi5_pins>; }; =20 &uart0 { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D013C433F5 for ; Thu, 12 May 2022 20:58:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358610AbiELU6F (ORCPT ); Thu, 12 May 2022 16:58:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358554AbiELU46 (ORCPT ); Thu, 12 May 2022 16:56:58 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0818A674FF; Thu, 12 May 2022 13:56:31 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id C77991F458B7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388984; bh=AeFfex/JVD/zQPvVyInmERUi6VeIDf4H1bEVg6p3hq4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oelGi46TkTSVx9U5OYpY1f1QGBQpol128N84Wt7Qg+e8HbVTUcjJcRVSNBSn1qpVD zrLG45adeLt2RFtWGWLXpNbPh0hCC0w4zwZKr4PTIuoAQvBv4krIj0FNhc+IrF53dK wfL/T+rvMzMPQl6JxpEALD8vNg6iauaa7bO9TCYF/FAGSQkRKrqDqypOhS9PpT7e45 FX9N8B1rE5jpTvGW593HZWKEX2e3qqKICKqL9U/5eIvR8RXv9nRFdpYWPV/tiTqc4+ fxlkwV32OM7wYyH2LYtqB5vmuicT6WfjnbIdyrhW1ivE0ftP7gMdbK9yMBMSTCg9B9 B5qUmnoojj7RQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 07/16] arm64: dts: mediatek: asurada: Add ChromeOS EC Date: Thu, 12 May 2022 16:55:53 -0400 Message-Id: <20220512205602.158273-8-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Renamed PWM subnode to avoid dt-binding warning (ec-pwm -> pwm) .../boot/dts/mediatek/mt8192-asurada.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 4fce48d0f653..bcfa688b67f7 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -353,6 +353,14 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; =20 + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux =3D , @@ -432,6 +440,74 @@ &spi1 { mediatek,pad-select =3D <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&spi1_pins>; + + cros_ec: ec@0 { + compatible =3D "google,cros-ec-spi"; + reg =3D <0>; + interrupts-extended =3D <&pio 5 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <3000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cros_ec_int>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + base_detection: cbas { + compatible =3D "google,cros-cbas"; + }; + + cros_ec_pwm: pwm { + compatible =3D "google,cros-ec-pwm"; + #pwm-cells =3D <1>; + + status =3D "disabled"; + }; + + i2c_tunnel: i2c-tunnel { + compatible =3D "google,cros-ec-i2c-tunnel"; + google,remote-bus =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mt6360_ldo3_reg: regulator@0 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <0>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + }; + + mt6360_ldo5_reg: regulator@1 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <1>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + typec { + compatible =3D "google,cros-ec-typec"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_c0: connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + label =3D "left"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + + usb_c1: connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + label =3D "right"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + }; + }; }; =20 &spi5 { @@ -446,3 +522,6 @@ &spi5 { &uart0 { status =3D "okay"; }; + +#include +#include --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A483FC433F5 for ; Thu, 12 May 2022 20:57:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358666AbiELU5G (ORCPT ); Thu, 12 May 2022 16:57:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358563AbiELU47 (ORCPT ); Thu, 12 May 2022 16:56:59 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0678367D14; Thu, 12 May 2022 13:56:33 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 013401F458B5 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388992; bh=+BNmslGrnrGfRi8LVBnEQQZU/Jy/1MkC2zZ90CW0O9U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jFenFtbJ2sxBVbR3/dCRYNnEyOsAL0pk33JR7lrgpapqt36vF8TSialS7z6NWcaW0 7H9ARGjN/EY0/A/9VaStOLRsu9rmTtWYH56mxvpThdyno6OAFgsGJQbpl4HXDUJ6bv dgS8TS+iOc7CIzhfmWfVn3aAkrnwKA2Oid04a8yTj18ZkM8s9DRGCs6a6quYLfY0mp luU/cEcSnRVHTId/EnzTt69JWX4WPfCc2UClI7+6Tm/hUAkA8Ow0dqJutktKOdgyGe NDr2kI/+99glCa4h/8BYJWz6HkK716Ca5O44blCpZcBVf9frO+DG+rj381JsYCBJCB nmDaqaigz5jdQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 08/16] arm64: dts: mediatek: asurada: Add keyboard mapping for the top row Date: Thu, 12 May 2022 16:55:54 -0400 Message-Id: <20220512205602.158273-9-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Chromebooks' embedded keyboards differ from standard layouts for the top row in that they have shortcuts in place of the standard function keys. Map these keys to achieve the functionality that is pictured on the printouts. There's a minor difference between the keys present on Hayato, which uses an older layout, and Spherion, which uses a newer one. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v3: - Moved keyboard layout definition to hayato and spherion dts files, instead of common one in asurada dtsi - Changed hayato layout to be the same as older Chromebooks like Kevin - Switched KEY_ZOOM for KEY_FULL_SCREEN, just for semantics - Updated commit message .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 29 +++++++++++++++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 29 +++++++++++++++++++ 2 files changed, 58 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/ar= ch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts index 00c76709a055..ca18fcf2ad4f 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -9,3 +9,32 @@ / { model =3D "Google Hayato rev1"; compatible =3D "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; }; + +&keyboard_controller { + function-row-physmap =3D < + MATRIX_KEY(0x00, 0x02, 0) /* T1 */ + MATRIX_KEY(0x03, 0x02, 0) /* T2 */ + MATRIX_KEY(0x02, 0x02, 0) /* T3 */ + MATRIX_KEY(0x01, 0x02, 0) /* T4 */ + MATRIX_KEY(0x03, 0x04, 0) /* T5 */ + MATRIX_KEY(0x02, 0x04, 0) /* T6 */ + MATRIX_KEY(0x01, 0x04, 0) /* T7 */ + MATRIX_KEY(0x02, 0x09, 0) /* T8 */ + MATRIX_KEY(0x01, 0x09, 0) /* T9 */ + MATRIX_KEY(0x00, 0x04, 0) /* T10 */ + >; + linux,keymap =3D < + MATRIX_KEY(0x00, 0x02, KEY_BACK) + MATRIX_KEY(0x03, 0x02, KEY_FORWARD) + MATRIX_KEY(0x02, 0x02, KEY_REFRESH) + MATRIX_KEY(0x01, 0x02, KEY_FULL_SCREEN) + MATRIX_KEY(0x03, 0x04, KEY_SCALE) + MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) + MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) + MATRIX_KEY(0x02, 0x09, KEY_MUTE) + MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) + MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) + + CROS_STD_MAIN_KEYMAP + >; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index d384d584bbcf..30b03895de41 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -11,3 +11,32 @@ / { "google,spherion-rev1", "google,spherion-rev0", "google,spherion", "mediatek,mt8192"; }; + +&keyboard_controller { + function-row-physmap =3D < + MATRIX_KEY(0x00, 0x02, 0) /* T1 */ + MATRIX_KEY(0x03, 0x02, 0) /* T2 */ + MATRIX_KEY(0x02, 0x02, 0) /* T3 */ + MATRIX_KEY(0x01, 0x02, 0) /* T4 */ + MATRIX_KEY(0x03, 0x04, 0) /* T5 */ + MATRIX_KEY(0x02, 0x04, 0) /* T6 */ + MATRIX_KEY(0x01, 0x04, 0) /* T7 */ + MATRIX_KEY(0x02, 0x09, 0) /* T8 */ + MATRIX_KEY(0x01, 0x09, 0) /* T9 */ + MATRIX_KEY(0x00, 0x04, 0) /* T10 */ + >; + linux,keymap =3D < + MATRIX_KEY(0x00, 0x02, KEY_BACK) + MATRIX_KEY(0x03, 0x02, KEY_REFRESH) + MATRIX_KEY(0x02, 0x02, KEY_FULL_SCREEN) + MATRIX_KEY(0x01, 0x02, KEY_SCALE) + MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) + MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) + MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) + MATRIX_KEY(0x02, 0x09, KEY_MUTE) + MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) + MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) + + CROS_STD_MAIN_KEYMAP + >; +}; --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C68B3C433FE for ; Thu, 12 May 2022 20:57:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358546AbiELU5Q (ORCPT ); Thu, 12 May 2022 16:57:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358545AbiELU5A (ORCPT ); Thu, 12 May 2022 16:57:00 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7CCA68F8F; Thu, 12 May 2022 13:56:35 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id ED4B11F45945 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388994; bh=8931BEPpRMo9jwNwHld86dfIKOtzN61ZDy8g9afbC0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YLxYb8ta5a6kjhDiboyTyxwDCKdK4bJow0DMQO6QC7D/gKxdW7+8Fbv2zPWwOqZ8/ 7XxA+B/UZKBQ8xlRHlV/2RhGp8BXp2aSNsteFCxBWsmRMtc2BFD6z8C5i59nR5fOM4 jqy0E+NieQ3PA92yNOT7lk1b+a6gtdgnjMHQjc+1/Bi4CoASmBzjFkbx/mNGR928+3 C0L6o2DmUmq+mO+FQZRRl7fHadtFSNEUxZ839TouRp+FZ6MJwkmYYG5zzNoNstHhan apVGdkDdplpM/CDhpXtz0c4K2RvDkpLXcPCGzXrdFrbLwHhS/PXoxDygp/lz+DMgUz T3cdxUc4D9C9Q== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 09/16] arm64: dts: mediatek: asurada: Add Cr50 TPM Date: Thu, 12 May 2022 16:55:55 -0400 Message-Id: <20220512205602.158273-10-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform has a Google Security Chip connected to the SPI5 bus. It runs the cr50 firmware and provides TPM functionality. Add support for it. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index bcfa688b67f7..ddf18861edad 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include =20 / { aliases { @@ -353,6 +354,13 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; =20 + cr50_int: cr50-irq-default-pins { + pins-gsc-ap-int-odl { + pinmux =3D ; + input-enable; + }; + }; + cros_ec_int: cros-ec-irq-default-pins { pins-ec-ap-int-odl { pinmux =3D ; @@ -517,6 +525,15 @@ &spi5 { mediatek,pad-select =3D <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&spi5_pins>; + + cr50@0 { + compatible =3D "google,cr50"; + reg =3D <0>; + interrupts-extended =3D <&pio 171 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency =3D <1000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cr50_int>; + }; }; =20 &uart0 { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27785C4332F for ; Thu, 12 May 2022 20:57:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358614AbiELU5M (ORCPT ); Thu, 12 May 2022 16:57:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59334 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358571AbiELU5A (ORCPT ); Thu, 12 May 2022 16:57:00 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9055A68FA3; Thu, 12 May 2022 13:56:37 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id C44701F45948 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388996; bh=j9EKFrnbOZbyTcEQCEWfG2IS74kguTTzKhClb3b7Sbg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HJ8wu6AYCA+FpIEs9q8u7ovvjzcuuduExswm/0ZNchZ7YXJhw1nHCIZxRFBTtOveS w/DZz7DRShWZ3LLaz17T1ZF8srgWgCZIrAa4J6y6OSgItZ8CRewkgRcwiml6Qb/ojd UFw3SZ9bt3tsf2Tg89pbOZ5zhsjExbmuRzukLJKBSijxb1p/JDQ3zUfZ69+jOaRaIJ gTOulhx+Rpkr/vtFoz3gSEggfsbBJBw1dJM+m6TTSoY7oVZ+gkAkiW53Cps09kMH4n WNOZtYFsETBGGHwOBzDHpG3yUwHXdHRjfLSaMb2nVY4pDnj6GGG6Rg6mB28mlx89hW cycLiWuUtha9w== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 10/16] arm64: dts: mediatek: asurada: Add Elan eKTH3000 I2C trackpad Date: Thu, 12 May 2022 16:55:56 -0400 Message-Id: <20220512205602.158273-11-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the Elan eKTH3000 i2c trackpad present on Asurada. It is connected to the I2C2 bus and has address 0x15. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ddf18861edad..a63b3c86d650 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -109,6 +109,16 @@ &i2c2 { clock-stretch-ns =3D <12600>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c2_pins>; + + trackpad@15 { + compatible =3D "elan,ekth3000"; + reg =3D <0x15>; + interrupts-extended =3D <&pio 15 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&trackpad_pins>; + vcc-supply =3D <&pp3300_u>; + wakeup-source; + }; }; =20 &i2c3 { @@ -440,6 +450,14 @@ pins-bus { bias-disable; }; }; + + trackpad_pins: trackpad-default-pins { + pins-int-n { + pinmux =3D ; + input-enable; + mediatek,pull-up-adv =3D <3>; + }; + }; }; =20 &spi1 { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1EF45C433EF for ; Thu, 12 May 2022 20:57:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358529AbiELU5W (ORCPT ); Thu, 12 May 2022 16:57:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358580AbiELU5A (ORCPT ); Thu, 12 May 2022 16:57:00 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 43DA16928F; Thu, 12 May 2022 13:56:39 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id B734F1F45AAB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652388998; bh=oen+/Gb8r5CVD7w+WMrsnQB9YhJdlf1/8shCrq8Zx0E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GskHdfBKxcpmG8k23Wmh35zEM4lO+jrgugX00nQAHsGJNvbilMGeQQDMyKckAVan4 nQg2qBMWLR2CakJnlWheApUbHIwav3PNRwsLZ7OMS55SGBbK5W0MKdO7m2MaPeL+2V zXOn4OTSngs3m3IJjajwBLAz5wJpbgWoMJFhgdfrPSTpPh2aL6zrV/BDa6If2yvQ9i qPtRa0eTgsq6VDq4x7vYtF9qye7zC2/oCufKXLuGpog8qExGGF4+sraTaVw9bh5n/D aQbed6V00oFqN1XXhkIVWSbIFBFGddbKlxrw2XGS0p5z0h0wDpAvK6XuHLXn0qsoXn 1Lcaiz7sy9rlw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 11/16] arm64: dts: mediatek: asurada: Add I2C touchscreen Date: Thu, 12 May 2022 16:55:57 -0400 Message-Id: <20220512205602.158273-12-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All machines of the Asurada platform have a touchscreen at address 0x10 in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500 touchscreen, while Hayato has a generic HID-over-i2c touchscreen. Add common support for the touchscreens on the platform and the specifics in each board file. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 7 ++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 4 +++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 25 +++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/ar= ch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts index ca18fcf2ad4f..1e91491945f6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -38,3 +38,10 @@ MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) CROS_STD_MAIN_KEYMAP >; }; + +&touchscreen { + compatible =3D "hid-over-i2c"; + post-power-on-delay-ms =3D <10>; + hid-descr-addr =3D <0x0001>; + vdd-supply =3D <&pp3300_u>; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index 30b03895de41..42db81e95fae 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -40,3 +40,7 @@ MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) CROS_STD_MAIN_KEYMAP >; }; + +&touchscreen { + compatible =3D "elan,ekth3500"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a63b3c86d650..d9c9852339a8 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -92,6 +92,13 @@ &i2c0 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c0_pins>; + + touchscreen: touchscreen@10 { + reg =3D <0x10>; + interrupts-extended =3D <&pio 21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touchscreen_pins>; + }; }; =20 &i2c1 { @@ -458,6 +465,24 @@ pins-int-n { mediatek,pull-up-adv =3D <3>; }; }; + + touchscreen_pins: touchscreen-default-pins { + pins-irq { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + + pins-reset { + pinmux =3D ; + output-high; + }; + + pins-report-sw { + pinmux =3D ; + output-low; + }; + }; }; =20 &spi1 { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EB61C433EF for ; Thu, 12 May 2022 20:57:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356416AbiELU5b (ORCPT ); Thu, 12 May 2022 16:57:31 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59456 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358589AbiELU5A (ORCPT ); Thu, 12 May 2022 16:57:00 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1051669489; Thu, 12 May 2022 13:56:41 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 795211F4594C DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389000; bh=AvMwfFz84n7mWn1AEG/JaA3AcQAUeEhq/lBH3WEQF0Y=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MggD2rIG0lKJ4ye2ygbo29X/qSCnndouDiIQk8LR80/qzZkhqeKSsKdoWK5SzkJTa zK26AGjZ43qiLEEk7sDIcvqm4FTGDXun74huEVPFt/sSoPkcrUXnhmmW/EpYBW/7XD hkvLJK2zTTThug6Ea7UBtop6gyyVWqBwm/gt7ztJDe2b+onPvUx0yS42B/MJsRP3mY AlSXhde6ANA2Hi7LpkLHGmc0L7YIefbXPAu+CHlxAE6C8/9wc4V40OC45+K+xkD+Ki qknlv9EGR/mIYATzZrWKQga5x3jJ4J/R7+xgCZFt2ty15uHnjGZcVm+2vXD1IvDw2z 8PauEqfq5sizg== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 12/16] arm64: dts: mediatek: spherion: Add keyboard backlight Date: Thu, 12 May 2022 16:55:58 -0400 Message-Id: <20220512205602.158273-13-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Spherion board has keyboard backlight controlled by the PWM signal generated by the ChromeOS EC. Enable PWM output for ChromeOS EC and add a PWM controlled LED node for the keyboard backlight. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../dts/mediatek/mt8192-asurada-spherion-r0.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index 42db81e95fae..fa3d9573f37a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -4,12 +4,28 @@ */ /dts-v1/; #include "mt8192-asurada.dtsi" +#include =20 / { model =3D "Google Spherion (rev0 - 3)"; compatible =3D "google,spherion-rev3", "google,spherion-rev2", "google,spherion-rev1", "google,spherion-rev0", "google,spherion", "mediatek,mt8192"; + + pwmleds { + compatible =3D "pwm-leds"; + + led { + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + pwms =3D <&cros_ec_pwm 0>; + max-brightness =3D <1023>; + }; + }; +}; + +&cros_ec_pwm { + status =3D "okay"; }; =20 &keyboard_controller { --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D585C433F5 for ; Thu, 12 May 2022 20:57:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358556AbiELU5v (ORCPT ); Thu, 12 May 2022 16:57:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59614 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358537AbiELU5C (ORCPT ); Thu, 12 May 2022 16:57:02 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53C296970B; Thu, 12 May 2022 13:56:43 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 521881F45AAA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389002; bh=GrZDgZ5n77I8KtnjA2tOlTRA6mI8tLLdvbtiFZXUTG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RU7yVXKMRydUYzQRyyhaqN22pMIXICErdzLysumVSWsTvVh2ykx91P6ya5K1xuOr4 bnndX9h8DfFGC39p68a77R/glGAXwKjNVabl1xUHEWjIrwx19kB66OVmUUL2uAIbQ3 lGU3pB6s4hlRlofDYaM3MYL2TuzSjKFJZc1Oke3ZkEpE3qveHSmOnNvPxO8Pj8iuhF h9reHCdOSEzjmHxQABet1e8eXIPOby31AH4CyaJlmIIaz3rQeYFmxSYnt0t6MjwXpX E48kMIRmvxooddEfnOf5R1TMuMRuKrvg1J4Qxq8e2VTFMT+AkUIOwTTbdGI0iihdbX J4l3W/In322LQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 13/16] arm64: dts: mediatek: asurada: Enable XHCI Date: Thu, 12 May 2022 16:55:59 -0400 Message-Id: <20220512205602.158273-14-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable XHCI controller on the Asurada platform. This allows the use of the USB ports, and therefore a rootfs can be loaded and a usable shell reached from a live USB image. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Added this patch arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index d9c9852339a8..ecae2730789e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -583,5 +583,13 @@ &uart0 { status =3D "okay"; }; =20 +&xhci { + status =3D "okay"; + + wakeup-source; + vusb33-supply =3D <&pp3300_g>; + vbus-supply =3D <&pp5000_a>; +}; + #include #include --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39DBEC433EF for ; Thu, 12 May 2022 20:57:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358558AbiELU5k (ORCPT ); Thu, 12 May 2022 16:57:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358613AbiELU5E (ORCPT ); Thu, 12 May 2022 16:57:04 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AE91869CD5; Thu, 12 May 2022 13:56:45 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 79CEF1F45AAB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389004; bh=i7Z2W6YC5XDeB3fbg7wPBOxu/CQV/7/SaA7a+o0HOSo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l9+Fvbu8wTUi1CFOOJfCnD2jxLfrwNzOZxzZ/fboIaNLXkDYcSHLCf6qL1o3C18MP 1JUo7sQqTr7QHGmPEbjUVG13aqSXCTfXR1syo/RPGzBsoZ/0C0QP4EkNthe/5aRExS AsFRMSEGaswkzPIx+uFdFuK8pmwa9juMTzWIwkSNe/8QueDTRDgixBVeHIDvq0CdUB CcFidUoXzQ72XxV25ZIRpRd1veVcO9J425Lm8bSbf03SRmBOzvqKooz0GpI91OHoaJ 4AIoYMeiADPJAyH09C1u1+b3eo5IM54g4Hf2AQp7sRTUbTDVd1RjrKWI4TyMKC/kmV vjUpXF4ijxuaw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 14/16] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi Date: Thu, 12 May 2022 16:56:00 -0400 Message-Id: <20220512205602.158273-15-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v3: - Renamed regulator node to be generic Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index ecae2730789e..dde4de27ec61 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -66,6 +66,19 @@ pp3300_u: regulator-3v3-u { vin-supply =3D <&pp3300_g>; }; =20 + pp3300_wlan: regulator-3v3-wlan { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_wlan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pp3300_wlan_pins>; + enable-active-high; + gpio =3D <&pio 143 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 5.0V power rail */ pp5000_a: regulator-5v0-a { compatible =3D "regulator-fixed"; @@ -84,6 +97,17 @@ ppvar_sys: regulator-var-sys { regulator-always-on; regulator-boot-on; }; + + reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + wifi_restricted_dma_region: wifi@c0000000 { + compatible =3D "restricted-dma-pool"; + reg =3D <0 0xc0000000 0 0x4000000>; + }; + }; }; =20 &i2c0 { @@ -144,6 +168,28 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins>; + + pcie0: pcie@0,0 { + device_type =3D "pci"; + reg =3D <0x0000 0 0 0 0>; + num-lanes =3D <1>; + bus-range =3D <0x1 0x1>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + wifi: wifi@0,0 { + reg =3D <0x10000 0 0 0 0x100000>, + <0x10000 0 0x100000 0 0x100000>; + memory-region =3D <&wifi_restricted_dma_region>; + }; + }; +}; + &pio { /* 220 lines */ gpio-line-names =3D "I2S_DP_LRCK", @@ -434,6 +480,34 @@ pins-bus { }; }; =20 + pcie_pins: pcie-default-pins { + pins-pcie-wake { + pinmux =3D ; + bias-pull-up; + }; + + pins-pcie-pereset { + pinmux =3D ; + }; + + pins-pcie-clkreq { + pinmux =3D ; + bias-pull-up; + }; + + pins-wifi-kill { + pinmux =3D ; /* WIFI_KILL_L */ + output-high; + }; + }; + + pp3300_wlan_pins: pp3300-wlan-pins { + pins-pcie-en-pp3300-wlan { + pinmux =3D ; + output-high; + }; + }; + spi1_pins: spi1-default-pins { pins-cs-mosi-clk { pinmux =3D , --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2445C433FE for ; Thu, 12 May 2022 20:57:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355546AbiELU5q (ORCPT ); Thu, 12 May 2022 16:57:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58218 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358625AbiELU5E (ORCPT ); Thu, 12 May 2022 16:57:04 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 771F06A002; Thu, 12 May 2022 13:56:47 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 7F2681F45AAD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389006; bh=xtfilwAIz+kMj8zKckclhyx6wIdcdbRqk0LZq8rnQiA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Abu7N6UN4djRf/QA0Fn7tWwjX/sAtenySEuU9whrXjRORmTGZp/ZL1nNoOXWN2Yum tP4ONGcRvmo4hiIvCMzCtakmZvNtMivAmMsFzhFGyoN0tNL31oovKI7HzvrkvOnIY4 CppJfqkIqV3dFmgV80Nyeo4agPTE+WtXG+Qw5AoChe3QgG5sSMAJsXNmdOBuRW5uLC dl4cdpIM0zfXx3pwNMJ0s27/zdhNTZdcOmnxiq2jJknl2Nl4xZ+ZlK3j8SIVvdHrUx 5xKePN8uXpF7L6f05wmdQFv9HcM+KLqVJu+hpICh1DC2jlSB8wM8j+KpL3hWaqFbkt u0xqCC6as48Fw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 15/16] arm64: dts: mediatek: asurada: Add MT6359 PMIC Date: Thu, 12 May 2022 16:56:01 -0400 Message-Id: <20220512205602.158273-16-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT6359 is the primary PMIC present on the Asurada platform. Include its dtsi and configure properties specific for the platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index dde4de27ec61..a53f7352f06e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include "mt6359.dtsi" #include =20 / { @@ -168,6 +169,31 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +/* for CORE */ +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_sshub_buck_reg { + regulator-always-on; + regulator-min-microvolt =3D <575000>; + regulator-max-microvolt =3D <575000>; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +&mt6359_vufs_ldo_reg { + regulator-always-on; +}; + +&mt6359codec { + mediatek,dmic-mode =3D <1>; /* one-wire */ + mediatek,mic-type-0 =3D <2>; /* DMIC */ + mediatek,mic-type-2 =3D <2>; /* DMIC */ +}; + &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie_pins>; @@ -559,6 +585,10 @@ pins-report-sw { }; }; =20 +&pmic { + interrupts-extended =3D <&pio 214 IRQ_TYPE_LEVEL_HIGH>; +}; + &spi1 { status =3D "okay"; =20 --=20 2.36.1 From nobody Sun Sep 22 01:55:29 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB5BEC433EF for ; Thu, 12 May 2022 20:58:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358573AbiELU6A (ORCPT ); Thu, 12 May 2022 16:58:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358640AbiELU5F (ORCPT ); Thu, 12 May 2022 16:57:05 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5CA0D6A036; Thu, 12 May 2022 13:56:49 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 49C271F45AAC DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1652389008; bh=u3bgLWaqCDtC2cPlVcV31sMjvrL2SuIojgozTZcaWa0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JBsnrd14WnmJAEI02AwFqisQMF9YA8XYqDzyAdJr46KoE/v/2XAsmbrVHng3EQzbJ RFWIqYBWD+mV5oeOvMTYsBj9SVMaCmJdA7dujGMygxD8mkkeFUYn9GboiImLMHEQ8P 5yeItut/AoW9HDg/pfnhwopKp1MZrhyZGkdDGlDMndFWWVbRiPoYj6N6BVDR6RJCIB ZLNqF5+oUV/sjp0Gclam+8rjVV/MPbWsmSAKEOkCHdxlPUDEpqeAoJkcG6Q0PNciY0 qvFmIfcR7vekar7Ka9Hpd4/kitSeLQZ0uFhN5DGOv/WeJal4TVCnPsbW3U8OdWuFGV iwp3qLR3/JFqw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: Chen-Yu Tsai , AngeloGioacchino Del Regno , kernel@collabora.com, =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 16/16] arm64: dts: mediatek: asurada: Add SPMI regulators Date: Thu, 12 May 2022 16:56:02 -0400 Message-Id: <20220512205602.158273-17-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220512205602.158273-1-nfraprado@collabora.com> References: <20220512205602.158273-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform uses regulators from MT6315 PMICs acessible through SPMI. Add support for them. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v2) Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a53f7352f06e..d66b008c01ab 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -7,6 +7,7 @@ #include "mt8192.dtsi" #include "mt6359.dtsi" #include +#include =20 / { aliases { @@ -683,6 +684,54 @@ cr50@0 { }; }; =20 +&spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + mt6315_6: pmic@6 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x6 SPMI_USID>; + + regulators { + mt6315_6_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vbcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + + mt6315_6_vbuck3: vbuck3 { + regulator-compatible =3D "vbuck3"; + regulator-name =3D "Vlcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + }; + }; + + mt6315_7: pmic@7 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x7 SPMI_USID>; + + regulators { + mt6315_7_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vgpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + }; + }; + }; +}; + &uart0 { status =3D "okay"; }; --=20 2.36.1