From nobody Fri May 8 03:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8A910C433FE for ; Thu, 12 May 2022 10:49:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352831AbiELKt1 (ORCPT ); Thu, 12 May 2022 06:49:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347359AbiELKtK (ORCPT ); Thu, 12 May 2022 06:49:10 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7075B2211FB; Thu, 12 May 2022 03:49:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1652352549; x=1683888549; h=from:to:cc:subject:date:message-id; bh=WcVUNsWfezfMoMiExRpGvQZ7Be8GNzfYaitAOdo5P8g=; b=p/51lHBYoABos3XW0NMqE4p1FnpOE2YtxmHn7/45HtY9lfjfaEc2Z26W ee49sUT1YyVDbtt74wn22dLXzphLC9uO+Y2yhkqwYU6xZOZnACCNp0m5i 0pL8gnCqwXyPIjMmta/R9LdJ+Cp3Rrz/5vLXU0AwaEVq0AiZ+FAuXuNA7 U=; Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 12 May 2022 03:49:08 -0700 X-QCInternal: smtphost Received: from ironmsg01-blr.qualcomm.com ([10.86.208.130]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 12 May 2022 03:49:06 -0700 X-QCInternal: smtphost Received: from blr-ubuntu-435.qualcomm.com ([10.79.42.176]) by ironmsg01-blr.qualcomm.com with ESMTP; 12 May 2022 16:18:48 +0530 Received: by blr-ubuntu-435.qualcomm.com (Postfix, from userid 2327845) id 685C19008B1; Thu, 12 May 2022 16:18:47 +0530 (IST) From: Shreyas K K To: Will Deacon , Catalin Marinas , Marc Zyngier , Suzuki K Poulose , Mark Rutland Cc: Andre Przywara , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Jeffrey Hugo , Shreyas K K , Sai Prakash Ranjan , Rajendra Nayak , Prasanna Kumar Subject: [PATCH V2] arm64: Enable repeat tlbi workaround on KRYO4XX gold CPUs Date: Thu, 12 May 2022 16:18:30 +0530 Message-Id: <20220512104830.4415-1-quic_shrekk@quicinc.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add KRYO4XX gold/big cores to the list of CPUs that need the repeat TLBI workaround. Apply this to the affected KRYO4XX cores (rcpe to rfpe). The variant and revision bits are implementation defined and are different from the their Cortex CPU counterparts on which they are based on, i.e., (r0p0 to r3p0) is equivalent to (rcpe to rfpe). Signed-off-by: Shreyas K K --- Changes in v2: * r2p0 and r3p0 are also affected by this erratum. * Add the corresponding cores (repe and rfpe) making the range rcpe to rfp= e. Documentation/arm64/silicon-errata.rst | 3 +++ arch/arm64/kernel/cpu_errata.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/Documentation/arm64/silicon-errata.rst b/Documentation/arm64/s= ilicon-errata.rst index 466cb9e89047..d27db84d585e 100644 --- a/Documentation/arm64/silicon-errata.rst +++ b/Documentation/arm64/silicon-errata.rst @@ -189,6 +189,9 @@ stable kernels. +----------------+-----------------+-----------------+--------------------= ---------+ | Qualcomm Tech. | Kryo4xx Silver | N/A | ARM64_ERRATUM_10247= 18 | +----------------+-----------------+-----------------+--------------------= ---------+ +| Qualcomm Tech. | Kryo4xx Gold | N/A | ARM64_ERRATUM_12868= 07 | ++----------------+-----------------+-----------------+--------------------= ---------+ + +----------------+-----------------+-----------------+--------------------= ---------+ | Fujitsu | A64FX | E#010001 | FUJITSU_ERRATUM_010= 001 | +----------------+-----------------+-----------------+--------------------= ---------+ diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 4c9b5b4b7a0b..9d2a3fc69066 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -208,6 +208,8 @@ static const struct arm64_cpu_capabilities arm64_repeat= _tlbi_list[] =3D { #ifdef CONFIG_ARM64_ERRATUM_1286807 { ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0), + /* Kryo4xx Gold (rcpe to rfpe) =3D> (r0p0 to r3p0) */ + ERRATA_MIDR_RANGE(QCOM_CPU_PART_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xe), }, #endif {}, --=20 2.17.1