From nobody Fri May 8 03:10:07 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 102BFC433EF for ; Thu, 12 May 2022 08:36:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351509AbiELIgi (ORCPT ); Thu, 12 May 2022 04:36:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351499AbiELIge (ORCPT ); Thu, 12 May 2022 04:36:34 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3164A6B7DE for ; Thu, 12 May 2022 01:36:33 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id q18so4206464pln.12 for ; Thu, 12 May 2022 01:36:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Dh19HuOfdtK2F7eKYedy/v965tHvbFT9B9mkJwtbUA0=; b=ybdu7ry7HXCU7gGsSZu0YTKwUSYrXBhCLjTzqhOhdYB6oEtZt83jU75Hd8NsvZ4v2O 6OIMD6U6a75r7Hnpy+2q5aZzaIlswA+/AaLrTuZc/g0kh3tTTsnqvnWc7yE6rYQhchCl pyYS6VYPdhVw9LaagT9s4dttQC6HDBdRQaO95ns7AOISeqX6qrJTSj6kYzU47hICkF/O kvudo84ZJa2ZklmQeCrO2qenpV6QeocUlKkmrjf9M8PsEtlVdfwoQjjPbEvmKuQQMRJd 5rGCO33pYjXm9RnwfPlOVm3csyYjTA9CTd3ieXiCZd1juQVmqHoIrpHQ5HQzd64o4EoQ QD5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=Dh19HuOfdtK2F7eKYedy/v965tHvbFT9B9mkJwtbUA0=; b=myJsJqKR4Hva4c+cKIXNgjYwen5fToEhX9qSxZ8wGVNrK7sfhHw0S9Qk7/77sOW2PZ jPTNFX9y8QjR7/G/Yv+NJRuJo54D+1HsZbk2WpDWVI1KPfDrXbO1TZNqU0yKrpEgnpX3 R64enBqbrzQjlC5u5hnUwUhSwsxvBEd5BTRz3KeDCB5aLWK+Nf48EbuiJr5foGVUgK0t cIMbO3SFRWfoa/ELYBTq0isjfM5SyUF5+bqU+kH8f3O+Itizpfw8lWNbZoog6MZgBCyv ax0x9DTpFmlbZfHZrO8VCYg/Vbso2yrhuWAiPCnqRw3K8vXZwHASpb440L5PumpAqYMs q/jQ== X-Gm-Message-State: AOAM530LF7RrvjLTGPLomQw7VTbW0MQhcnlWIWFqGIT/1uoiEjFgbAPB HXK783j3hboyPuOeaXU+b9aeWbBNiYoyZy4= X-Google-Smtp-Source: ABdhPJxHqU9RDjZHsCVgXg2pFU8sr7sS56Tx2FcU2aVqX5YLafxlcziyqOPAH18cBfk6Xi+lXkzl2Q== X-Received: by 2002:a17:902:ed83:b0:15c:e82a:e84f with SMTP id e3-20020a170902ed8300b0015ce82ae84fmr30095746plj.96.1652344592650; Thu, 12 May 2022 01:36:32 -0700 (PDT) Received: from localhost.localdomain ([117.217.183.109]) by smtp.gmail.com with ESMTPSA id q10-20020a170902f34a00b0015e8d4eb1d8sm3258222ple.34.2022.05.12.01.36.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 May 2022 01:36:32 -0700 (PDT) From: Manivannan Sadhasivam To: gustavo.pimentel@synopsys.com, vkoul@kernel.org Cc: dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Manivannan Sadhasivam , Serge Semin , Frank Li Subject: [PATCH] dmaengine: dw-edma: Remove runtime PM support Date: Thu, 12 May 2022 14:06:12 +0530 Message-Id: <20220512083612.122824-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently, the dw-edma driver enables the runtime_pm for parent device (chip->dev) and increments/decrements the refcount during alloc/free chan resources callbacks. This leads to a problem when the eDMA driver has been probed, but the channels were not used. This scenario can happen when the DW PCIe driver probes eDMA driver successfully, but the PCI EPF driver decides not to use eDMA channels and use iATU instead for PCI transfers. In this case, the underlying device would be runtime suspended due to pm_runtime_enable() in dw_edma_probe() and the PCI EPF driver would have no knowledge of it. Ideally, the eDMA driver should not be the one doing the runtime PM of the parent device. The responsibility should instead belong to the client drivers like PCI EPF. So let's remove the runtime PM support from eDMA driver. Cc: Serge Semin Cc: Frank Li Signed-off-by: Manivannan Sadhasivam Reviewed-by: Serge Semin --- Note: This patch is made on top of Frank and Serge's edma work, but should be applicable independently also. [PATCH v10 0/9] Enable designware PCI EP EDMA locally [PATCH v2 00/26] dmaengine: dw-edma: Add RP/EP local DMA controllers support drivers/dma/dw-edma/dw-edma-core.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-ed= ma-core.c index 561686b51915..b2b5077d380b 100644 --- a/drivers/dma/dw-edma/dw-edma-core.c +++ b/drivers/dma/dw-edma/dw-edma-core.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -731,15 +730,12 @@ static int dw_edma_alloc_chan_resources(struct dma_ch= an *dchan) dchan->dev->chan_dma_dev =3D false; } =20 - pm_runtime_get(chan->dw->chip->dev); - return 0; } =20 static void dw_edma_free_chan_resources(struct dma_chan *dchan) { unsigned long timeout =3D jiffies + msecs_to_jiffies(5000); - struct dw_edma_chan *chan =3D dchan2dw_edma_chan(dchan); int ret; =20 while (time_before(jiffies, timeout)) { @@ -752,8 +748,6 @@ static void dw_edma_free_chan_resources(struct dma_chan= *dchan) =20 cpu_relax(); } - - pm_runtime_put(chan->dw->chip->dev); } =20 static int dw_edma_channel_setup(struct dw_edma *dw, u32 wr_alloc, u32 rd_= alloc) @@ -1010,9 +1004,6 @@ int dw_edma_probe(struct dw_edma_chip *chip) if (err) goto err_irq_free; =20 - /* Power management */ - pm_runtime_enable(dev); - /* Turn debugfs on */ dw_edma_v0_core_debugfs_on(dw); =20 @@ -1046,9 +1037,6 @@ int dw_edma_remove(struct dw_edma_chip *chip) for (i =3D (dw->nr_irqs - 1); i >=3D 0; i--) free_irq(chip->ops->irq_vector(dev, i), &dw->irq[i]); =20 - /* Power management */ - pm_runtime_disable(dev); - /* Deregister eDMA device */ dma_async_device_unregister(&dw->dma); list_for_each_entry_safe(chan, _chan, &dw->dma.channels, --=20 2.25.1