From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAACDC433F5 for ; Wed, 11 May 2022 12:06:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241806AbiEKMGk (ORCPT ); Wed, 11 May 2022 08:06:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241602AbiEKMFz (ORCPT ); Wed, 11 May 2022 08:05:55 -0400 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 571A36272; Wed, 11 May 2022 05:05:44 -0700 (PDT) Received: from pps.filterd (m0127361.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24BBVHob032182; Wed, 11 May 2022 12:05:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=U7NFeBmX7FK4+C84wOKVbyY9H6yd8lJcEAKg+19/HCk=; b=BFOOMEGyn+4l/z8bTH8eb4DhB4HQvA0e5jT/wx+Ixq2oa6NH7kPYSSc4hUbAxCGv3oDj 5bzdGtqS+ngnUJBEYFD1OWa3uXoQZEANYfpOD0U4pZWQ0oMKmQykzDCFOa1ZXDGgJPlL R8+TmgKmXHcQx+nfjz/40laRQUHaVbUcPrbSWtELmVRR4r1bxUyQGul0YOBHQ0ZNvNqs Z27tStVInzKGgR/OAbzzY/Bk6pITkxgeWsYNtzIuXJ+abxj8ukBInD2NgkqOHnssZUSA v+AhfsP9DxVQSrEB1HTf9BmT7BI9KLEONsQGPdpy/Wiq1nwFvbV2pcM47w7o7ZJLm1YM ZA== Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3g099tv6e4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:40 +0000 Received: from m0127361.ppops.net (m0127361.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 24BC5eGS019242; Wed, 11 May 2022 12:05:40 GMT Received: from ppma03ams.nl.ibm.com (62.31.33a9.ip4.static.sl-reverse.com [169.51.49.98]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 3g099tv6dj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:40 +0000 Received: from pps.filterd (ppma03ams.nl.ibm.com [127.0.0.1]) by ppma03ams.nl.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 24BC2c3M007177; Wed, 11 May 2022 12:05:38 GMT Received: from b06cxnps3075.portsmouth.uk.ibm.com (d06relay10.portsmouth.uk.ibm.com [9.149.109.195]) by ppma03ams.nl.ibm.com with ESMTP id 3fwgd8wenv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:38 +0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24BC5XOc57737574 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 11 May 2022 12:05:33 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C3224A404D; Wed, 11 May 2022 12:05:33 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6CE43A4055; Wed, 11 May 2022 12:05:33 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:33 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 1/8] s390/alternatives: provide identical sized orginal/alternative sequences Date: Wed, 11 May 2022 14:05:25 +0200 Message-Id: <20220511120532.2228616-2-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: Yye6i8Osi44w3H-rZcEV292eiibaz72a X-Proofpoint-GUID: K6BmfBmemPbjrZUpI6TQm7TNQJnM-XNe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 bulkscore=0 suspectscore=0 phishscore=0 spamscore=0 mlxscore=0 mlxlogscore=357 adultscore=0 priorityscore=1501 clxscore=1011 malwarescore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Explicitly provide identical sized original/alternative instruction sequences. This way there is no need for the s390 specific alternatives infrastructure to generate padding sequences. The code which generates such sequences will be removed with a follow on patch. Signed-off-by: Heiko Carstens Acked-by: Vasily Gorbik Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/include/asm/spinlock.h | 2 +- arch/s390/kernel/entry.S | 20 ++++++++++---------- arch/s390/lib/spinlock.c | 4 ++-- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/s390/include/asm/spinlock.h b/arch/s390/include/asm/spinl= ock.h index 10a460762e94..37127cd7749e 100644 --- a/arch/s390/include/asm/spinlock.h +++ b/arch/s390/include/asm/spinlock.h @@ -79,7 +79,7 @@ static inline void arch_spin_unlock(arch_spinlock_t *lp) typecheck(int, lp->lock); kcsan_release(); asm_inline volatile( - ALTERNATIVE("", ".insn rre,0xb2fa0000,7,0", 49) /* NIAI 7 */ + ALTERNATIVE("nop", ".insn rre,0xb2fa0000,7,0", 49) /* NIAI 7 */ " sth %1,%0\n" : "=3DR" (((unsigned short *) &lp->lock)[1]) : "d" (0) : "cc", "memory"); diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index 685ccec02a27..a6b45eaa3450 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S @@ -53,19 +53,19 @@ STACK_INIT =3D STACK_SIZE - STACK_FRAME_OVERHEAD - __PT= _SIZE _LPP_OFFSET =3D __LC_LPP =20 .macro STBEAR address - ALTERNATIVE "", ".insn s,0xb2010000,\address", 193 + ALTERNATIVE "nop", ".insn s,0xb2010000,\address", 193 .endm =20 .macro LBEAR address - ALTERNATIVE "", ".insn s,0xb2000000,\address", 193 + ALTERNATIVE "nop", ".insn s,0xb2000000,\address", 193 .endm =20 .macro LPSWEY address,lpswe - ALTERNATIVE "b \lpswe", ".insn siy,0xeb0000000071,\address,0", 193 + ALTERNATIVE "b \lpswe; nopr", ".insn siy,0xeb0000000071,\address,0", 193 .endm =20 .macro MBEAR reg - ALTERNATIVE "", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK),= 193 + ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST= _BREAK), 193 .endm =20 .macro CHECK_STACK savearea @@ -121,16 +121,16 @@ _LPP_OFFSET =3D __LC_LPP .endm =20 .macro BPOFF - ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,12,0", 82 + ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", 82 .endm =20 .macro BPON - ALTERNATIVE "", ".insn rrf,0xb2e80000,0,0,13,0", 82 + ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", 82 .endm =20 .macro BPENTER tif_ptr,tif_mask ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,= 13,0", \ - "", 82 + "j .+12; nop; nop", 82 .endm =20 .macro BPEXIT tif_ptr,tif_mask @@ -226,7 +226,7 @@ ENTRY(__switch_to) aghi %r3,__TASK_pid mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task - ALTERNATIVE "", "lpp _LPP_OFFSET", 40 + ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40 BR_EX %r14 ENDPROC(__switch_to) =20 @@ -610,7 +610,7 @@ ENTRY(mcck_int_handler) jno 0f BPEXIT __TI_flags(%r12),_TIF_ISOLATE_BP stpt __LC_EXIT_TIMER -0: ALTERNATIVE "", __stringify(lghi %r12,__LC_LAST_BREAK_SAVE_AREA),193 +0: ALTERNATIVE "nop", __stringify(lghi %r12,__LC_LAST_BREAK_SAVE_AREA),193 LBEAR 0(%r12) lmg %r11,%r15,__PT_R11(%r11) LPSWEY __LC_RETURN_MCCK_PSW,__LC_RETURN_MCCK_LPSWE @@ -646,7 +646,7 @@ ENTRY(mcck_int_handler) ENDPROC(mcck_int_handler) =20 ENTRY(restart_int_handler) - ALTERNATIVE "", "lpp _LPP_OFFSET", 40 + ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40 stg %r15,__LC_SAVE_AREA_RESTART TSTMSK __LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4 jz 0f diff --git a/arch/s390/lib/spinlock.c b/arch/s390/lib/spinlock.c index 5e7ea8b111e8..04d4c6cf898e 100644 --- a/arch/s390/lib/spinlock.c +++ b/arch/s390/lib/spinlock.c @@ -75,7 +75,7 @@ static inline int arch_load_niai4(int *lock) int owner; =20 asm_inline volatile( - ALTERNATIVE("", ".insn rre,0xb2fa0000,4,0", 49) /* NIAI 4 */ + ALTERNATIVE("nop", ".insn rre,0xb2fa0000,4,0", 49) /* NIAI 4 */ " l %0,%1\n" : "=3Dd" (owner) : "Q" (*lock) : "memory"); return owner; @@ -86,7 +86,7 @@ static inline int arch_cmpxchg_niai8(int *lock, int old, = int new) int expected =3D old; =20 asm_inline volatile( - ALTERNATIVE("", ".insn rre,0xb2fa0000,8,0", 49) /* NIAI 8 */ + ALTERNATIVE("nop", ".insn rre,0xb2fa0000,8,0", 49) /* NIAI 8 */ " cs %0,%3,%1\n" : "=3Dd" (old), "=3DQ" (*lock) : "0" (old), "d" (new), "Q" (*lock) --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDA0AC433EF for ; Wed, 11 May 2022 12:08:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241481AbiEKMID (ORCPT ); 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charset="utf-8" clang fails to handle ".if" statements in inline assembly which are heavily used in the alternatives code. To work around this remove this code, and enforce that users of alternatives must specify original and alternative instruction sequences which have identical sizes. Add a compile time check with two ".org" statements similar to arm64. In result not only clang can handle this, but also quite a lot of code can be removed. Signed-off-by: Heiko Carstens Acked-by: Vasily Gorbik Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/include/asm/alternative-asm.h | 76 +++----------------- arch/s390/include/asm/alternative.h | 93 ++++++------------------- arch/s390/kernel/alternative.c | 61 +--------------- 3 files changed, 31 insertions(+), 199 deletions(-) diff --git a/arch/s390/include/asm/alternative-asm.h b/arch/s390/include/as= m/alternative-asm.h index bb3837d7387c..7db046596b93 100644 --- a/arch/s390/include/asm/alternative-asm.h +++ b/arch/s390/include/asm/alternative-asm.h @@ -4,19 +4,6 @@ =20 #ifdef __ASSEMBLY__ =20 -/* - * Check the length of an instruction sequence. The length may not be larg= er - * than 254 bytes and it has to be divisible by 2. - */ -.macro alt_len_check start,end - .if ( \end - \start ) > 254 - .error "cpu alternatives does not support instructions blocks > 254 bytes= \n" - .endif - .if ( \end - \start ) % 2 - .error "cpu alternatives instructions length is odd\n" - .endif -.endm - /* * Issue one struct alt_instr descriptor entry (need to put it into * the section .altinstructions, see below). This entry contains @@ -28,66 +15,29 @@ .long \alt_start - . .word \feature .byte \orig_end - \orig_start - .byte \alt_end - \alt_start -.endm - -/* - * Fill up @bytes with nops. The macro emits 6-byte nop instructions - * for the bulk of the area, possibly followed by a 4-byte and/or - * a 2-byte nop if the size of the area is not divisible by 6. - */ -.macro alt_pad_fill bytes - .rept ( \bytes ) / 6 - brcl 0,0 - .endr - .rept ( \bytes ) % 6 / 4 - nop - .endr - .rept ( \bytes ) % 6 % 4 / 2 - nopr - .endr -.endm - -/* - * Fill up @bytes with nops. If the number of bytes is larger - * than 6, emit a jg instruction to branch over all nops, then - * fill an area of size (@bytes - 6) with nop instructions. - */ -.macro alt_pad bytes - .if ( \bytes > 0 ) - .if ( \bytes > 6 ) - jg . + \bytes - alt_pad_fill \bytes - 6 - .else - alt_pad_fill \bytes - .endif - .endif + .org . - ( \orig_end - \orig_start ) + ( \alt_end - \alt_start ) + .org . - ( \alt_end - \alt_start ) + ( \orig_end - \orig_start ) .endm =20 /* * Define an alternative between two instructions. If @feature is * present, early code in apply_alternatives() replaces @oldinstr with - * @newinstr. ".skip" directive takes care of proper instruction padding - * in case @newinstr is longer than @oldinstr. + * @newinstr. */ .macro ALTERNATIVE oldinstr, newinstr, feature .pushsection .altinstr_replacement,"ax" 770: \newinstr 771: .popsection 772: \oldinstr -773: alt_len_check 770b, 771b - alt_len_check 772b, 773b - alt_pad ( ( 771b - 770b ) - ( 773b - 772b ) ) -774: .pushsection .altinstructions,"a" - alt_entry 772b, 774b, 770b, 771b, \feature +773: .pushsection .altinstructions,"a" + alt_entry 772b, 773b, 770b, 771b, \feature .popsection .endm =20 /* * Define an alternative between two instructions. If @feature is * present, early code in apply_alternatives() replaces @oldinstr with - * @newinstr. ".skip" directive takes care of proper instruction padding - * in case @newinstr is longer than @oldinstr. + * @newinstr. */ .macro ALTERNATIVE_2 oldinstr, newinstr1, feature1, newinstr2, feature2 .pushsection .altinstr_replacement,"ax" @@ -95,17 +45,9 @@ 771: \newinstr2 772: .popsection 773: \oldinstr -774: alt_len_check 770b, 771b - alt_len_check 771b, 772b - alt_len_check 773b, 774b - .if ( 771b - 770b > 772b - 771b ) - alt_pad ( ( 771b - 770b ) - ( 774b - 773b ) ) - .else - alt_pad ( ( 772b - 771b ) - ( 774b - 773b ) ) - .endif -775: .pushsection .altinstructions,"a" - alt_entry 773b, 775b, 770b, 771b,\feature1 - alt_entry 773b, 775b, 771b, 772b,\feature2 +774: .pushsection .altinstructions,"a" + alt_entry 773b, 774b, 770b, 771b,\feature1 + alt_entry 773b, 774b, 771b, 772b,\feature2 .popsection .endm =20 diff --git a/arch/s390/include/asm/alternative.h b/arch/s390/include/asm/al= ternative.h index 3f2856ed6808..904dd049f954 100644 --- a/arch/s390/include/asm/alternative.h +++ b/arch/s390/include/asm/alternative.h @@ -13,32 +13,25 @@ struct alt_instr { s32 repl_offset; /* offset to replacement instruction */ u16 facility; /* facility bit set for replacement */ u8 instrlen; /* length of original instruction */ - u8 replacementlen; /* length of new instruction */ } __packed; =20 void apply_alternative_instructions(void); void apply_alternatives(struct alt_instr *start, struct alt_instr *end); =20 /* - * |661: |662: |6620 |663: - * +-----------+---------------------+ - * | oldinstr | oldinstr_padding | - * | +----------+----------+ - * | | | | - * | | >6 bytes |6/4/2 nops| - * | |6 bytes jg-----------> - * +-----------+---------------------+ - * ^^ static padding ^^ + * +---------------------------------+ + * |661: |662: + * | oldinstr | + * +---------------------------------+ * * .altinstr_replacement section - * +---------------------+-----------+ + * +---------------------------------+ * |6641: |6651: * | alternative instr 1 | - * +-----------+---------+- - - - - -+ - * |6642: |6652: | - * | alternative instr 2 | padding - * +---------------------+- - - - - -+ - * ^ runtime ^ + * +---------------------------------+ + * |6642: |6652: + * | alternative instr 2 | + * +---------------------------------+ * * .altinstructions section * +---------------------------------+ @@ -47,77 +40,31 @@ void apply_alternatives(struct alt_instr *start, struct= alt_instr *end); * +---------------------------------+ */ =20 -#define b_altinstr(num) "664"#num -#define e_altinstr(num) "665"#num - -#define e_oldinstr_pad_end "663" +#define b_altinstr(num) "664"#num +#define e_altinstr(num) "665"#num #define oldinstr_len "662b-661b" -#define oldinstr_total_len e_oldinstr_pad_end"b-661b" #define altinstr_len(num) e_altinstr(num)"b-"b_altinstr(num)"b" -#define oldinstr_pad_len(num) \ - "-(((" altinstr_len(num) ")-(" oldinstr_len ")) > 0) * " \ - "((" altinstr_len(num) ")-(" oldinstr_len "))" - -#define INSTR_LEN_SANITY_CHECK(len) \ - ".if " len " > 254\n" \ - "\t.error \"cpu alternatives does not support instructions " \ - "blocks > 254 bytes\"\n" \ - ".endif\n" \ - ".if (" len ") %% 2\n" \ - "\t.error \"cpu alternatives instructions length is odd\"\n" \ - ".endif\n" - -#define OLDINSTR_PADDING(oldinstr, num) \ - ".if " oldinstr_pad_len(num) " > 6\n" \ - "\tjg " e_oldinstr_pad_end "f\n" \ - "6620:\n" \ - "\t.rept (" oldinstr_pad_len(num) " - (6620b-662b)) / 2\n" \ - "\tnopr\n" \ - ".else\n" \ - "\t.rept " oldinstr_pad_len(num) " / 6\n" \ - "\t.brcl 0,0\n" \ - "\t.endr\n" \ - "\t.rept " oldinstr_pad_len(num) " %% 6 / 4\n" \ - "\tnop\n" \ - "\t.endr\n" \ - "\t.rept " oldinstr_pad_len(num) " %% 6 %% 4 / 2\n" \ - "\tnopr\n" \ - ".endr\n" \ - ".endif\n" - -#define OLDINSTR(oldinstr, num) \ - "661:\n\t" oldinstr "\n662:\n" \ - OLDINSTR_PADDING(oldinstr, num) \ - e_oldinstr_pad_end ":\n" \ - INSTR_LEN_SANITY_CHECK(oldinstr_len) - -#define OLDINSTR_2(oldinstr, num1, num2) \ - "661:\n\t" oldinstr "\n662:\n" \ - ".if " altinstr_len(num1) " < " altinstr_len(num2) "\n" \ - OLDINSTR_PADDING(oldinstr, num2) \ - ".else\n" \ - OLDINSTR_PADDING(oldinstr, num1) \ - ".endif\n" \ - e_oldinstr_pad_end ":\n" \ - INSTR_LEN_SANITY_CHECK(oldinstr_len) + +#define OLDINSTR(oldinstr) \ + "661:\n\t" oldinstr "\n662:\n" =20 #define ALTINSTR_ENTRY(facility, num) \ "\t.long 661b - .\n" /* old instruction */ \ "\t.long " b_altinstr(num)"b - .\n" /* alt instruction */ \ "\t.word " __stringify(facility) "\n" /* facility bit */ \ - "\t.byte " oldinstr_total_len "\n" /* source len */ \ - "\t.byte " altinstr_len(num) "\n" /* alt instruction len */ + "\t.byte " oldinstr_len "\n" /* instruction len */ \ + "\t.org . - (" oldinstr_len ") + (" altinstr_len(num) ")\n" \ + "\t.org . - (" altinstr_len(num) ") + (" oldinstr_len ")\n" =20 #define ALTINSTR_REPLACEMENT(altinstr, num) /* replacement */ \ - b_altinstr(num)":\n\t" altinstr "\n" e_altinstr(num) ":\n" \ - INSTR_LEN_SANITY_CHECK(altinstr_len(num)) + b_altinstr(num)":\n\t" altinstr "\n" e_altinstr(num) ":\n" =20 /* alternative assembly primitive: */ #define ALTERNATIVE(oldinstr, altinstr, facility) \ ".pushsection .altinstr_replacement, \"ax\"\n" \ ALTINSTR_REPLACEMENT(altinstr, 1) \ ".popsection\n" \ - OLDINSTR(oldinstr, 1) \ + OLDINSTR(oldinstr) \ ".pushsection .altinstructions,\"a\"\n" \ ALTINSTR_ENTRY(facility, 1) \ ".popsection\n" @@ -127,7 +74,7 @@ void apply_alternatives(struct alt_instr *start, struct = alt_instr *end); ALTINSTR_REPLACEMENT(altinstr1, 1) \ ALTINSTR_REPLACEMENT(altinstr2, 2) \ ".popsection\n" \ - OLDINSTR_2(oldinstr, 1, 2) \ + OLDINSTR(oldinstr) \ ".pushsection .altinstructions,\"a\"\n" \ ALTINSTR_ENTRY(facility1, 1) \ ALTINSTR_ENTRY(facility2, 2) \ diff --git a/arch/s390/kernel/alternative.c b/arch/s390/kernel/alternative.c index cce0ddee2d02..e7bca29f9c34 100644 --- a/arch/s390/kernel/alternative.c +++ b/arch/s390/kernel/alternative.c @@ -7,8 +7,6 @@ #include #include =20 -#define MAX_PATCH_LEN (255 - 1) - static int __initdata_or_module alt_instr_disabled; =20 static int __init disable_alternative_instructions(char *str) @@ -19,85 +17,30 @@ static int __init disable_alternative_instructions(char= *str) =20 early_param("noaltinstr", disable_alternative_instructions); =20 -struct brcl_insn { - u16 opc; - s32 disp; -} __packed; - -static u16 __initdata_or_module nop16 =3D 0x0700; -static u32 __initdata_or_module nop32 =3D 0x47000000; -static struct brcl_insn __initdata_or_module nop48 =3D { - 0xc004, 0 -}; - -static const void *nops[] __initdata_or_module =3D { - &nop16, - &nop32, - &nop48 -}; - -static void __init_or_module add_jump_padding(void *insns, unsigned int le= n) -{ - struct brcl_insn brcl =3D { - 0xc0f4, - len / 2 - }; - - memcpy(insns, &brcl, sizeof(brcl)); - insns +=3D sizeof(brcl); - len -=3D sizeof(brcl); - - while (len > 0) { - memcpy(insns, &nop16, 2); - insns +=3D 2; - len -=3D 2; - } -} - -static void __init_or_module add_padding(void *insns, unsigned int len) -{ - if (len > 6) - add_jump_padding(insns, len); - else if (len >=3D 2) - memcpy(insns, nops[len / 2 - 1], len); -} - static void __init_or_module __apply_alternatives(struct alt_instr *start, struct alt_instr *end) { struct alt_instr *a; u8 *instr, *replacement; - u8 insnbuf[MAX_PATCH_LEN]; =20 /* * The scan order should be from start to end. A later scanned * alternative code can overwrite previously scanned alternative code. */ for (a =3D start; a < end; a++) { - int insnbuf_sz =3D 0; - instr =3D (u8 *)&a->instr_offset + a->instr_offset; replacement =3D (u8 *)&a->repl_offset + a->repl_offset; =20 if (!__test_facility(a->facility, alt_stfle_fac_list)) continue; =20 - if (unlikely(a->instrlen % 2 || a->replacementlen % 2)) { + if (unlikely(a->instrlen % 2)) { WARN_ONCE(1, "cpu alternatives instructions length is " "odd, skipping patching\n"); continue; } =20 - memcpy(insnbuf, replacement, a->replacementlen); - insnbuf_sz =3D a->replacementlen; - - if (a->instrlen > a->replacementlen) { - add_padding(insnbuf + a->replacementlen, - a->instrlen - a->replacementlen); - insnbuf_sz +=3D a->instrlen - a->replacementlen; - } - - s390_kernel_write(instr, insnbuf, insnbuf_sz); + s390_kernel_write(instr, replacement, a->instrlen); } } =20 --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB7CDC433F5 for ; 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charset="utf-8" Since the minimum architecture level has been raised to z10 a shorter instruction sequence can be used to implement the OUTSIDE macro. This also reduces the number of used registers within that macro to one. Signed-off-by: Heiko Carstens Reported-by: kernel test robot Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/kernel/entry.S | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index a6b45eaa3450..e1664b45090f 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S @@ -169,11 +169,9 @@ _LPP_OFFSET =3D __LC_LPP * @outside_label: jump here if @reg is outside of [@start..@end) */ .macro OUTSIDE reg,start,end,outside_label - lgr %r14,\reg - larl %r13,\start - slgr %r14,%r13 - lghi %r13,\end - \start - clgr %r14,%r13 + larl %r14,\start + slgrk %r14,\reg,%r14 + clgfi %r14,\end - \start jhe \outside_label .endm =20 --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C162C433EF for ; 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Wed, 11 May 2022 12:05:35 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 18E2CA4040; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AC9D8A404D; Wed, 11 May 2022 12:05:34 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:34 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 4/8] s390/entry: workaround llvm's IAS limitations Date: Wed, 11 May 2022 14:05:28 +0200 Message-Id: <20220511120532.2228616-5-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: z7GfmYcSIPgQwUFOpM_8gDRGyQVNJLQ8 X-Proofpoint-GUID: mJvAuwBKtdzRS4VW4wLPEgj5dK_Ltt1E X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 phishscore=0 adultscore=0 mlxlogscore=872 clxscore=1015 suspectscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" llvm's integrated assembler cannot handle immediate values which are calculated with two local labels: :3:13: error: invalid operand for instruction clgfi %r14,.Lsie_done - .Lsie_gmap Workaround this by adding clang specific code which reads the specific value from memory. Since this code is within the hot paths of the kernel and adds an additional memory reference, keep the original code, and add ifdef'ed code. Signed-off-by: Heiko Carstens Acked-by: Alexander Gordeev Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/kernel/entry.S | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/s390/kernel/entry.S b/arch/s390/kernel/entry.S index e1664b45090f..ff7a75078e93 100644 --- a/arch/s390/kernel/entry.S +++ b/arch/s390/kernel/entry.S @@ -171,8 +171,19 @@ _LPP_OFFSET =3D __LC_LPP .macro OUTSIDE reg,start,end,outside_label larl %r14,\start slgrk %r14,\reg,%r14 +#ifdef CONFIG_CC_IS_CLANG + clgfrl %r14,.Lrange_size\@ +#else clgfi %r14,\end - \start +#endif jhe \outside_label +#ifdef CONFIG_CC_IS_CLANG + .section .rodata, "a" + .align 4 +.Lrange_size\@: + .long \end - \start + .previous +#endif .endm =20 .macro SIEEXIT --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6D6F3C433F5 for ; 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Wed, 11 May 2022 12:05:35 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7A5AEA4040; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 23C16A4051; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:35 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 5/8] s390/purgatory: workaround llvm's IAS limitations Date: Wed, 11 May 2022 14:05:29 +0200 Message-Id: <20220511120532.2228616-6-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: blPOUT8fxAgzGvo8RWHqcyGSfs0TQzYK X-Proofpoint-ORIG-GUID: veuql7yuWG9Y9qKJzQkFtv-U05bKs9Mo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 adultscore=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 spamscore=0 impostorscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" llvm's integrated assembler cannot handle immediate values which are calculated with two local labels: arch/s390/purgatory/head.S:139:11: error: invalid operand for instruction aghi %r8,-(.base_crash-purgatory_start) Workaround this by partially rewriting the code. Signed-off-by: Heiko Carstens Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/purgatory/head.S | 29 ++++++++++++++++++++++------- 1 file changed, 22 insertions(+), 7 deletions(-) diff --git a/arch/s390/purgatory/head.S b/arch/s390/purgatory/head.S index 3d1c31e0cf3d..ac1a27a20b66 100644 --- a/arch/s390/purgatory/head.S +++ b/arch/s390/purgatory/head.S @@ -44,11 +44,14 @@ .endm =20 .macro MEMSWAP dst,src,buf,len -10: cghi \len,bufsz +10: larl %r0,purgatory_end + larl %r1,stack + slgr %r0,%r1 + cgr \len,%r0 jh 11f lgr %r4,\len j 12f -11: lghi %r4,bufsz +11: lgr %r4,%r0 =20 12: MEMCPY \buf,\dst,%r4 MEMCPY \dst,\src,%r4 @@ -135,12 +138,18 @@ ENTRY(purgatory_start) =20 .start_crash_kernel: /* Location of purgatory_start in crash memory */ + larl %r0,.base_crash + larl %r1,purgatory_start + slgr %r0,%r1 lgr %r8,%r13 - aghi %r8,-(.base_crash-purgatory_start) + sgr %r8,%r0 =20 /* Destination for this code i.e. end of memory to be swapped. */ + larl %r0,purgatory_end + larl %r1,purgatory_start + slgr %r0,%r1 lg %r9,crash_size-.base_crash(%r13) - aghi %r9,-(purgatory_end-purgatory_start) + sgr %r9,%r0 =20 /* Destination in crash memory, i.e. same as r9 but in crash memory. */ lg %r10,crash_start-.base_crash(%r13) @@ -149,15 +158,19 @@ ENTRY(purgatory_start) /* Buffer location (in crash memory) and size. As the purgatory is * behind the point of no return it can re-use the stack as buffer. */ - lghi %r11,bufsz + larl %r11,purgatory_end larl %r12,stack + slgr %r11,%r12 =20 MEMCPY %r12,%r9,%r11 /* dst -> (crash) buf */ MEMCPY %r9,%r8,%r11 /* self -> dst */ =20 /* Jump to new location. */ lgr %r7,%r9 - aghi %r7,.jump_to_dst-purgatory_start + larl %r0,.jump_to_dst + larl %r1,purgatory_start + slgr %r0,%r1 + agr %r7,%r0 br %r7 =20 .jump_to_dst: @@ -169,7 +182,9 @@ ENTRY(purgatory_start) =20 /* Load new buffer location after jump */ larl %r7,stack - aghi %r10,stack-purgatory_start + larl %r0,purgatory_start + slgrk %r0,%r7,%r0 + agr %r10,%r0 MEMCPY %r10,%r7,%r11 /* (new) buf -> (crash) buf */ =20 /* Now the code is set up to run from its designated location. Start --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46F7CC433F5 for ; Wed, 11 May 2022 12:07:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242205AbiEKMGn (ORCPT ); Wed, 11 May 2022 08:06:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241795AbiEKMF6 (ORCPT ); Wed, 11 May 2022 08:05:58 -0400 Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86704120AA; Wed, 11 May 2022 05:05:45 -0700 (PDT) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 24BC3vnI025472; Wed, 11 May 2022 12:05:43 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding; s=pp1; bh=VHOW8NsiZj1aWpVHD/c0AT0LEY97DtlrpaN6FSHbEOo=; b=snGu+VdbqzojemEUdNXE80MJPeoCtl9HwPUpK/K4vK32dKAUqueo5rcCWbPt5Zocw8UW WcmvtncgOdyTk7xLPOLK1r9BD3CxomxhN0bqUKDymyYNtf5IAgYe9f2F5krtqIPOLv7Y J+d3iD7i0rule1ZtE9pCGEUmRjwQOhmINxjJsDWwd3JehfDCIS6ZNxrGLooXd/RNa5eG sCXdcseONc97e5+exuGQr9J1jskhD5WWuSTYUWU61X1y9qL00S79Xg7X4uZW7Ynr5n9h +3AsMdMP6+X4OzlWNEfUVrT0PzslvIclR7MPyS+k+SxFLnG6RyGxERVJVaZ5Vy72/4Sl Lw== Received: from pps.reinject (localhost [127.0.0.1]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3g09yfubxf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:42 +0000 Received: from m0098419.ppops.net (m0098419.ppops.net [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 24BBsNv4028335; Wed, 11 May 2022 12:05:42 GMT Received: from ppma04fra.de.ibm.com (6a.4a.5195.ip4.static.sl-reverse.com [149.81.74.106]) by mx0b-001b2d01.pphosted.com (PPS) with ESMTPS id 3g09yfubws-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:42 +0000 Received: from pps.filterd (ppma04fra.de.ibm.com [127.0.0.1]) by ppma04fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 24BC3Jgd030168; Wed, 11 May 2022 12:05:40 GMT Received: from b06cxnps4075.portsmouth.uk.ibm.com (d06relay12.portsmouth.uk.ibm.com [9.149.109.197]) by ppma04fra.de.ibm.com with ESMTP id 3fwgd8v7re-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 May 2022 12:05:40 +0000 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 24BC5ZdH39911738 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 11 May 2022 12:05:36 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC8A3A4051; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8588BA404D; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:35 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 6/8] s390/boot: workaround llvm IAS bug Date: Wed, 11 May 2022 14:05:30 +0200 Message-Id: <20220511120532.2228616-7-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-GUID: tS06FrqPhuw5_lrVhBe0Wd3_mndOWJpk X-Proofpoint-ORIG-GUID: Ia9f7gvb59OIUG5DhvO8itAU-JpNcqcs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 malwarescore=0 adultscore=0 spamscore=0 bulkscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 mlxlogscore=788 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" For at least the mvc and clc instructions llvm's integrated assembler can generate incorrect code. In particular this happens with decompressor boot code. The reason seems to be that relocations for the second displacement of each instruction are at incorrect locations (-/+: gas vs llvm IAS): mvc __LC_IO_NEW_PSW(16),.Lnewpsw results in 4: d2 0f 01 f0 00 00 mvc 496(16,%r0),0 - 8: R_390_12 .head.text+0x10 + 6: R_390_12 .head.text+0x10 and clc 0(3,%r4),.L_hdr results in 258: d5 02 40 00 00 00 clc 0(3,%r4),0 - 25c: R_390_12 .head.text+0x324 + 25a: R_390_12 .head.text+0x324 Workaround this by writing the code in a different way. Signed-off-by: Heiko Carstens Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/boot/head.S | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/arch/s390/boot/head.S b/arch/s390/boot/head.S index 2ced90172680..8402e1cd133b 100644 --- a/arch/s390/boot/head.S +++ b/arch/s390/boot/head.S @@ -42,7 +42,8 @@ ipl_start: # subroutine to wait for end I/O # .Lirqwait: - mvc __LC_IO_NEW_PSW(16),.Lnewpsw # set up IO interrupt psw + larl %r13,.Lnewpsw # set up IO interrupt psw + mvc __LC_IO_NEW_PSW(16),0(%r13) lpsw .Lwaitpsw .Lioint: br %r14 @@ -155,9 +156,11 @@ ipl_start: lr %r2,%r3 .Lnotrunc: l %r4,.Linitrd - clc 0(3,%r4),.L_hdr # if it is HDRx + larl %r13,.L_hdr + clc 0(3,%r4),0(%r13) # if it is HDRx bz .Lagain1 # skip dataset header - clc 0(3,%r4),.L_eof # if it is EOFx + larl %r13,.L_eof + clc 0(3,%r4),0(%r13) # if it is EOFx bz .Lagain1 # skip dateset trailer =20 lr %r5,%r2 @@ -181,9 +184,11 @@ ipl_start: .Lrdcont: l %r2,.Linitrd =20 - clc 0(3,%r2),.L_hdr # skip HDRx and EOFx + larl %r13,.L_hdr # skip HDRx and EOFx + clc 0(3,%r2),0(%r13) bz .Lagain2 - clc 0(3,%r2),.L_eof + larl %r13,.L_eof + clc 0(3,%r2),0(%r13) bz .Lagain2 =20 # @@ -260,20 +265,23 @@ SYM_CODE_START_LOCAL(startup_normal) .fill 16,4,0x0 0: lmh %r0,%r15,0(%r13) # clear high-order half of gprs sam64 # switch to 64 bit addressing mode - basr %r13,0 # get base -.LPG0: - mvc __LC_EXT_NEW_PSW(16),.Lext_new_psw-.LPG0(%r13) - mvc __LC_PGM_NEW_PSW(16),.Lpgm_new_psw-.LPG0(%r13) - mvc __LC_IO_NEW_PSW(16),.Lio_new_psw-.LPG0(%r13) + larl %r13,.Lext_new_psw + mvc __LC_EXT_NEW_PSW(16),0(%r13) + larl %r13,.Lpgm_new_psw + mvc __LC_PGM_NEW_PSW(16),0(%r13) + larl %r13,.Lio_new_psw + mvc __LC_IO_NEW_PSW(16),0(%r13) xc 0x200(256),0x200 # partially clear lowcore xc 0x300(256),0x300 xc 0xe00(256),0xe00 xc 0xf00(256),0xf00 - lctlg %c0,%c15,.Lctl-.LPG0(%r13) # load control registers + larl %r13,.Lctl + lctlg %c0,%c15,0(%r13) # load control registers stcke __LC_BOOT_CLOCK mvc __LC_LAST_UPDATE_CLOCK(8),__LC_BOOT_CLOCK+1 - spt 6f-.LPG0(%r13) - mvc __LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13) + larl %r13,6f + spt 0(%r13) + mvc __LC_LAST_UPDATE_TIMER(8),0(%r13) larl %r15,_stack_end-STACK_FRAME_OVERHEAD brasl %r14,sclp_early_setup_buffer brasl %r14,verify_facilities --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A810DC433F5 for ; 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Wed, 11 May 2022 12:05:36 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 546B6A4040; Wed, 11 May 2022 12:05:36 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E78F0A4053; Wed, 11 May 2022 12:05:35 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:35 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 7/8] s390/boot: do not emit debug info for assembly with llvm's IAS Date: Wed, 11 May 2022 14:05:31 +0200 Message-Id: <20220511120532.2228616-8-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: d2BPzZzYv5b3YA_wC5MsWSkWa8RD0Zue X-Proofpoint-GUID: hMefLmD4bSttoPTnBI77gb1Wcd7m0TBf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 phishscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Commit ee6d777d3e93 ("s390/decompressor: support extra debug flags") added extra debug flags, in particular debug info is created, depending on config options. With llvm's IAS this causes this compile warning: arch/s390/boot/head.S:38:1: warning: DWARF2 only supports one section per c= ompilation unit .section ".head.text","ax" ^ This is a known problem and was addressed with a commit b8a9092330da ("Kbuild: do not emit debug info for assembly with LLVM_IAS=3D1"). Just do the same for s390 to get rid of this warning. Signed-off-by: Heiko Carstens Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- arch/s390/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/s390/Makefile b/arch/s390/Makefile index c59efc83f020..d73611b35164 100644 --- a/arch/s390/Makefile +++ b/arch/s390/Makefile @@ -20,7 +20,9 @@ LDFLAGS_vmlinux :=3D -pie endif aflags_dwarf :=3D -Wa,-gdwarf-2 KBUILD_AFLAGS_DECOMPRESSOR :=3D $(CLANG_FLAGS) -m64 -D__ASSEMBLY__ +ifndef CONFIG_AS_IS_LLVM KBUILD_AFLAGS_DECOMPRESSOR +=3D $(if $(CONFIG_DEBUG_INFO),$(aflags_dwarf)) +endif KBUILD_CFLAGS_DECOMPRESSOR :=3D $(CLANG_FLAGS) -m64 -O2 -mpacked-stack KBUILD_CFLAGS_DECOMPRESSOR +=3D -DDISABLE_BRANCH_PROFILING -D__NO_FORTIFY KBUILD_CFLAGS_DECOMPRESSOR +=3D -fno-delete-null-pointer-checks -msoft-flo= at -mbackchain --=20 2.32.0 From nobody Sun Jun 14 21:06:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A938C433F5 for ; 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Wed, 11 May 2022 12:05:36 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BFC2CA4040; Wed, 11 May 2022 12:05:36 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5F14DA404D; Wed, 11 May 2022 12:05:36 +0000 (GMT) Received: from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 11 May 2022 12:05:36 +0000 (GMT) From: Heiko Carstens To: Vasily Gorbik , Alexander Gordeev , Jonas Paulsson , Ulrich Weigand , Masahiro Yamada , Alexander Egorenkov Cc: Sven Schnelle , Andreas Krebbel , Nathan Chancellor , Nick Desaulniers , linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org Subject: [PATCH 8/8] scripts/min-tool-version.sh: raise minimum clang version to 14.0.0 for s390 Date: Wed, 11 May 2022 14:05:32 +0200 Message-Id: <20220511120532.2228616-9-hca@linux.ibm.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220511120532.2228616-1-hca@linux.ibm.com> References: <20220511120532.2228616-1-hca@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-GUID: 1dwEpcPfPe_Noy-98iNthQjVm_sl1Ta8 X-Proofpoint-ORIG-GUID: urio_KLe00VE71REQ9dWlP_kDh-wn0s_ Content-Transfer-Encoding: quoted-printable X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.858,Hydra:6.0.486,FMLib:17.11.64.514 definitions=2022-05-11_03,2022-05-11_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=880 lowpriorityscore=0 malwarescore=0 impostorscore=0 adultscore=0 clxscore=1015 suspectscore=0 priorityscore=1501 mlxscore=0 phishscore=0 bulkscore=0 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2202240000 definitions=main-2205110056 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Before version 14.0.0 llvm's integrated assembler fails to handle some displacement variants: arch/s390/purgatory/head.S:108:10: error: invalid operand for instruction lg %r11,kernel_type-.base_crash(%r13) Instead of working around this and given that this is already fixed raise the minimum clang version from 13.0.0 to 14.0.0. Signed-off-by: Heiko Carstens Acked-by: Nick Desaulniers Tested-by: Nathan Chancellor Tested-by: Nick Desaulniers --- scripts/min-tool-version.sh | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/scripts/min-tool-version.sh b/scripts/min-tool-version.sh index 53fe64856015..f1e8358ec19a 100755 --- a/scripts/min-tool-version.sh +++ b/scripts/min-tool-version.sh @@ -24,9 +24,8 @@ icc) echo 16.0.3 ;; llvm) - # https://lore.kernel.org/r/YMtib5hKVyNknZt3@osiris/ if [ "$SRCARCH" =3D s390 ]; then - echo 13.0.0 + echo 14.0.0 else echo 11.0.0 fi --=20 2.32.0