From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21386C433F5 for ; Fri, 6 May 2022 13:24:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392504AbiEFN2h (ORCPT ); Fri, 6 May 2022 09:28:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240891AbiEFN2b (ORCPT ); Fri, 6 May 2022 09:28:31 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D15686830B; Fri, 6 May 2022 06:24:48 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M6Bzg-1o39Hj1CFG-00y5m5; Fri, 06 May 2022 15:24:29 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 01/13] ARM: dts: imx6ull-colibri: use pull-down for adc pins Date: Fri, 6 May 2022 15:24:04 +0200 Message-Id: <20220506132416.273965-2-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:3VT8w+ktg62MV0eMvjsS2ZfZOqDK2QgsLt+GERFnFjSfhXnZQzg gUmsqNMOdt6h7gfCMPj+/PVDT+3mhNw+KenhnnP+l/LtMqnF5UfJBXVNQW7mt1B5UyebP8u W536co2WvoBnF0BPvMHmejd7o1xf6H/YJC69kaQIghNFVBrUKVBuTv6pkTn350leZQxj4Uo u2cJ9BQzVVoSHeoi1o1Fw== X-UI-Out-Filterresults: notjunk:1;V03:K0:RNH7X0xkl8E=:Le5VvuRgBR4dLEQ26ZYmdY BiqHApNqGiJ8wv7tyBi5MRJ92I8SwLkHf0vzA2WsmebcihmSWzGhqSvoNJ+Facza0Q7O3W0IC hEasZC16jJPr8nYbSpMteQrFTahwX5Xx/YcrVDeNvADNbeSvmzBVVJm7KiYVBXob3c+GdX3El 6RNE29X4CX6hga0JyhAXTWgt2/Y0rr86CmSpAybDixFKzlxiRYmLuW9pt/EX2hPW1xC37C++E IsklCq54k+s0zD8WPmt0qq/+Cg5+YpbDP3jEbeouo7thlg37kxLG3aZOG6Os9KNuGgU/659x5 QxwE2iWG+d+PqNii1PA5bGRpyaLnrU+pK0DVaCP3y/u904PDylVttxYutrrzibJw51MPinKPP mth2SQfLa2SsBrAQbKA6Jja5h9m27jPQAXbpyWH37vm69ShRIqZR/fx3Xrius74r/XKIHYHRj C4i7uwmpob4hGLV36YDrihfEICf5CbY34A5Iu+quezecXI49PtdSO/cWFj9R2ZJ78tXTFwMjD r4xvYQlJUGw8eAPY3+Hm16SO6dNccgu4r5tPxVs1g/8Toxz3PLWs6hBSc4Na0W9ZBxuSvYUeG rxWxEaKtpgMz6mK4AQOS/r6DI4MOBGlHJGD/r3dq9d/oIfeA+DC+fjwsAQ1mOwcnxumA7C8Je uSZENBIYxNvd5gSkjF/XfTGBzs79MG2NppTp1LpP40PVecBpbuaDeDnrjze40ig3PYNY= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Disable the keeper and enable a 100k pull-down on the ADC pins as per the following note in section 13.2 of the i.MX 6ULL Application Processor Reference Manual, Rev. 1, 11/2017 [1]: The keeper causes an undesired jump behavior in ADC. To avoid the problem, disable keeper before starting ADC. [1] https://www.nxp.com/webapp/Download?colCode=3DIMX6ULLRM Signed-off-by: Philippe Schenker Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 7f35a06dff95..84bb7574d211 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -52,6 +52,8 @@ reg_sd1_vmmc: regulator-sd1-vmmc { &adc1 { num-channels =3D <10>; vref-supply =3D <®_module_3v3_avdd>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_adc1>; }; =20 &can1 { @@ -214,6 +216,16 @@ &wdog1 { }; =20 &iomuxc { + + pinctrl_adc1: adc1grp { + fsl,pins =3D < + MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x3000 /* SODIMM 8 */ + MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0x3000 /* SODIMM 6 */ + MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x3000 /* SODIMM 4 */ + MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3000 /* SODIMM 2 */ + >; + }; + pinctrl_can_int: canint-grp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x13010 /* SODIMM 73 */ --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AF499C433F5 for ; Fri, 6 May 2022 13:24:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392486AbiEFN2f (ORCPT ); Fri, 6 May 2022 09:28:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1391600AbiEFN2c (ORCPT ); Fri, 6 May 2022 09:28:32 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C06DD6971F; Fri, 6 May 2022 06:24:49 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MQPne-1nNiP60Wzc-00TlRH; Fri, 06 May 2022 15:24:32 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Max Krummenacher , Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 02/13] ARM: dts: imx6ull-colibri: change touch i2c parameters Date: Fri, 6 May 2022 15:24:05 +0200 Message-Id: <20220506132416.273965-3-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:NglH/itG/phwz6Aw3Z4/JVnrTYv8/PuNhHZ8qeCtohqdIXjDyjT IXT2ee0yiOtX+G9p8BjW6C/9YPPrNKJHBI9Td6mKXCH9snmrdhctTyxXJsHtmUIcevmIxqo KjWku2O3whwH9P/c67ROKAQylx/QLHwjbb4lGuoGIFYZwXlaTkLe+vVG2F3q0qQ/7CNfrrr KPkBhYaBoI3yT7r+LPcRw== X-UI-Out-Filterresults: notjunk:1;V03:K0:1VxgiRBNDP0=:g3Ba5THtk/zXQP/xbUkU9+ ErgHYf4mFEJxeYPMBVpSJckNwZteB/FQ/zv0iLf8xWXTCzSMYw+ulAyfcJMR5YmPY9lCf1Bm6 CcIHOw5lxEUjtVK91llvgXkBG5HUxJTNKf0mka/qDyuVMq56agZE4S+qLbFXHWRsSUU9xgKZV lXG2SFrW5+KEiMieap0bvArsPCkyz8Y9JVJIwqzqLjcMGH2eWpYZaP4DXwr0I9P4Yvb3n36iz 9jvoyyFeh8BpbQpwThRLRKqm8wLJOdbf7Hjv8+hvmZW+8DbdZiVvym1oGzXrfWVhL5QrcCan4 SBx+K5Ccin7nU4wKdtPs2QzYQWd2ZjvIw/qXl9RbfhVWX5Pfq0BN5D+sSNcclum7fDzZrDj6i 4tEV+4qTIrniwwZ4i+AZdz0VuQ/6aZIyXyiT2Epp0JelgMZia9AZ9YAz2qN/ZQIyV5Jj+f+Vs OC+g7h43/vSX6TYj2l+zenkiH2cL/qhVnR81lvbMEbXo1iNBLtTlrf0viNyy/J/y43ZTDwJKy /mj2FJ1/Q0amHj3r5Qth9eHAYmnkoTBMFON4Ba/+gxVXXolYx5+2bTIqtQyOklzqf35uSIPee 51s/KaG6xEcFT4B3uyl67+paplKgZ3cVBn+ILuU059cPeG6gRZneOc1XUM/UVCF5A9l1Gb9L+ ADXglGsDIIJl4CL2IdTgP3cDQQXrHuNxSNxiKfWn/3lSepvZJj8NQ3r2XlgEJEKQvVJE= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Switch on 22 kOhm pull-ups and lower the I2C frequency to around 40 kHz to get more reliable communication. Signed-off-by: Max Krummenacher Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 84bb7574d211..dc947035495b 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -114,6 +114,8 @@ &i2c1 { }; =20 &i2c2 { + /* Use low frequency to compensate for the high pull-up values. */ + clock-frequency =3D <40000>; pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c2>; pinctrl-1 =3D <&pinctrl_i2c2_gpio>; @@ -405,15 +407,15 @@ MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 /* SOD= IMM 194 */ =20 pinctrl_i2c2: i2c2-grp { fsl,pins =3D < - MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001b8b0 + MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8b0 + MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8b0 >; }; =20 pinctrl_i2c2_gpio: i2c2-gpio-grp { fsl,pins =3D < - MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001b8b0 - MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001b8b0 + MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001f8b0 + MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001f8b0 >; }; =20 --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 198F2C433F5 for ; Fri, 6 May 2022 13:25:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392510AbiEFN2q (ORCPT ); Fri, 6 May 2022 09:28:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392469AbiEFN2c (ORCPT ); Fri, 6 May 2022 09:28:32 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 11C396972A; Fri, 6 May 2022 06:24:49 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MNJ6d-1nkW2F4BbN-006xDu; Fri, 06 May 2022 15:24:35 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 03/13] ARM: dts: imx6ull-colibri: add phy-supply to fec Date: Fri, 6 May 2022 15:24:06 +0200 Message-Id: <20220506132416.273965-4-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:i+gg0Q5Yg19uEoOY40WleSYcCbwOC5ehyKae/LZurq0GtKO8R7N RK+MNbyfcrWTOnHLmmvtC4nmsW65lXkPWa/xSApKZly/5N+vwM+MWnWD2kaVdXvg82No77X /Dq4ngQYy3VTSuy3oLVNrg3T5fU9YgH0l1/xAoisnTRm1nwtcK5H8ESnneuc65piP90mnIX Xf65JUYmChUr0JoSWeKbQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:YPzXNKuG/3c=:/X3uR9GCNWIyrIRw5RBvQU UP2kcPlYBpas9PDKcJynfsO6oRi+MWco2hwpUP54LzxCLBeXeeO5mmj2WKNtpkt9QRCJYx1VJ aIgQoLAJK/HOicpTcJoKFi+KDm4684EexEnjDC1Jc1Nx5p5y4IZ/2S+PTzK+Z13Rrv/zO5THT FaWz1HHkYSGyJ1SaFw9tcE80A+YRrNe1H0FzS6A57itJx04XCWr2riyQ278l4YDpdZLfOuqlR cmM/qSM2ENavPhvVWbJS4n/TDsgePak3f7nAvBhM+QGV/WjsX2cWuCrazv8s1r+hQYnsY2LI0 lTwt84Rayi4Iw+fR6DGHi805Rp7AZfpvi0EbqMr+WQQp0IkyDTJz1DzyuQqNBmSk8LENZGScj 1WYme0FyGIT3V1XimwXkLn7QS6qcwmmelUCszvvKdTza4uxmGpQMxj/vrbac6pNvimGFr2oXO lLGuJx8dXDkYQCU16o3CBib5j0jwWRfqFeF7rGb9WDj0pyScyNRRBbbFzxuLuFZb/M6BqggUH kacZ4IY3ySJ2J66dfESyZq4H+NkX/4TPsE0DUhCJoyWufJnHw/wwNB6+aVNbhy7L0FZxVqqp2 QiCXtMl83sgiilIGiWmI9KkJitthpQemGnbm0NnP8Y+i/7574/wLHPVnOC0pltYr2hqslOwWK DFv2kgm5b9Zmpl9+ESOhalNMPZESC1thEgMmMLu7fzosj5nbwVcRRhn0WjKBR0BZI7mE= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker This adds the proper phy-supply to the FEC. This supply is actually switched by a clock that is now properly stated. This has the advantage to add a delay for that particular regulator which is needed. Signed-off-by: Philippe Schenker Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index dc947035495b..7cd912df5d19 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -47,6 +47,18 @@ reg_sd1_vmmc: regulator-sd1-vmmc { states =3D <1800000 0x1 3300000 0x0>; vin-supply =3D <®_module_3v3>; }; + + reg_eth_phy: regulator-eth-phy { + compatible =3D "regulator-fixed-clock"; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "+V3.3_ETH"; + regulator-type =3D "voltage"; + vin-supply =3D <®_module_3v3>; + clocks =3D <&clks IMX6UL_CLK_ENET2_REF_125M>; + startup-delay-us =3D <150000>; + }; }; =20 &adc1 { @@ -81,6 +93,7 @@ &fec2 { pinctrl-1 =3D <&pinctrl_enet2_sleep>; phy-mode =3D "rmii"; phy-handle =3D <ðphy1>; + phy-supply =3D <®_eth_phy>; status =3D "okay"; =20 mdio { --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA2DDC433EF for ; Fri, 6 May 2022 13:26:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392571AbiEFNaR (ORCPT ); Fri, 6 May 2022 09:30:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52720 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392540AbiEFN2u (ORCPT ); Fri, 6 May 2022 09:28:50 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5316D69CE3; Fri, 6 May 2022 06:25:00 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MgdCj-1nQEYk2nAt-00Nvbo; Fri, 06 May 2022 15:24:38 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 04/13] ARM: dts: imx6ull-colibri: add touchscreen device nodes Date: Fri, 6 May 2022 15:24:07 +0200 Message-Id: <20220506132416.273965-5-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:kTzP2dKjh7P3AChHYjD9MUXLo2VnKd4yHU8l0rV658RSKhGVuYv zlNvvphj3mHFa3BjpmhDKLHsQUpe0A+ALVKog17BvM9CsEjL08GLcLmjLn7WFRL27CfC1Fu hwGs04rcAbJqoFmGX8TOGaIqPXJjj6QOzD7edgXsRSyJustVxRcJ9cUyrlfux6nyKd+9W+R xAItNje5JE9SXdZvcFxsw== X-UI-Out-Filterresults: notjunk:1;V03:K0:a6/ScGZMOdo=:UhP+R4Q0LOeH5GT+KBdRFY W4AxU8ZDW7SATWcN/7KDNOTbZNrJglijwhQweMtS2njDIjJ4a65BYc7XBQrhWzfGUByOVPOSt kRWVUJxrPMUwWd1LBjSNdfRlF23wdTnVx1MJa2sxX5qntuSRE9nTjrbM17bOouk7XEajFp82w KJTVAfJIdx8gKr6+AXPxr2tFajUFeFKd99JGyDP4wzVu6rbqaAvy7M/S35ZHs3dtN3rI8PN89 KgaHKx1v3ZN5SrwAtU3RUJQQWV79Yoqp+HERTz0fL1YKWxmjuT4iK80kst0FNnDfYgwk2oTKH dfrA5Hbr2UCxJGtA43V2KnNt5KhdTxgvEl9PSpWJi70FqvUuv6nLnf/0j4G730IGio8QMaEIo hcMyj6679B9Fo+kYAukDqa3V187tj2a7qUgCJsUredaD/79ANSFyuHBKxoRHkkpz+1gugZr0c MYsi51nPBjcs8diPyZUVFayka1o5yD1Vhb4E08YUx+RKiDAhgBjn9YgBSawS/UASZ/p0nR1Jr G2GjrK8f70iWKVr5OWGJHv5AFs1VBfs/8f7BMTsw1GKlnEyOGu1tKHi4HpG3g57bdFHzxVnoP SySOjjKEW1ZR1ZvnC8Dino0pNABzn15TWvdbuVW7B85OUEbeLfATT2jggOcWg2NHRuvy5tFUK L36M2kWNEOvj14uka/fEzlp/+w+chAEEeWOJNtEp8LFzoGacI4VJP4KZ+bMXsJIoKirw= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Denys Drozdov Move all Atmel nodes from the board-level into the main module-level device tree and prepare the device trees for use with Atmel MXT device tree overlays. Also, add required pinmux groups. The common scheme for pin groups in touch screen overlays is as follows: - pinctrl_atmel_conn - SODIMM 106/107 pins for INT/RST signals (default) - pinctrl_atmel_adap - SODIMM 28/30 pins for INT/RST signals. Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- Changes in v3: - Fixed reset GPIO polarity in-line with the following upstream commit: feedaacdadfc ("Input: atmel_mxt_ts - fix up inverted RESET handler") - Fixed comment using more common SODIMM followed by number naming. Changes in v2: - Fixed pinctrl node names as suggested by Shawn. .../arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 4 +- arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 4 +- arch/arm/boot/dts/imx6ull-colibri.dtsi | 39 +++++++++++++------ 3 files changed, 31 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-nonwifi.dtsi index 95a11b8bcbdb..5e55a6c820bc 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi @@ -15,10 +15,10 @@ memory@80000000 { &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 - &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio6 &pinctrl_gpio7>; + &pinctrl_gpio4 &pinctrl_gpio6 &pinctrl_gpio7>; }; =20 &iomuxc_snvs { pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio2 &pinctrl_snvs_gpio= 3>; + pinctrl-0 =3D <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dt= s/imx6ull-colibri-wifi.dtsi index 9f1e38282bee..6e8ddb07e11d 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi @@ -26,13 +26,13 @@ &cpu0 { &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 - &pinctrl_gpio4 &pinctrl_gpio5 &pinctrl_gpio7>; + &pinctrl_gpio4 &pinctrl_gpio7>; =20 }; =20 &iomuxc_snvs { pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio2>; + pinctrl-0 =3D <&pinctrl_snvs_gpio1>; }; =20 &usdhc2 { diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 7cd912df5d19..c89b209be316 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -124,6 +124,19 @@ &i2c1 { pinctrl-1 =3D <&pinctrl_i2c1_gpio>; sda-gpios =3D <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios =3D <&gpio1 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: touchscreen@4a { + compatible =3D "atmel,maxtouch"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_atmel_conn>; + reg =3D <0x4a>; + interrupt-parent =3D <&gpio5>; + interrupts =3D <4 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 / INT */ + reset-gpios =3D <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 106 / RST */ + status =3D "disabled"; + }; }; =20 &i2c2 { @@ -241,6 +254,20 @@ MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x3000 /* SODI= MM 2 */ >; }; =20 + pinctrl_atmel_adap: atmeladapgrp { + fsl,pins =3D < + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0xb0a0 /* SODIMM 28 */ + MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0xb0a0 /* SODIMM 30 */ + >; + }; + + pinctrl_atmel_conn: atmelconngrp { + fsl,pins =3D < + MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0xb0a0 /* SODIMM 106 */ + MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SODIMM 107 */ + >; + }; + pinctrl_can_int: canint-grp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x13010 /* SODIMM 73 */ @@ -347,12 +374,6 @@ MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x10b0 /* SODIMM 65 */ >; }; =20 - pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */ - fsl,pins =3D < - MX6UL_PAD_JTAG_MOD__GPIO1_IO10 0xb0a0 /* SODIMM 106 */ - >; - }; - pinctrl_gpio6: gpio6-grp { /* Wifi pins */ fsl,pins =3D < MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x10b0 /* SODIMM 89 */ @@ -606,12 +627,6 @@ MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM = 138 */ >; }; =20 - pinctrl_snvs_gpio2: snvs-gpio2-grp { /* ATMEL MXT TOUCH */ - fsl,pins =3D < - MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SODIMM 107 */ - >; - }; - pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */ fsl,pins =3D < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 /* SODIMM 127 */ --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6093CC433FE for ; Fri, 6 May 2022 13:25:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392512AbiEFN3U (ORCPT ); Fri, 6 May 2022 09:29:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52496 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392503AbiEFN2h (ORCPT ); Fri, 6 May 2022 09:28:37 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C55866972A; Fri, 6 May 2022 06:24:53 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M1m9M-1o7X062cDS-00ti3N; Fri, 06 May 2022 15:24:41 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Philippe Schenker , Denys Drozdov , Andrejs Cainikovs , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 05/13] ARM: dts: imx6ull-colibri: update usdhc1 pixmux and signaling Date: Fri, 6 May 2022 15:24:08 +0200 Message-Id: <20220506132416.273965-6-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:9jTQUi0FQdHyIXM/FBLSNDoQB3bT5f3Hv89Zc84bMhDg/y7nJ7/ 2/JLhov/jxEpT8zyfPdT/wdPvF5Dj/cTicQon4W0hoi2RhQ/v2ewZxSEok2KsqD6MzVQ0FO aX3qp0YtySU/UlJGYDPf0Pcl3xi28uP8JDI1J5L+JJIWZYsKPxwQXY8CtR4NRV3J071Lqr3 DLkHTaxJ/xUFsH2PTMi0g== X-UI-Out-Filterresults: notjunk:1;V03:K0:g/cQV3B+G7E=:7iyZbjpogHAr47Oi4XQRu4 JpL3BLCqMQmyHuWqx6cbLy50F5Pc/q/nDcnlLZxVlRLXYVUAbE9tOVR+4XV8mutNCfW7ExmXE OsL/uWR5/pSV6H7pGAQOHpi7m2DRGY05KjRJNNTcoeEIccIqhSg7a5sUKxdMcq/7nw/4jtGMi 6HIU/4RerYITkwhBBUzX+Y2pljEAZWgeMSMWiZj2Tvn4unb/bu8xRZcChEDU5VS59zvN/J4Rz +kcdvcILBF4xCBi2CvQqoUBuLjwMwYVSRT/NlgSswL5FrcTQGi8X00fifsWk3zIJiugRJYrCF G+oeXPOqeFT4SoekEcdM2alAr8mjbqgpjo8cFd1pTSbUajbgXBzDXm/47VEZneV9m60WuWiUe vFvmlp4wSzr2pjZu53lPlhXck0ulFekmxTwjQiEEGwIJhTtlKH3iaoIfHKAxb4qdkAOfdz2gL SwSi/TlwftxPYMP3L8gxPb2HwgOSUkO4ldQTe3xC2zDlWcUY4t2IrdigEMf9zqFhNDSFlceP9 0OG8xj/GyMe1ptnciZjgpkpeL2fJHXqrqBswr8zwgG+FDv3k3msJW9FkwnymOJynHN1x3fkGe cSUO4Oxe4keym/779DVqBL8Rot59d0gswG9VJ5k2uGV1J33Uvth7iAIceO8epNRoFtL+BqWMT qU8kxGMRGHBU6dwmajnBZcBFCXKb+1DJ8LTS0w6BE+p9ciqzWJXTbuQVmdQ8hT8D96mg= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Philippe Schenker Due to many carrier boards pulling the usdhc1 signals up to 3.3 volt we need to disable 1.8 volt signaling. Adding the no-1-8-v property basically disables UHS-I modes by default. Also pull-up the command and data lines to the +V3.3_1.8_SD rail and set them to the 200 MHz speed grade (e.g. pinmux bits 7-6: meaning 11 SPEED_3_max_200MHz). Explicitly specify a bus-width of <4> in the module-level device tree include file and drop the no-1-8-v property from the carrier boards device trees. Signed-off-by: Philippe Schenker Signed-off-by: Denys Drozdov Signed-off-by: Andrejs Cainikovs Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 14 -------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 36 ++++++++++++------- 2 files changed, 24 insertions(+), 26 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-eval-v3.dtsi index a78849fd2afa..ea086b305d22 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -159,20 +159,6 @@ &usbotg2 { }; =20 &usdhc1 { - pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; - pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; - pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-3 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; - cd-gpios =3D <&gpio5 0 GPIO_ACTIVE_LOW>; - disable-wp; - wakeup-source; - keep-power-in-suspend; vmmc-supply =3D <®_3v3>; - vqmmc-supply =3D <®_sd1_vmmc>; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index c89b209be316..351ea2acd5a6 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -35,7 +35,7 @@ reg_module_3v3_avdd: regulator-module-3v3-avdd { regulator-max-microvolt =3D <3300000>; }; =20 - reg_sd1_vmmc: regulator-sd1-vmmc { + reg_sd1_vqmmc: regulator-sd1-vqmmc { compatible =3D "regulator-gpio"; gpio =3D <&gpio5 9 GPIO_ACTIVE_HIGH>; pinctrl-names =3D "default"; @@ -232,9 +232,21 @@ &usbotg2 { }; =20 &usdhc1 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; + pinctrl-3 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; assigned-clocks =3D <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDH= C1>; assigned-clock-parents =3D <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates =3D <0>, <198000000>; + bus-width =3D <4>; + cd-gpios =3D <&gpio5 0 GPIO_ACTIVE_LOW>; + disable-wp; + keep-power-in-suspend; + no-1-8-v; + vqmmc-supply =3D <®_sd1_vqmmc>; + wakeup-source; }; =20 &wdog1 { @@ -550,8 +562,8 @@ MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */ =20 pinctrl_usdhc1: usdhc1-grp { fsl,pins =3D < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x17059 /* SODIMM 47 */ - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x10059 /* SODIMM 190 */ + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 /* SODIMM 47 */ + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 /* SODIMM 190 */ MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 /* SODIMM 192 */ MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 /* SODIMM 49 */ MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 /* SODIMM 51 */ @@ -561,8 +573,8 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 /* SODIMM 53 = */ =20 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { fsl,pins =3D < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170b9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 @@ -572,12 +584,12 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 =20 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { fsl,pins =3D < - MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x170f9 - MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x100f9 - MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 - MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 - MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 - MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 + MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 + MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 + MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 + MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 + MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 + MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 >; }; =20 @@ -588,7 +600,7 @@ MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069 MX6UL_PAD_CSI_DATA02__USDHC2_DATA2 0x17069 MX6UL_PAD_CSI_DATA03__USDHC2_DATA3 0x17069 MX6UL_PAD_CSI_HSYNC__USDHC2_CMD 0x17069 - MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x17069 + MX6UL_PAD_CSI_VSYNC__USDHC2_CLK 0x10069 =20 MX6UL_PAD_GPIO1_IO03__OSC32K_32K_OUT 0x10 >; --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 571ECC433F5 for ; Fri, 6 May 2022 13:25:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392522AbiEFN31 (ORCPT ); Fri, 6 May 2022 09:29:27 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52746 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392520AbiEFN2s (ORCPT ); Fri, 6 May 2022 09:28:48 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 226A369CD9; Fri, 6 May 2022 06:24:55 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0M0fge-1o6R4X1T9q-00uoW5; Fri, 06 May 2022 15:24:43 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 06/13] ARM: dts: imx6ull-colibri: update device trees to support overlays Date: Fri, 6 May 2022 15:24:09 +0200 Message-Id: <20220506132416.273965-7-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:Y+KHdTdOAJTiItaIdQpfXfwJHvCoYEyTTzVPAC/1y8B4wO7s2C8 Sb4UDZUHs9VbLggOEqTijXLtZi2a1WleBGrLW3AQxp/igV9Lb9fENn6fGU4uNxipP9byyHU 0i/ap/Gg5hixITUto7BXrkAs6RNpJNfGMq/VXFgq1y0ZJbIYipt8xvD3R1yDmQgQvbzKvpn 2ST1i7nV3Gs998fwk+JoA== X-UI-Out-Filterresults: notjunk:1;V03:K0:NQTj//WwDBQ=:emh555MUqzab00HdP4in69 DCLGlQWph1tapDNo7AJaVOMD4aowxVYpmAgSA/oselL+Oa43zzvOpksnQBlWODsUmBMt3UGNu wVTuHddKPZNS2/X5jmCkk329f7BMP1sa2Y7+1j4er4d1jDswPZEPNRoFwhac7VP29Sb3Wyv0G Hd7jHF9ILGObZQw+LbCG2m+m7ebj+NCFoMRZ0Ee3EasmdmO4fP4CL28vUmfO3NSIKvrr2Jz4Z mp+wziYe9EsWNzGNvBPGvgHx77iZs1ZqPM8ricWkvZK2FhuwJT3Jbmk5soj8uJ0xzavzDXynw 4dEey7ZHN5Ntbk+bVTQTR7xCnz9G9rmV9oWrLI/GBIoqZuLlJUtqEBd1UMwVCivh7sSJZQqtB 7PWDRlh2eDnSQJAGYivHzsetzvCXM5Gsp+6HGmiDyrS7/r7+tZlV7zOBKVKAdgp3Kmeav3buW daSq93kT2aHY7FpcgiPlXP6r15QYXM5E1SdBv+680S3IBPkVDPoj8hqsaS7b85JPQD9jrXVnd /lOnKINzUoExRiPiLdsfT/wOesfDKktkbK0uGT1YMdXZCOjZ7c9gXlAPZzzHzPX4QWbfGMwwp 8qflE6SGesnH70svr1siNSd672PADqgC5t0TNQmmBVbTlOZ4Cxpi8qjRHikMF2Ud8jHfcQH8v iTijY7TtBnzjQ6OeC/DCxpjofqPAUzLJpQm95MZThIHhJbtDw44W9eF1sTof2h9vNmbU= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Denys Drozdov Prepare in-tree device trees for out-of-tree device tree overlay support (eMMC SKU only). Relocate panel-dpi default to edt,et057090dhu (RGB 18bit VGA 640x480) to the module-level dtsi and remove it from the carrier board dtsi. Keep backlight, resistive touch and Atmel maxtouch nodes enabled for both eMMC and NAND modules. Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 29 ----------------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 31 ++++++++++++++++--- 2 files changed, 27 insertions(+), 33 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-eval-v3.dtsi index ea086b305d22..3c07b4273e80 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -29,17 +29,6 @@ clk16m: clk16m { clock-frequency =3D <16000000>; }; =20 - panel: panel { - compatible =3D "edt,et057090dhu"; - backlight =3D <&bl>; - power-supply =3D <®_3v3>; - - port { - panel_in: endpoint { - remote-endpoint =3D <&lcdif_out>; - }; - }; - }; =20 reg_3v3: regulator-3v3 { compatible =3D "regulator-fixed"; @@ -71,14 +60,6 @@ &adc1 { status =3D "okay"; }; =20 -&bl { - brightness-levels =3D <0 4 8 16 32 64 128 255>; - default-brightness-level =3D <6>; - power-supply =3D <®_3v3>; - pwms =3D <&pwm4 0 5000000 1>; - status =3D "okay"; -}; - &ecspi1 { status =3D "okay"; =20 @@ -107,16 +88,6 @@ m41t0m6: rtc@68 { }; }; =20 -&lcdif { - status =3D "okay"; - - port { - lcdif_out: endpoint { - remote-endpoint =3D <&panel_in>; - }; - }; -}; - /* PWM */ &pwm4 { status =3D "okay"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 351ea2acd5a6..28baffcef096 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -11,12 +11,29 @@ aliases { ethernet1 =3D &fec1; }; =20 - bl: backlight { + backlight: backlight { compatible =3D "pwm-backlight"; + brightness-levels =3D <0 4 8 16 32 64 128 255>; + default-brightness-level =3D <6>; + enable-gpios =3D <&gpio1 11 GPIO_ACTIVE_HIGH>; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio_bl_on>; - enable-gpios =3D <&gpio1 11 GPIO_ACTIVE_HIGH>; - status =3D "disabled"; + power-supply =3D <®_3v3>; + pwms =3D <&pwm4 0 5000000 1>; + status =3D "okay"; + }; + + panel_dpi: panel-dpi { + compatible =3D "edt,et057090dhu"; + backlight =3D <&backlight>; + power-supply =3D <®_3v3>; + status =3D "okay"; + + port { + lcd_panel_in: endpoint { + remote-endpoint =3D <&lcdif_out>; + }; + }; }; =20 reg_module_3v3: regulator-module-3v3 { @@ -149,7 +166,7 @@ &i2c2 { scl-gpios =3D <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; =20 - ad7879@2c { + ad7879_ts: touchscreen@2c { compatible =3D "adi,ad7879-1"; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_snvs_ad7879_int>; @@ -170,6 +187,12 @@ &lcdif { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_lcdif_dat &pinctrl_lcdif_ctrl>; + + port { + lcdif_out: endpoint { + remote-endpoint =3D <&lcd_panel_in>; + }; + }; }; =20 &pwm4 { --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9AA2C433EF for ; Fri, 6 May 2022 13:25:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392533AbiEFN3e (ORCPT ); Fri, 6 May 2022 09:29:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52748 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392538AbiEFN2u (ORCPT ); Fri, 6 May 2022 09:28:50 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CC9F69CE9; Fri, 6 May 2022 06:25:00 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MWUKy-1nKyqC0pqM-00Xaf3; Fri, 06 May 2022 15:24:46 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Oleksandr Suvorov , Denys Drozdov , Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 07/13] ARM: dts: imx6ull-colibri: add gpio-line-names Date: Fri, 6 May 2022 15:24:10 +0200 Message-Id: <20220506132416.273965-8-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:SFAlcu06cKvTNE1AUscYdjzXk9ABdA0YnfOeZC4PmeJkDoafheT J2pXTv3Fh8zoeDv9HD+aFfXCqnexRlHUz0+q9WBiK3iXrYZoJ+qTwERpqDn2Rz+gnFJ04SW IxvRGnU7AfONHtQcH1G0plB3RKzv9xaj1/nrlv42pZzlfTvjB33AlWRBprbDP9B3xct7Mzz ReTTz2DC2trYikDhwn6aA== X-UI-Out-Filterresults: notjunk:1;V03:K0:5fCgHa7ypMQ=:hPDPu2zlOIVsXtSDxl+QbR L8GOr++vRvbOOCprhCd/YiuFAEOYntTd75g+z1vJoViIIuuBvmvosjvubjPgvae9hiWuMwf9b ++KfKuCMhKriHkQnYViGxSSZte4evrXuM3oUOIGr9A3tM8Bk4Xa1mPa+x/RcdtgQ4BHOR9yN2 RrbQiqpiiHqIJCoQpSYhKGiMO9xEOXgB5dtCtJ1En8Reu4LptKvHP05JySsEJaMGRUB3DaqbD rJfKzx+z840ChKjmo+ipeKd/G/XCsF0VLEtoreMiafJnzE4NxMKy4dTxr25bq0IQnU1D4oTQr tQgbjlL0Tf4PYI0aLEnlAyin2WvI68g0lniVmWBs7/5DyuAjkSIjPN2leK74YdahLcU05+48x AzbOCNO9Ktx5uknO2aNbapnq73fpOP8h+bOZtIS7iHBNCFMdotC22yQkrdWd8r0wYLc2EfGjW nvaD2pH49oZ8GW+dAYAX8QQsj/mgt+jiuejI7za3Qs1VgV+7+w8f3J2tEyu72wvxBJsmTtjBH 7gx64NYbNeuH13pUTA1Ec+3c9pTYPYuKlpN0hz1OuWI0WAm3fiuSFGCA8A4L8s/XW//rDV2IV vFL9CKmDphCQTHhPuvsF6zNalZpK60IhP7jYeh7BfwpOZE92y9bGqV/5mbBYuBwy0C9dx3VuA U6nLNnm4nim+pOpmd3Hz43QK8f4hFvROy1tFI8rFYmFCt7/0lFWZ6oU08NcgDdDma3y3oheJp zbMkInlJ1vr/eqTU Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Oleksandr Suvorov Add GPIO line names on module-level. Those are all GPIOs that a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board-level device tree. Signed-off-by: Oleksandr Suvorov Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 137 ++++++++++++++++++ arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 136 +++++++++++++++++ 2 files changed, 273 insertions(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-nonwifi.dtsi index 5e55a6c820bc..60f169227ad9 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi @@ -12,6 +12,143 @@ memory@80000000 { }; }; =20 +&gpio1 { + gpio-line-names =3D "SODIMM_8", + "SODIMM_6", + "SODIMM_129", + "SODIMM_89", + "SODIMM_19", + "SODIMM_21", + "UNUSABLE_SODIMM_180", + "UNUSABLE_SODIMM_184", + "SODIMM_4", + "SODIMM_2", + "SODIMM_106", + "SODIMM_71", + "SODIMM_23", + "SODIMM_31", + "SODIMM_99", + "SODIMM_102", + "SODIMM_33", + "SODIMM_35", + "SODIMM_25", + "SODIMM_27", + "SODIMM_36", + "SODIMM_38", + "SODIMM_32", + "SODIMM_34", + "SODIMM_135", + "SODIMM_77", + "SODIMM_100", + "SODIMM_186", + "SODIMM_196", + "SODIMM_194"; +}; + +&gpio2 { + gpio-line-names =3D "SODIMM_55", + "SODIMM_63", + "SODIMM_178", + "SODIMM_188", + "SODIMM_73", + "SODIMM_30", + "SODIMM_67", + "SODIMM_104", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_190", + "SODIMM_47", + "SODIMM_192", + "SODIMM_49", + "SODIMM_51", + "SODIMM_53"; +}; + +&gpio3 { + gpio-line-names =3D "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_29", + "SODIMM_37", + "SODIMM_88", + "SODIMM_86", + "SODIMM_92", + "SODIMM_90"; +}; + +&gpio4 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_59", + "", + "", + "SODIMM_133", + "", + "SODIMM_28", + "SODIMM_75", + "SODIMM_96", + "SODIMM_81", + "SODIMM_94", + "SODIMM_101", + "SODIMM_103", + "SODIMM_79", + "SODIMM_97", + "SODIMM_69", + "SODIMM_98", + "SODIMM_85", + "SODIMM_65"; +}; + +&gpio5 { + gpio-line-names =3D "SODIMM_43", + "SODIMM_45", + "SODIMM_137", + "SODIMM_95", + "SODIMM_107", + "SODIMM_131", + "SODIMM_93", + "", + "SODIMM_138", + "", + "SODIMM_105", + "SODIMM_127"; +}; + &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dt= s/imx6ull-colibri-wifi.dtsi index 6e8ddb07e11d..3c47cfa7afa5 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi @@ -23,6 +23,142 @@ &cpu0 { clock-frequency =3D <792000000>; }; =20 +&gpio1 { + gpio-line-names =3D "SODIMM_8", + "SODIMM_6", + "SODIMM_129", + "", + "SODIMM_19", + "SODIMM_21", + "UNUSABLE_SODIMM_180", + "UNUSABLE_SODIMM_184", + "SODIMM_4", + "SODIMM_2", + "SODIMM_106", + "SODIMM_71", + "SODIMM_23", + "SODIMM_31", + "SODIMM_99", + "SODIMM_102", + "SODIMM_33", + "SODIMM_35", + "SODIMM_25", + "SODIMM_27", + "SODIMM_36", + "SODIMM_38", + "SODIMM_32", + "SODIMM_34", + "SODIMM_135", + "SODIMM_77", + "SODIMM_100", + "SODIMM_186", + "SODIMM_196", + "SODIMM_194"; +}; + +&gpio2 { + gpio-line-names =3D "SODIMM_55", + "SODIMM_63", + "SODIMM_178", + "SODIMM_188", + "SODIMM_73", + "SODIMM_30", + "SODIMM_67", + "SODIMM_104", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_190", + "SODIMM_47", + "SODIMM_192", + "SODIMM_49", + "SODIMM_51", + "SODIMM_53"; +}; + +&gpio3 { + gpio-line-names =3D "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_29", + "SODIMM_37", + "SODIMM_88", + "SODIMM_86", + "SODIMM_92", + "SODIMM_90"; +}; + +&gpio4 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_59", + "", + "", + "SODIMM_133", + "", + "SODIMM_28", + "SODIMM_75", + "SODIMM_96", + "", + "", + "", + "", + "", + "", + "SODIMM_69", + "SODIMM_98", + "SODIMM_85", + "SODIMM_65"; +}; + +&gpio5 { + gpio-line-names =3D "SODIMM_43", + "SODIMM_45", + "SODIMM_137", + "SODIMM_95", + "SODIMM_107", + "SODIMM_131", + "", + "", + "", + "", + "SODIMM_105"; +}; + &iomuxc { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BE71C433F5 for ; Fri, 6 May 2022 13:26:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243870AbiEFNaE (ORCPT ); Fri, 6 May 2022 09:30:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392637AbiEFN3J (ORCPT ); Fri, 6 May 2022 09:29:09 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.196]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BE66EDEDB; Fri, 6 May 2022 06:25:25 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MHmnb-1nnnpc17zp-003fxu; Fri, 06 May 2022 15:24:49 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Arnd Bergmann , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v3 08/13] ARM: dts: imx6ull-colibri: add support for toradex iris carrier boards Date: Fri, 6 May 2022 15:24:11 +0200 Message-Id: <20220506132416.273965-9-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:XVnGLvfT9RAgSXntsQzKOxA2U1aob3avOFMoEbCwf5u+/zWMXY7 ebgVsLARLDFUaoz3s48dXkw671rt0ZvY36lZ/O60sbcVLJcDF8guPbIj33jC+dmGf4ONV1Q q67dK7utkkmZZ2teGzaJ6TI1+0f2t/Hb5tyXlEb3yoZzSuFRPLH5qUqEkq1xLdkGAUaL/09 4MfEZffi8A7ipPvctH+mw== X-UI-Out-Filterresults: notjunk:1;V03:K0:X+G8Z4paqdg=:CAFvuYjvEA10rMcHipyBR2 SXLtyA7ITq/WsynolOTLqN5eYjNo5Bkt874gXcq1fpm9qmhpC8Pg17yfZxDKSfS1MH4d1F67Q r0cuJoJobtoG7XAHnXZ//rh3L1D30tDAkohI6hAufrYWsNzXUHYEINbMpzXz7L6335/bNpr9E kjHm0jgJ2xVuJrU9oPTavRppj8KuSjcjaf0Mab1JE4Nl+8zvRjYPNmjo+Da6jzGliUj3I3t2N pC9JEopiVv5FrEIxiXg1ZW/1RHixE4qKHgsO1b3V4kQ+lPz1jrr0COohYJ/2EKD+D4eTbSzSH YAtjJgOJU8quCCFZB4H3qDhYqio7pDjCkHEYeY2s1eSYmM3KeI/QMxVPyjoU7evzll2s089uU OEtdtpry2SvtAr4Q6GuFvdWYzc2WNK1EQlhWV8a18+EzXzAdmkHnvw8Rr1vWJlbG8r7IvDhVM pEzMqJ7TMWUuZ4AJiM0gYBjAZK6AUNzrHTPsz0YUjPD/FwnzVAhWZ0iEPOkvB0QayQsTeg4bS X9Sq59vT1C7qy5sGS7QNpLB3kZLH7MrJvcLVyPRnt+hzD2ge8y4ORbU7egROBqUZl+RUW9dn2 txnlOLwtgoExL0J1WHmP58RFl+081c4zYL/ay3hwQVEXAniNftgKZEQq/QZ130hWetT0+0oKC nB2Acfxom0suiG5cHJSLm8ZgELetduQzkKCqyUUlPmq/228+2Q8Sb6FNrT+ThV5998kyoqWiV DFWjysn7owLJB6B4 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Denys Drozdov Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family carrier boards. Iris Device Trees: - imx6ull-colibri-iris.dtb - imx6ull-colibri-emmc-iris.dtb - imx6ull-colibri-wifi-iris.dtb Iris-V2 Device Trees: - imx6ull-colibri-iris-v2.dtb - imx6ull-colibri-emmc-iris-v2.dtb - imx6ull-colibri-wifi-iris-v2.dtb Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- Changes in v3: - Replaced underscores by dashes in GPIO hog node names. - Added more LVDS specific GPIO hogs in-line with other modules. Changes in v2: - Fix alphabetical node order as suggested by Shawn. arch/arm/boot/dts/Makefile | 6 + .../boot/dts/imx6ull-colibri-emmc-iris-v2.dts | 17 +++ .../boot/dts/imx6ull-colibri-emmc-iris.dts | 17 +++ .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 4 +- arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts | 6 +- .../arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 5 +- arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts | 65 +++++++++ .../arm/boot/dts/imx6ull-colibri-iris-v2.dtsi | 27 ++++ arch/arm/boot/dts/imx6ull-colibri-iris.dts | 20 +++ arch/arm/boot/dts/imx6ull-colibri-iris.dtsi | 132 ++++++++++++++++++ .../arm/boot/dts/imx6ull-colibri-nonwifi.dtsi | 4 +- .../boot/dts/imx6ull-colibri-wifi-eval-v3.dts | 4 +- .../boot/dts/imx6ull-colibri-wifi-iris-v2.dts | 65 +++++++++ .../boot/dts/imx6ull-colibri-wifi-iris.dts | 20 +++ arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi | 4 +- arch/arm/boot/dts/imx6ull-colibri.dtsi | 4 +- 16 files changed, 385 insertions(+), 15 deletions(-) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi create mode 100644 arch/arm/boot/dts/imx6ull-colibri-iris.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-iris.dtsi create mode 100644 arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 0ad8339e07d8..6c737679165c 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -707,8 +707,14 @@ dtb-$(CONFIG_SOC_IMX6UL) +=3D \ imx6ul-tx6ul-mainboard.dtb \ imx6ull-14x14-evk.dtb \ imx6ull-colibri-emmc-eval-v3.dtb \ + imx6ull-colibri-emmc-iris.dtb \ + imx6ull-colibri-emmc-iris-v2.dtb \ imx6ull-colibri-eval-v3.dtb \ + imx6ull-colibri-iris.dtb \ + imx6ull-colibri-iris-v2.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ + imx6ull-colibri-wifi-iris.dtb \ + imx6ull-colibri-wifi-iris-v2.dtb \ imx6ull-jozacp.dtb \ imx6ull-myir-mys-6ulx-eval.dtb \ imx6ull-opos6uldev.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts b/arch/arm/= boot/dts/imx6ull-colibri-emmc-iris-v2.dts new file mode 100644 index 000000000000..b9060c2f7977 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris-v2.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-iris-v2.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 1G (eMMC) on Colibri Iris V2"; + compatible =3D "toradex,colibri-imx6ull-iris-v2", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts b/arch/arm/boo= t/dts/imx6ull-colibri-emmc-iris.dts new file mode 100644 index 000000000000..0ab71f2f5daa --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-iris.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Iris"; + compatible =3D "toradex,colibri-imx6ull-emmc-iris", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm= /boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi index a099abfdfa27..1d75bc671f75 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2021 Toradex + * Copyright 2022 Toradex */ =20 #include "imx6ull-colibri.dtsi" diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts b/arch/arm/boot/= dts/imx6ull-colibri-eval-v3.dts index 08669a18349e..9bf7111d7b00 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2018 Toradex AG + * Copyright 2018-2022 Toradex */ =20 /dts-v1/; @@ -9,6 +9,6 @@ #include "imx6ull-colibri-eval-v3.dtsi" =20 / { - model =3D "Toradex Colibri iMX6ULL 256MB on Colibri Evaluation Board V3"; + model =3D "Toradex Colibri iMX6ULL 256/512MB on Colibri Evaluation Board = V3"; compatible =3D "toradex,colibri-imx6ull-eval", "fsl,imx6ull"; }; diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-eval-v3.dtsi index 3c07b4273e80..08197c66af12 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2017 Toradex AG + * Copyright 2017-2022 Toradex */ =20 / { @@ -121,6 +121,7 @@ &uart5 { }; =20 &usbotg1 { + vbus-supply =3D <®_usbh_vbus>; status =3D "okay"; }; =20 diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts b/arch/arm/boot/= dts/imx6ull-colibri-iris-v2.dts new file mode 100644 index 000000000000..afc1e0119783 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dts @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-nonwifi.dtsi" +#include "imx6ull-colibri-iris-v2.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 256M/512B on Colibri Iris V2"; + compatible =3D "toradex,colibri-imx6ull-iris-v2", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; + +&gpio1 { + /* This turns the LVDS transceiver on */ + lvds-power-on { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name =3D "LVDS_POWER_ON"; + output-high; + }; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode { + gpio-hog; + gpios =3D <0 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name =3D "LVDS_CH_MODE"; + output-high; + }; + + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode { + gpio-hog; + gpios =3D <1 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name =3D "LVDS_RGB_MODE"; + output-low; + }; +}; + +&gpio5 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name =3D "LVDS_COLOR_MAP"; + output-low; + }; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-iris-v2.dtsi new file mode 100644 index 000000000000..93649cad0cc0 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-iris-v2.dtsi @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +#include "imx6ull-colibri-iris.dtsi" + +/ { + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible =3D "regulator-fixed"; + regulator-name =3D "3v3_vmmc"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio1 26 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <100>; + enable-active-high; + }; +}; + + +&usdhc1 { + cap-power-off-card; + vmmc-supply =3D <®_3v3_vmmc>; + /delete-property/ keep-power-in-suspend; + /delete-property/ no-1-8-v; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris.dts b/arch/arm/boot/dts= /imx6ull-colibri-iris.dts new file mode 100644 index 000000000000..4fb97b0fe30b --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-iris.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-nonwifi.dtsi" +#include "imx6ull-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 256/512MB on Colibri Iris"; + compatible =3D "toradex,colibri-imx6ull-iris", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi b/arch/arm/boot/dt= s/imx6ull-colibri-iris.dtsi new file mode 100644 index 000000000000..7f3b37baba88 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-iris.dtsi @@ -0,0 +1,132 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +/ { + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_snvs_gpiokeys>; + + power { + label =3D "Wake-Up"; + gpios =3D <&gpio5 1 GPIO_ACTIVE_HIGH>; + linux,code =3D ; + debounce-interval =3D <10>; + wakeup-source; + }; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "5V"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usbh_reg>; + regulator-name =3D "VCC_USB[1-4]"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio1 2 GPIO_ACTIVE_LOW>; + vin-supply =3D <®_5v0>; + }; +}; + +&adc1 { + status =3D "okay"; +}; + +&gpio1 { + /* + * uart25_tx_on turns the UART transceiver on. If one wants to turn the + * transceiver off, that property has to be deleted and the gpio handled + * in userspace. + * The same applies to uart1_tx_on. + */ + uart25_tx_on { + gpio-hog; + gpios =3D <15 0>; + output-high; + }; +}; + +&gpio2 { + uart1_tx_on { + gpio-hog; + gpios =3D <7 0>; + output-high; + }; +}; + +&i2c1 { + status =3D "okay"; + + /* M41T0M6 real time clock on carrier board */ + m41t0m6: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +/* PWM */ +&pwm4 { + status =3D "okay"; +}; + +/* PWM */ +&pwm5 { + status =3D "okay"; +}; + +/* PWM */ +&pwm6 { + status =3D "okay"; +}; + +/* PWM */ +&pwm7 { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart5 { + status =3D "okay"; +}; + +&usbotg1 { + vbus-supply =3D <®_usbh_vbus>; + status =3D "okay"; +}; + +&usbotg2 { + vbus-supply =3D <®_usbh_vbus>; + status =3D "okay"; +}; + +&usdhc1 { + vmmc-supply =3D <®_3v3>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-nonwifi.dtsi index 60f169227ad9..88901db255d6 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-nonwifi.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2018 Toradex AG + * Copyright 2018-2022 Toradex */ =20 #include "imx6ull-colibri.dtsi" diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts b/arch/arm/= boot/dts/imx6ull-colibri-wifi-eval-v3.dts index df72ce1ae2cb..1d64d1a5d8a7 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2018 Toradex AG + * Copyright 2018-2022 Toradex */ =20 /dts-v1/; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts b/arch/arm/= boot/dts/imx6ull-colibri-wifi-iris-v2.dts new file mode 100644 index 000000000000..ce02f8a9ddd3 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris-v2.dts @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-wifi.dtsi" +#include "imx6ull-colibri-iris-v2.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 512MB on Colibri Iris V2"; + compatible =3D "toradex,colibri-imx6ull-wifi-iris-v2", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; + +&gpio1 { + /* This turns the LVDS transceiver on */ + lvds-power-on { + gpio-hog; + gpios =3D <14 GPIO_ACTIVE_HIGH>; /* SODIMM 99 */ + line-name =3D "LVDS_POWER_ON"; + output-high; + }; +}; + +&gpio2 { + /* + * This switches the LVDS transceiver to the single-channel + * output mode. + */ + lvds-ch-mode { + gpio-hog; + gpios =3D <0 GPIO_ACTIVE_HIGH>; /* SODIMM 55 */ + line-name =3D "LVDS_CH_MODE"; + output-high; + }; + + /* + * This switches the LVDS transceiver to the 24-bit RGB mode. + */ + lvds-rgb-mode { + gpio-hog; + gpios =3D <1 GPIO_ACTIVE_HIGH>; /* SODIMM 63 */ + line-name =3D "LVDS_RGB_MODE"; + output-low; + }; +}; + +&gpio5 { + /* + * This switches the LVDS transceiver to VESA color mapping mode. + */ + lvds-color-map { + gpio-hog; + gpios =3D <3 GPIO_ACTIVE_HIGH>; /* SODIMM 95 */ + line-name =3D "LVDS_COLOR_MAP"; + output-low; + }; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts b/arch/arm/boo= t/dts/imx6ull-colibri-wifi-iris.dts new file mode 100644 index 000000000000..5ac1aa298ce7 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-iris.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2018-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-wifi.dtsi" +#include "imx6ull-colibri-iris.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 512MB on Colibri Iris"; + compatible =3D "toradex,colibri-imx6ull-wifi-iris", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi b/arch/arm/boot/dt= s/imx6ull-colibri-wifi.dtsi index 3c47cfa7afa5..db59ee6b1c86 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2018 Toradex AG + * Copyright 2018-2022 Toradex */ =20 #include "imx6ull-colibri.dtsi" diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 28baffcef096..e74dd98fa66a 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2018-2021 Toradex + * Copyright 2018-2022 Toradex */ =20 #include "imx6ull.dtsi" --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D61B7C433F5 for ; Fri, 6 May 2022 13:26:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1441802AbiEFNaJ (ORCPT ); Fri, 6 May 2022 09:30:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52768 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392571AbiEFN2y (ORCPT ); Fri, 6 May 2022 09:28:54 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1481169CC4; Fri, 6 May 2022 06:25:09 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0Lkvx5-1oKvej1WKr-00anrC; Fri, 06 May 2022 15:24:52 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Denys Drozdov , Marcel Ziswiler , Arnd Bergmann , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v3 09/13] ARM: dts: imx6ull-colibri: add support for toradex aster carrier boards Date: Fri, 6 May 2022 15:24:12 +0200 Message-Id: <20220506132416.273965-10-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:DN2nvZMKX9eFKrCfEDKZ+tgQxg5KNMypDH0QIT83+nnua90pYTp NX3r3tGtrHnxmX8u09Q1WH795vtrQMnA/20hfvOqDRWcu7uySOc3qcHpX6OJ0qY1y2IUVME xG82q+kPkW2XBsSyrzwTteuTkWSy7UX6MvdvQyZbNVbKJ0evBOBF1gz7e6YfuUKwZdk0rIK 9UUu88OeQemvd88BsJcVg== X-UI-Out-Filterresults: notjunk:1;V03:K0:kE3EHfeCyjQ=:g08za8R/86/0czyCyUggds P9Mj9DHGUTG4lihjBOUt3h7s2y9BKiTL0WRxYAN7Y8xUnjn/P49HJSUSdwkyy5OU2kag8sDf1 Av89WkjkTwEPmqs3nOnODWGwT/CrSlRaveEuKHnM1289QMPrZTXgq4rjipwJOnexrgdnv87Se VzbL0UK3mOy1iL/8EKfK7Ft6ilYN9CdsVklOo7Edh8/TQNOoaySFYsmge5VlqF5U9fFR1jB8/ cgTM1c543KA3b89UHT0+FQx7KQDDrR1OQaYW56Td6NchZ/HkFjdlWh3hPGnrBMGRBhya+/kKd ONXUmd4zZ0G/slZPyOeLmqAXWsatml8Jic9BHF/e9cocuXQP3WwoMPdyYXfyGWZJdLylgCeGu yXlcWbuQAjnLVBOHzEluhIcVEEqiXPVabZTHyyAHvZJHgmteyxt32vBZp+cfStbGUHPdxKsof CibqvSUP1RsRTZYcqOOEPrZUSMtowYeT6ZRR9pejp6hdswUeBLGAPYpWxZRNjBLbsr6Ug13cK Jb0EcMOHvT7PgQY+QMArjWqroyyvRNaR2N7+BeIxczERRj5Ee69fUp9itICWIXXoJ3VRbhqw4 IJcGTOseY665M9NryUirbUBXFajyFCu3Q+tdJK891lVzEYDPOl+FlUdyUSukWTlrrIZmP16Sg 6F75Vtf36SattGyUfeZdCzrNeE7ttZSwijB13vld+gjS2BuPWIQ3EP5uexVoTR2CKxVA= Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Denys Drozdov Add support for Toradex Aster, small form-factor Colibri Arm Computer Module family carrier board. Aster Device Trees: - imx6ull-colibri-aster.dtb - imx6ull-colibri-emmc-aster.dtb - imx6ull-colibri-wifi-aster.dtb Signed-off-by: Denys Drozdov Signed-off-by: Marcel Ziswiler --- Changes in v3: - Re-based on top of Shawn's imx/dt branch. - Dropped [PATCH v2 08/14] dt-bindings: arm: fsl: add toradex,colibri-imx6ull which already got applied by Shawn. Thanks! Changes in v2: - Dropped [PATCH v1 02/14] ARM: dts: imx6ull-colibri: fix vqmmc regulator which already got applied by Shawn. Thanks! arch/arm/boot/dts/Makefile | 3 + arch/arm/boot/dts/imx6ull-colibri-aster.dts | 20 +++ arch/arm/boot/dts/imx6ull-colibri-aster.dtsi | 145 ++++++++++++++++++ .../boot/dts/imx6ull-colibri-emmc-aster.dts | 17 ++ .../boot/dts/imx6ull-colibri-wifi-aster.dts | 20 +++ 5 files changed, 205 insertions(+) create mode 100644 arch/arm/boot/dts/imx6ull-colibri-aster.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-aster.dtsi create mode 100644 arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts create mode 100644 arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6c737679165c..7dba9e37ff98 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -706,12 +706,15 @@ dtb-$(CONFIG_SOC_IMX6UL) +=3D \ imx6ul-tx6ul-0011.dtb \ imx6ul-tx6ul-mainboard.dtb \ imx6ull-14x14-evk.dtb \ + imx6ull-colibri-aster.dtb \ + imx6ull-colibri-emmc-aster.dtb \ imx6ull-colibri-emmc-eval-v3.dtb \ imx6ull-colibri-emmc-iris.dtb \ imx6ull-colibri-emmc-iris-v2.dtb \ imx6ull-colibri-eval-v3.dtb \ imx6ull-colibri-iris.dtb \ imx6ull-colibri-iris-v2.dtb \ + imx6ull-colibri-wifi-aster.dtb \ imx6ull-colibri-wifi-eval-v3.dtb \ imx6ull-colibri-wifi-iris.dtb \ imx6ull-colibri-wifi-iris-v2.dtb \ diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dts b/arch/arm/boot/dt= s/imx6ull-colibri-aster.dts new file mode 100644 index 000000000000..d3f2fb7c6c1e --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-nonwifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 256/512MB on Colibri Aster"; + compatible =3D "toradex,colibri-imx6ull-aster", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi b/arch/arm/boot/d= ts/imx6ull-colibri-aster.dtsi new file mode 100644 index 000000000000..c9133ba2d705 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-aster.dtsi @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/ { + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_snvs_gpiokeys>; + + power { + label =3D "Wake-Up"; + gpios =3D <&gpio5 1 GPIO_ACTIVE_HIGH>; + linux,code =3D ; + debounce-interval =3D <10>; + wakeup-source; + }; + }; + + reg_3v3: regulator-3v3 { + compatible =3D "regulator-fixed"; + regulator-name =3D "3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + reg_5v0: regulator-5v0 { + compatible =3D "regulator-fixed"; + regulator-name =3D "5V"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + }; + + reg_usbh_vbus: regulator-usbh-vbus { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usbh_reg>; + regulator-name =3D "VCC_USB[1-4]"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&gpio1 2 GPIO_ACTIVE_LOW>; + vin-supply =3D <®_5v0>; + }; +}; + +&adc1 { + status =3D "okay"; +}; + +&ecspi1 { + status =3D "okay"; + + num-cs =3D <2>; + cs-gpios =3D < + &gpio3 26 GPIO_ACTIVE_HIGH /* SODIMM 86 LCD_DATA21 */ + &gpio4 28 GPIO_ACTIVE_HIGH /* SODIMM 65 CSI_DATA07 */ + >; +}; + +/* + * Following SODIMM Pins should not be accessed as GPIO on Aster board: + * 134 - AIN5_SCL (no connection) + * 127 - Voltage Level Translator OE# signal (IC11 and IC12) + * + * To configure GPIO to LED5, please disable FEC2 and uncomment the follow= ing: + * &iomuxc { + * pinctrl-names =3D "default"; + * pinctrl-0 =3D < + * &pinctrl_gpio1 + * &pinctrl_gpio2 + * &pinctrl_gpio3 + * &pinctrl_gpio4 + * &pinctrl_gpio6 - for non-WiFi modules only + * &pinctrl_gpio7 + * &pinctrl_gpio_aster + * >; + * + * pinctrl_gpio_aster: gpio-aster { + * fsl,pins =3D < + * MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x1b0b0 + * >; + * }; + * }; + */ + +&i2c1 { + status =3D "okay"; + + m41t0m6: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +/* PWM */ +&pwm4 { + status =3D "okay"; +}; + +/* PWM */ +&pwm5 { + status =3D "okay"; +}; + +/* PWM */ +&pwm6 { + status =3D "okay"; +}; + +/* PWM */ +&pwm7 { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart5 { + status =3D "okay"; +}; + +&usbotg1 { + vbus-supply =3D <®_usbh_vbus>; + status =3D "okay"; +}; + +&usbotg2 { + vbus-supply =3D <®_usbh_vbus>; + status =3D "okay"; +}; + +&usdhc1 { + vmmc-supply =3D <®_3v3>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts b/arch/arm/bo= ot/dts/imx6ull-colibri-emmc-aster.dts new file mode 100644 index 000000000000..919c0464d6cb --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-aster.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-emmc-nonwifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 1GB (eMMC) on Colibri Aster"; + compatible =3D "toradex,colibri-imx6ull-emmc-aster", + "toradex,colibri-imx6ull-emmc", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; diff --git a/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts b/arch/arm/bo= ot/dts/imx6ull-colibri-wifi-aster.dts new file mode 100644 index 000000000000..b4f65e8c5857 --- /dev/null +++ b/arch/arm/boot/dts/imx6ull-colibri-wifi-aster.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2017-2022 Toradex + */ + +/dts-v1/; + +#include "imx6ull-colibri-wifi.dtsi" +#include "imx6ull-colibri-aster.dtsi" + +/ { + model =3D "Toradex Colibri iMX6ULL 512MB on Colibri Aster"; + compatible =3D "toradex,colibri-imx6ull-wifi-aster", + "toradex,colibri-imx6ull", + "fsl,imx6ull"; +}; + +&atmel_mxt_ts { + status =3D "okay"; +}; --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4DE4C433F5 for ; Fri, 6 May 2022 13:25:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229758AbiEFN3c (ORCPT ); Fri, 6 May 2022 09:29:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392566AbiEFN2y (ORCPT ); Fri, 6 May 2022 09:28:54 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 153B96972C; Fri, 6 May 2022 06:25:07 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LcAWh-1oC5x53kGb-00jdYs; Fri, 06 May 2022 15:24:55 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 10/13] ARM: dts: imx6ull-colibri: fix nand bch geometry Date: Fri, 6 May 2022 15:24:13 +0200 Message-Id: <20220506132416.273965-11-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:rpEKWpAhE2cfXREOK6cvHNFrxxALhy80kDx1PldgifDBF+yMz30 oL9Hce1oRR1Lvv3PvegLJfUbXLNT+H//w+zSSkcc9RxbrixEI4faCuerIPegk9oCRVe4353 XjCBw76lZfuEbWZfOc7EUJFBZUBQAdxuXeDBY7NCuq83icDG66pahk4vaerijuWSUS2Ylau dMP8f/P+oFRB5q+6UZb4w== X-UI-Out-Filterresults: notjunk:1;V03:K0:r6cmugd0f9U=:TaD6Hr6K9LRILd8i6RKPaq 5Sda9gacaZ8BAX7LeX5RcJV0TnwnJNPu3cyfH/WNbxlAnXwiY28lqiCQ475CJ7+yo1R8YyU0K tNwCh98eJYeKZv0QoaLYVf+DHhdB4hImYSir8WlbD/82+dKrb8e8EoW87YrcW0w+Vbh91oH4w YgdclZEE4JDRTJYqRohTlsuBygtB4yPpVTq/bYT/GKVzx86iaerAH/oR1pjprZkmtPHxf823/ YYBbZuDtOwkXJG03H6lUmfDyht/kLFR4TfoDFJD2lG4FnbklFsDIaKUjATe2AXMMW4y1HdqmE fVIi2qC6tDnUpJbqm1k4TiobE6gm2tYG6wBmrLK6b0TUko/O/rKsC7hkf4zo0995DHnpoapDt jNxXOeW9gFhNIv5OMgXoRkHiUvSQwwx5WhbeXC0gVgPG41sVO73PGoyWrSeyMXK/THlvTB7dl T/OFeza4gRxSDIFqBLr4e0EU+gqei28VP5SSkfWhLmXPIB28WA+5BOrJVS+WVGb73iZnOwKwg IX+adG5n6FSgZslzrFLlGiqGSMiyfVAD34vsqKW/omPhpTSO9fOBoDNV/gmbIh7PcF0dYk8ou 9B0/wQfIXe5Pt03gKntpzVtZZXoDBU+MO/NxU3ca9NnypFnH+WTw+S8zPAoVDpvhv6A3jRtbm ZvMQlXv7rrL9eh8Nb74ts04dMDdAQyZ1jpSeJ0HuW7LIddPjRZH1kEtneO8WdwBKrDch/w4ip 4yx9FdietL/t2VWZ Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler Fix NAND BCH geometry relevant mainly for U-Boot. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index e74dd98fa66a..5e0cee146121 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -128,6 +128,7 @@ ethphy1: ethernet-phy@2 { &gpmi { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpmi_nand>; + fsl,use-minimum-ecc; nand-on-flash-bbt; nand-ecc-mode =3D "hw"; nand-ecc-strength =3D <8>; --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5D592C433EF for ; Fri, 6 May 2022 13:26:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392565AbiEFN3m (ORCPT ); Fri, 6 May 2022 09:29:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392574AbiEFN2y (ORCPT ); Fri, 6 May 2022 09:28:54 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A0CF69CCB; Fri, 6 May 2022 06:25:10 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MXanQ-1nHfzD22dC-00WUCL; Fri, 06 May 2022 15:24:57 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 11/13] ARM: dts: imx6ull-colibri: add/update some comments Date: Fri, 6 May 2022 15:24:14 +0200 Message-Id: <20220506132416.273965-12-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:vaeA06BgXJuOaaK+2QFmwWmbwCfAUsokGQd8xzEc771jLQDpwEL /q+XKQJ42ed81iLuGksTcdJFUhudKX1AfkzjE2Sfe7lICPZ71iQfQdn/5ocIImmxdcAA4zd n5TkSMAg3DWLJS/LV5dnF0l8E/7hOImePkkbsefSXRUJYHR4adoXNdDOuCd/8KV1M+XvibU t1S4g/ilPZ8EEgEKYorew== X-UI-Out-Filterresults: notjunk:1;V03:K0:bjfLOSatrTE=:++kDoSF5Q3YAAK9Gmo8aTW dgWwDsJJExh9ZuOMqVueA/XTWf0CcQFnuVh4jvACdiquAPCEip3F9xrIMjdtVlo2LtYFm8X0o BfGfMVze5J4nIZrkZmLqaQYukkGGMTeA0P/jeifxH7hozKq3NorWcHVL3AbucMF77ZjAM/mqw qJtlcy7j3FIDlmLGsY/xArgZ/J5Wa5IXxYRQXKy8Liqpngs0/JPGl+9UhnJNZJoj0R3+dY4WR hVSxR6jrrGii+wboVVpKaPID+LspDtcgfskrhxRsFzD5OaQSFvqiyPYtwgUCTdsaQO6Jxpiez +fHX9aAS+NQvFABZksNE8IjRkZ0ZhEzYCAvCQpIj/W4Zb9isr+oqxalh+vLcxExIpQjSSHEEa AbY9Ew8y7tLkyGt+ViVmdDOgWDU2io1nroRilW9X3bVh1IYwEt/MvLDp0F7a9CLG5M49yrZrf DgfLk35kwevuWPVqpuawIiuIBOhQUnAswjlpnjjTrUUwIxnPOKGweS1Hjuq7dB7xFCL092jC1 QILFOLc8IPp5zeXo+/oE1vAaJCuu0ubfMdF9+3LhFwbO2+Oqn720sFO5Wi1HTPuWZkMM/3OA/ 0/vNtdrBWxFnxhKw6ob/dk/yVY6x1gow/RfFDpupyJYaoCojWww+ZgwTL9GQhpxOw3BrTssYw RulEktoHG9s1vveiqz3W9k4iSSMa8P61yIQvai4ZhC11DUYcA8si7YaAAsIvswbS+m4Ak9Z+t Eb9/3hvWZ87gt5oL Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler Add/update some comments. Signed-off-by: Marcel Ziswiler --- (no changes since v1) .../dts/imx6ull-colibri-emmc-nonwifi.dtsi | 4 ++- arch/arm/boot/dts/imx6ull-colibri.dtsi | 36 ++++++++++++++----- 2 files changed, 30 insertions(+), 10 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi b/arch/arm= /boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi index 1d75bc671f75..ea238525d5c0 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-emmc-nonwifi.dtsi @@ -8,7 +8,7 @@ / { aliases { mmc0 =3D &usdhc2; /* eMMC */ - mmc1 =3D &usdhc1; /* MMC 4bit slot */ + mmc1 =3D &usdhc1; /* MMC 4-bit slot */ }; =20 memory@80000000 { @@ -154,6 +154,7 @@ &gpio5 { "SODIMM_127"; }; =20 +/* NAND */ &gpmi { status =3D "disabled"; }; @@ -170,6 +171,7 @@ &iomuxc_snvs { pinctrl-0 =3D <&pinctrl_snvs_gpio1 &pinctrl_snvs_gpio3>; }; =20 +/* eMMC */ &usdhc2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usdhc2emmc>; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 5e0cee146121..4611fa890889 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -6,6 +6,7 @@ #include "imx6ull.dtsi" =20 / { + /* Ethernet aliases to ensure correct MAC addresses */ aliases { ethernet0 =3D &fec2; ethernet1 =3D &fec1; @@ -104,6 +105,7 @@ &ecspi1 { pinctrl-0 =3D <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>; }; =20 +/* Ethernet */ &fec2 { pinctrl-names =3D "default", "sleep"; pinctrl-0 =3D <&pinctrl_enet2>; @@ -125,6 +127,7 @@ ethphy1: ethernet-phy@2 { }; }; =20 +/* NAND */ &gpmi { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpmi_nand>; @@ -136,6 +139,7 @@ &gpmi { status =3D "okay"; }; =20 +/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */ &i2c1 { pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c1>; @@ -157,6 +161,10 @@ atmel_mxt_ts: touchscreen@4a { }; }; =20 +/* + * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and + * touch screen controller + */ &i2c2 { /* Use low frequency to compensate for the high pull-up values. */ clock-frequency =3D <40000>; @@ -196,21 +204,25 @@ lcdif_out: endpoint { }; }; =20 +/* PWM */ &pwm4 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pwm4>; }; =20 +/* PWM */ &pwm5 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pwm5>; }; =20 +/* PWM */ &pwm6 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pwm6>; }; =20 +/* PWM */ &pwm7 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_pwm7>; @@ -224,6 +236,7 @@ &snvs_pwrkey { status =3D "disabled"; }; =20 +/* Colibri UART_A */ &uart1 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1 &pinctrl_uart1_ctrl1>; @@ -231,6 +244,7 @@ &uart1 { fsl,dte-mode; }; =20 +/* Colibri UART_B */ &uart2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2>; @@ -238,12 +252,14 @@ &uart2 { fsl,dte-mode; }; =20 +/* Colibri UART_C */ &uart5 { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart5>; fsl,dte-mode; }; =20 +/* Colibri USBC */ &usbotg1 { dr_mode =3D "otg"; srp-disable; @@ -251,10 +267,12 @@ &usbotg1 { adp-disable; }; =20 +/* Colibri USBH */ &usbotg2 { dr_mode =3D "host"; }; =20 +/* Colibri MMC/SD */ &usdhc1 { pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; @@ -265,7 +283,7 @@ &usdhc1 { assigned-clock-parents =3D <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates =3D <0>, <198000000>; bus-width =3D <4>; - cd-gpios =3D <&gpio5 0 GPIO_ACTIVE_LOW>; + cd-gpios =3D <&gpio5 0 GPIO_ACTIVE_LOW>; /* MMC_CD */ disable-wp; keep-power-in-suspend; no-1-8-v; @@ -431,7 +449,7 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 6= 3 */ =20 /* * With an eMMC instead of a raw NAND device the following pins - * are available at SODIMM pins + * are available at SODIMM pins. */ pinctrl_gpmi_gpio: gpmi-gpio-grp { fsl,pins =3D < @@ -556,10 +574,10 @@ MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 /* SODIM= M 25 */ =20 pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ fsl,pins =3D < - MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 */ - MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 */ - MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 */ - MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 */ + MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */ + MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */ + MX6UL_PAD_JTAG_TDO__GPIO1_IO12 0x90b1 /* SODIMM 23 / DTR */ + MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIMM 37 / RI */ >; }; =20 @@ -580,7 +598,7 @@ MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 /* SODIMM 21= */ =20 pinctrl_usbh_reg: gpio-usbh-reg { fsl,pins =3D < - MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 */ + MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */ >; }; =20 @@ -658,7 +676,7 @@ pinctrl_snvs_gpio1: snvs-gpio1-grp { MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */ MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */ MX6ULL_PAD_BOOT_MODE0__GPIO5_IO10 0x1b0a0 /* SODIMM 105 */ - MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 */ + MX6ULL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0a0 /* SODIMM 131 / USBH_OC */ MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM 138 */ >; }; @@ -695,7 +713,7 @@ MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 4= 5 */ =20 pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { fsl,pins =3D < - MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 */ + MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */ >; }; =20 --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1D1AC4332F for ; Fri, 6 May 2022 13:26:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349939AbiEFN3s (ORCPT ); Fri, 6 May 2022 09:29:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392581AbiEFN25 (ORCPT ); Fri, 6 May 2022 09:28:57 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6F70669738; Fri, 6 May 2022 06:25:14 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MXrmL-1nHOrz0GDH-00WlJU; Fri, 06 May 2022 15:25:00 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 12/13] ARM: dts: imx6ull-colibri: move gpio-keys node to som dtsi Date: Fri, 6 May 2022 15:24:15 +0200 Message-Id: <20220506132416.273965-13-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:6M8m5aUlIenun24YVIZjE6nxPoM/mKqZEGnvhtPd1+zDd33+kIE mbIpTdoB8h7Q/RjBBvB7FhJm7XxklUdQjwNmsJHJ7sE8+Enwf0yGMCUgUk3Z9iT7r1M6fKR GBpzb7dfP39bTbcjt+reWB+dKx92uhIxr6YOrCTt8bxy74yU87RS1pVFY94Mq7LDLJmpTxj O3nzoQsjj/6+17najRyuQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:oYsiHfk45LE=:AtXr3RrEpz+8VAfPNur2DF vS2QFZvoot/nOyN9B1T0ak31L4Rj1ZEu4kSK4S+FhW71ORnUkzXdxjqW0gvdMS6dOx4+zw5Qu q/cySsnRvezj6MJtq4jVHT/+4B+tfYPTFhsfPpVrX4p4/b1Q2NRc/NeBfbUev8fNGgMXXurqF nPJCu09+E9B36uZ7QRhEgDHbWWCt0j0WETD/PhTpPL4cjR0zInFmHAUZL3pcFKu3A5NYN0ujq jSHCn3K1VnYCynAiUf9wCTsy46m0X/TewcibOWTnICaT/2+BIq9eapy3VtQv9mAbP66wW5HKw ZjmtqztWi3jgVsDnkfsgAAoLk15+00FeSCHd470eLUdNezJocngn2Iy9osqhZskvAq5gJ1Mf2 S0xLsJ1t9kubfBMJ4ZeaX/DQ+5DvnhQ06PzGKIM+cbwr8zTzBO8BQiveuBGdP/PdzMefjI9l+ 6MGUUZvV0tYfENB7ZnGEWAIF2nKVS+IXYNevZQFJiqPVrEErGNEEWF2aJTS37yOZahZ75jT9t gO3q5MUPzjE09fs8h2eBHwdeExVtN6TSWGZ4TJ8HcRKEVXSMP9QFEN6xKcEttuJpqLjHdjlWi opOWwCSCfC7C95LVelfWM9kha3QtNpJQovob+WEg74x8jOo8bd4vzB/lQ4P+7KwVfL7KM4yEB nFlNX5WNaFMVV+ROYsD4uS/3Yo+sMsLDJQ/EGafsrq3n+Yob7HvmRbhms2MK3sBcMWbP/gdgZ xB5M//qnAe3eJzgb Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler The gpio-keys define module level wake-up pin functionality. Move it from the carrier board dts file to the Som dtsi file. While at it, also re-order the properties in the gpio-keys node alphabetically and rename to sub-node from power to wakeup. Signed-off-by: Marcel Ziswiler --- (no changes since v1) arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 15 --------------- arch/arm/boot/dts/imx6ull-colibri.dtsi | 16 +++++++++++++++- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot= /dts/imx6ull-colibri-eval-v3.dtsi index 08197c66af12..e29907428c20 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -8,20 +8,6 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_snvs_gpiokeys>; - - power { - label =3D "Wake-Up"; - gpios =3D <&gpio5 1 GPIO_ACTIVE_HIGH>; - linux,code =3D ; - debounce-interval =3D <10>; - wakeup-source; - }; - }; - /* fixed crystal dedicated to mcp2515 */ clk16m: clk16m { compatible =3D "fixed-clock"; @@ -29,7 +15,6 @@ clk16m: clk16m { clock-frequency =3D <16000000>; }; =20 - reg_3v3: regulator-3v3 { compatible =3D "regulator-fixed"; regulator-name =3D "3.3V"; diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 4611fa890889..4292311bdc6e 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -24,6 +24,20 @@ backlight: backlight { status =3D "okay"; }; =20 + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_snvs_gpiokeys>; + + wakeup { + debounce-interval =3D <10>; + gpios =3D <&gpio5 1 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + label =3D "Wake-Up"; + linux,code =3D ; + wakeup-source; + }; + }; + panel_dpi: panel-dpi { compatible =3D "edt,et057090dhu"; backlight =3D <&backlight>; @@ -707,7 +721,7 @@ MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0 =20 pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { fsl,pins =3D < - MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 */ + MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */ >; }; =20 --=20 2.35.1 From nobody Mon May 11 04:52:39 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAA3DC433F5 for ; Fri, 6 May 2022 13:26:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1392591AbiEFN37 (ORCPT ); Fri, 6 May 2022 09:29:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53064 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1392606AbiEFN3B (ORCPT ); Fri, 6 May 2022 09:29:01 -0400 Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69AA5193; Fri, 6 May 2022 06:25:17 -0700 (PDT) Received: from toolbox.int.toradex.com ([81.221.85.15]) by mrelay.perfora.net (mreueus003 [74.208.5.2]) with ESMTPSA (Nemesis) id 0LqBHC-1oHuzW2hrU-00do03; Fri, 06 May 2022 15:25:03 +0200 From: Marcel Ziswiler To: linux-arm-kernel@lists.infradead.org Cc: Marcel Ziswiler , Fabio Estevam , Frank Rowand , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Russell King , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 13/13] ARM: dts: imx6ull-colibri: improve pinctrl node names Date: Fri, 6 May 2022 15:24:16 +0200 Message-Id: <20220506132416.273965-14-marcel@ziswiler.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220506132416.273965-1-marcel@ziswiler.com> References: <20220506132416.273965-1-marcel@ziswiler.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:tRLEt5KRAA5DyaTZ1wVXIj5nAvNNikzNfvudQtmSfN9J8qhom8U zVlS2+n1awxkbPmaJlb6b6XfJsFoStqtyLf2Y1aKf7D1HuRmvd5e3/xi79YF9u2js7Uo8Sj dSRGAH1GEh+zqfT+h2Eh6tcOCfj/jphNdpSYyiWFKQEERhYhlEkp+SRAR29t7IyV+rCupc2 p3+gk3uYOUU9dJmyokXiA== X-UI-Out-Filterresults: notjunk:1;V03:K0:tbbC5en0/DQ=:0qIjDmZgnYUbc6I6ebWVgi e+ivx1af6A8uaQqrlKNjheZZOY+zfk8QHkjV/9nTG5PdnKo09AUmdR/g8FDgRmUHrTPZe2Ssb 5N9VC5fQYAm3JcHLmHBJaoeJtwC/9TgnMjfG63kEqmaITd4dpSHtPBOTXnwp8W7fZDgkA7kh7 aXyFKFik4iA42w4oHPyRjyznnUcc9Q2vhUdp2XpIETEA/JZY1zAE4YR5z+nalRSSNRx3XfwY/ 2SmcIsSl77qpOMBOvslEf/Ipbo0dV9CaQEpa+ee+BGeuaoc7BnGCkeEqgmHVepKERmlPz5afM yluqBQUZD88QgEbLCcyXcqXMTtFWkYzu5Ui4wKigo3aL2Dc9DWHIVX5V9iWmSiXOzorr5+OQd 7b+yR4K7e/x7s1Lsdn3GQnZuzg100oFQhP9llzPBD+OZAmtCqGkXPdj3ay6xemP19E3hsQB3J 6aMWu692fUxaZiGXuimkxmA/a5DgWcDmL4AS3/olt27umB74lXElxhlPlJRw9KYOZvQDC+Y5F sdeM4X5StecL2fSYyIgQdebIPuUIPqxp50oHk9rB56B17J+FxPM6iXJzm0lsJJYuPTvGEdeFr TRgEEBBLeUz/e2cpe2ymycIvFlsW+sjCeoDsjyIevPdmLeatSqD4rNDQfgXemW96TVIZ2xbfv SBSk8R+c9i1vOj3rhLCcq+Y0rYm52z2ijYJnIHjgjyMiEwrq9ZrgQckEcPWW56BbYOi90S71T cP5d40kHrvHOuB9o Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Marcel Ziswiler Improve on pinctrl node names. Signed-off-by: Marcel Ziswiler --- (no changes since v2) Changes in v2: - New commit with pinctrl node name improvements as suggested by Shawn. arch/arm/boot/dts/imx6ull-colibri.dtsi | 93 +++++++++++++------------- 1 file changed, 46 insertions(+), 47 deletions(-) diff --git a/arch/arm/boot/dts/imx6ull-colibri.dtsi b/arch/arm/boot/dts/imx= 6ull-colibri.dtsi index 4292311bdc6e..15ebabcacfc5 100644 --- a/arch/arm/boot/dts/imx6ull-colibri.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri.dtsi @@ -292,7 +292,7 @@ &usdhc1 { pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_snvs_usdhc1_cd>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_snvs_usdhc1_cd>; - pinctrl-3 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_sleep_cd>; + pinctrl-3 =3D <&pinctrl_usdhc1 &pinctrl_snvs_usdhc1_cd_sleep>; assigned-clocks =3D <&clks IMX6UL_CLK_USDHC1_SEL>, <&clks IMX6UL_CLK_USDH= C1>; assigned-clock-parents =3D <&clks IMX6UL_CLK_PLL2_PFD2>; assigned-clock-rates =3D <0>, <198000000>; @@ -312,7 +312,6 @@ &wdog1 { }; =20 &iomuxc { - pinctrl_adc1: adc1grp { fsl,pins =3D < MX6UL_PAD_GPIO1_IO00__GPIO1_IO00 0x3000 /* SODIMM 8 */ @@ -336,13 +335,13 @@ MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04 0xb0a0 /* SOD= IMM 107 */ >; }; =20 - pinctrl_can_int: canint-grp { + pinctrl_can_int: canintgrp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_DATA1__GPIO2_IO04 0x13010 /* SODIMM 73 */ >; }; =20 - pinctrl_enet2: enet2-grp { + pinctrl_enet2: enet2grp { fsl,pins =3D < MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 @@ -357,7 +356,7 @@ MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 >; }; =20 - pinctrl_enet2_sleep: enet2sleepgrp { + pinctrl_enet2_sleep: enet2-sleepgrp { fsl,pins =3D < MX6UL_PAD_GPIO1_IO06__GPIO1_IO06 0x0 MX6UL_PAD_GPIO1_IO07__GPIO1_IO07 0x0 @@ -372,13 +371,13 @@ MX6UL_PAD_ENET2_TX_EN__GPIO2_IO13 0x0 >; }; =20 - pinctrl_ecspi1_cs: ecspi1-cs-grp { + pinctrl_ecspi1_cs: ecspi1csgrp { fsl,pins =3D < MX6UL_PAD_LCD_DATA21__GPIO3_IO26 0x70a0 /* SODIMM 86 */ >; }; =20 - pinctrl_ecspi1: ecspi1-grp { + pinctrl_ecspi1: ecspi1grp { fsl,pins =3D < MX6UL_PAD_LCD_DATA20__ECSPI1_SCLK 0x000a0 /* SODIMM 88 */ MX6UL_PAD_LCD_DATA22__ECSPI1_MOSI 0x000a0 /* SODIMM 92 */ @@ -386,27 +385,27 @@ MX6UL_PAD_LCD_DATA23__ECSPI1_MISO 0x100a0 /* SODIMM 9= 0 */ >; }; =20 - pinctrl_flexcan1: flexcan1-grp { + pinctrl_flexcan1: flexcan1grp { fsl,pins =3D < MX6UL_PAD_ENET1_RX_DATA0__FLEXCAN1_TX 0x1b020 MX6UL_PAD_ENET1_RX_DATA1__FLEXCAN1_RX 0x1b020 >; }; =20 - pinctrl_flexcan2: flexcan2-grp { + pinctrl_flexcan2: flexcan2grp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_DATA0__FLEXCAN2_RX 0x1b020 MX6UL_PAD_ENET1_RX_EN__FLEXCAN2_TX 0x1b020 >; }; =20 - pinctrl_gpio_bl_on: gpio-bl-on-grp { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins =3D < MX6UL_PAD_JTAG_TMS__GPIO1_IO11 0x30a0 /* SODIMM 71 */ >; }; =20 - pinctrl_gpio1: gpio1-grp { + pinctrl_gpio1: gpio1grp { fsl,pins =3D < MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0x10b0 /* SODIMM 77 */ MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x70a0 /* SODIMM 99 */ @@ -419,7 +418,7 @@ MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x10b0 /* SODIMM 186 = */ >; }; =20 - pinctrl_gpio2: gpio2-grp { /* Camera */ + pinctrl_gpio2: gpio2grp { /* Camera */ fsl,pins =3D < MX6UL_PAD_CSI_DATA04__GPIO4_IO25 0x10b0 /* SODIMM 69 */ MX6UL_PAD_CSI_MCLK__GPIO4_IO17 0x10b0 /* SODIMM 75 */ @@ -429,20 +428,20 @@ MX6UL_PAD_CSI_DATA05__GPIO4_IO26 0x10b0 /* SODIMM 98 = */ >; }; =20 - pinctrl_gpio3: gpio3-grp { /* CAN2 */ + pinctrl_gpio3: gpio3grp { /* CAN2 */ fsl,pins =3D < MX6UL_PAD_ENET1_RX_EN__GPIO2_IO02 0x10b0 /* SODIMM 178 */ MX6UL_PAD_ENET1_TX_DATA0__GPIO2_IO03 0x10b0 /* SODIMM 188 */ >; }; =20 - pinctrl_gpio4: gpio4-grp { + pinctrl_gpio4: gpio4grp { fsl,pins =3D < MX6UL_PAD_CSI_DATA07__GPIO4_IO28 0x10b0 /* SODIMM 65 */ >; }; =20 - pinctrl_gpio6: gpio6-grp { /* Wifi pins */ + pinctrl_gpio6: gpio6grp { /* Wifi pins */ fsl,pins =3D < MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x10b0 /* SODIMM 89 */ MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x10b0 /* SODIMM 79 */ @@ -454,7 +453,7 @@ MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x10b0 /* SODIMM 94 */ >; }; =20 - pinctrl_gpio7: gpio7-grp { /* CAN1 */ + pinctrl_gpio7: gpio7grp { /* CAN1 */ fsl,pins =3D < MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0xb0b0/* SODIMM 55 */ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 63 */ @@ -465,7 +464,7 @@ MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0xb0b0 /* SODIMM 6= 3 */ * With an eMMC instead of a raw NAND device the following pins * are available at SODIMM pins. */ - pinctrl_gpmi_gpio: gpmi-gpio-grp { + pinctrl_gpmi_gpio: gpmigpiogrp { fsl,pins =3D < MX6UL_PAD_NAND_ALE__GPIO4_IO10 0x10b0 /* SODIMM 140 */ MX6UL_PAD_NAND_CE0_B__GPIO4_IO13 0x10b0 /* SODIMM 144 */ @@ -474,7 +473,7 @@ MX6UL_PAD_NAND_READY_B__GPIO4_IO12 0x10b0 /* SODIMM 142= */ >; }; =20 - pinctrl_gpmi_nand: gpmi-nand-grp { + pinctrl_gpmi_nand: gpminandgrp { fsl,pins =3D < MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0x100a9 MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0x100a9 @@ -493,35 +492,35 @@ MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0x100a9 >; }; =20 - pinctrl_i2c1: i2c1-grp { + pinctrl_i2c1: i2c1grp { fsl,pins =3D < MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0 /* SODIMM 196 */ MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0 /* SODIMM 194 */ >; }; =20 - pinctrl_i2c1_gpio: i2c1-gpio-grp { + pinctrl_i2c1_gpio: i2c1-gpiogrp { fsl,pins =3D < MX6UL_PAD_UART4_TX_DATA__GPIO1_IO28 0x4001b8b0 /* SODIMM 196 */ MX6UL_PAD_UART4_RX_DATA__GPIO1_IO29 0x4001b8b0 /* SODIMM 194 */ >; }; =20 - pinctrl_i2c2: i2c2-grp { + pinctrl_i2c2: i2c2grp { fsl,pins =3D < MX6UL_PAD_UART5_TX_DATA__I2C2_SCL 0x4001f8b0 MX6UL_PAD_UART5_RX_DATA__I2C2_SDA 0x4001f8b0 >; }; =20 - pinctrl_i2c2_gpio: i2c2-gpio-grp { + pinctrl_i2c2_gpio: i2c2-gpiogrp { fsl,pins =3D < MX6UL_PAD_UART5_TX_DATA__GPIO1_IO30 0x4001f8b0 MX6UL_PAD_UART5_RX_DATA__GPIO1_IO31 0x4001f8b0 >; }; =20 - pinctrl_lcdif_dat: lcdif-dat-grp { + pinctrl_lcdif_dat: lcdifdatgrp { fsl,pins =3D < MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x00079 /* SODIMM 76 */ MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x00079 /* SODIMM 70 */ @@ -544,7 +543,7 @@ MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x00079 /* SODIMM 61= */ >; }; =20 - pinctrl_lcdif_ctrl: lcdif-ctrl-grp { + pinctrl_lcdif_ctrl: lcdifctrlgrp { fsl,pins =3D < MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x00079 /* SODIMM 56 */ MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x00079 /* SODIMM 44 */ @@ -553,31 +552,31 @@ MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x00079 /* SODIMM= 82 */ >; }; =20 - pinctrl_pwm4: pwm4-grp { + pinctrl_pwm4: pwm4grp { fsl,pins =3D < MX6UL_PAD_NAND_WP_B__PWM4_OUT 0x00079 /* SODIMM 59 */ >; }; =20 - pinctrl_pwm5: pwm5-grp { + pinctrl_pwm5: pwm5grp { fsl,pins =3D < MX6UL_PAD_NAND_DQS__PWM5_OUT 0x00079 /* SODIMM 28 */ >; }; =20 - pinctrl_pwm6: pwm6-grp { + pinctrl_pwm6: pwm6grp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_EN__PWM6_OUT 0x00079 /* SODIMM 30 */ >; }; =20 - pinctrl_pwm7: pwm7-grp { + pinctrl_pwm7: pwm7grp { fsl,pins =3D < MX6UL_PAD_ENET1_TX_CLK__PWM7_OUT 0x00079 /* SODIMM 67 */ >; }; =20 - pinctrl_uart1: uart1-grp { + pinctrl_uart1: uart1grp { fsl,pins =3D < MX6UL_PAD_UART1_TX_DATA__UART1_DTE_RX 0x1b0b1 /* SODIMM 33 */ MX6UL_PAD_UART1_RX_DATA__UART1_DTE_TX 0x1b0b1 /* SODIMM 35 */ @@ -586,7 +585,7 @@ MX6UL_PAD_UART1_CTS_B__UART1_DTE_RTS 0x1b0b1 /* SODIMM = 25 */ >; }; =20 - pinctrl_uart1_ctrl1: uart1-ctrl1-grp { /* Additional DTR, DCD */ + pinctrl_uart1_ctrl1: uart1ctrl1grp { /* Additional DTR, DCD */ fsl,pins =3D < MX6UL_PAD_JTAG_TDI__GPIO1_IO13 0x70a0 /* SODIMM 31 / DCD */ MX6UL_PAD_LCD_DATA18__GPIO3_IO23 0x10b0 /* SODIMM 29 / DSR */ @@ -595,7 +594,7 @@ MX6UL_PAD_LCD_DATA19__GPIO3_IO24 0x10b0 /* SODIM= M 37 / RI */ >; }; =20 - pinctrl_uart2: uart2-grp { + pinctrl_uart2: uart2grp { fsl,pins =3D < MX6UL_PAD_UART2_TX_DATA__UART2_DTE_RX 0x1b0b1 /* SODIMM 36 */ MX6UL_PAD_UART2_RX_DATA__UART2_DTE_TX 0x1b0b1 /* SODIMM 38 */ @@ -603,20 +602,20 @@ MX6UL_PAD_UART2_CTS_B__UART2_DTE_RTS 0x1b0b1 /* SODIM= M 32 */ MX6UL_PAD_UART2_RTS_B__UART2_DTE_CTS 0x1b0b1 /* SODIMM 34 */ >; }; - pinctrl_uart5: uart5-grp { + pinctrl_uart5: uart5grp { fsl,pins =3D < MX6UL_PAD_GPIO1_IO04__UART5_DTE_RX 0x1b0b1 /* SODIMM 19 */ MX6UL_PAD_GPIO1_IO05__UART5_DTE_TX 0x1b0b1 /* SODIMM 21 */ >; }; =20 - pinctrl_usbh_reg: gpio-usbh-reg { + pinctrl_usbh_reg: usbhreggrp { fsl,pins =3D < MX6UL_PAD_GPIO1_IO02__GPIO1_IO02 0x10b0 /* SODIMM 129 / USBH_PEN */ >; }; =20 - pinctrl_usdhc1: usdhc1-grp { + pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 /* SODIMM 47 */ MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 /* SODIMM 190 */ @@ -627,7 +626,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 /* SODIMM 53 = */ >; }; =20 - pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins =3D < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 @@ -638,7 +637,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 >; }; =20 - pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins =3D < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 @@ -649,7 +648,7 @@ MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 >; }; =20 - pinctrl_usdhc2: usdhc2-grp { + pinctrl_usdhc2: usdhc2grp { fsl,pins =3D < MX6UL_PAD_CSI_DATA00__USDHC2_DATA0 0x17069 MX6UL_PAD_CSI_DATA01__USDHC2_DATA1 0x17069 @@ -677,7 +676,7 @@ MX6UL_PAD_NAND_DATA07__USDHC2_DATA7 0x17059 >; }; =20 - pinctrl_wdog: wdog-grp { + pinctrl_wdog: wdoggrp { fsl,pins =3D < MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 >; @@ -685,7 +684,7 @@ MX6UL_PAD_LCD_RESET__WDOG1_WDOG_ANY 0x30b0 }; =20 &iomuxc_snvs { - pinctrl_snvs_gpio1: snvs-gpio1-grp { + pinctrl_snvs_gpio1: snvsgpio1grp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x110a0 /* SODIMM 93 */ MX6ULL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x110a0 /* SODIMM 95 */ @@ -695,49 +694,49 @@ MX6ULL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x110a0 /* SODIMM= 138 */ >; }; =20 - pinctrl_snvs_gpio3: snvs-gpio3-grp { /* Wifi pins */ + pinctrl_snvs_gpio3: snvsgpio3grp { /* Wifi pins */ fsl,pins =3D < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 /* SODIMM 127 */ >; }; =20 - pinctrl_snvs_ad7879_int: snvs-ad7879-int-grp { /* TOUCH Interrupt */ + pinctrl_snvs_ad7879_int: snvsad7879intgrp { /* TOUCH Interrupt */ fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x100b0 >; }; =20 - pinctrl_snvs_reg_sd: snvs-reg-sd-grp { + pinctrl_snvs_reg_sd: snvsregsdgrp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x400100b0 >; }; =20 - pinctrl_snvs_usbc_det: snvs-usbc-det-grp { + pinctrl_snvs_usbc_det: snvsusbcdetgrp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x130b0 >; }; =20 - pinctrl_snvs_gpiokeys: snvs-gpiokeys-grp { + pinctrl_snvs_gpiokeys: snvsgpiokeysgrp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x130a0 /* SODIMM 45 / WAKE_UP */ >; }; =20 - pinctrl_snvs_usdhc1_cd: snvs-usdhc1-cd-grp { + pinctrl_snvs_usdhc1_cd: snvsusdhc1cdgrp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x1b0a0 /* SODIMM 43 / MMC_CD */ >; }; =20 - pinctrl_snvs_usdhc1_sleep_cd: snvs-usdhc1-cd-grp-slp { + pinctrl_snvs_usdhc1_cd_sleep: snvsusdhc1cd-sleepgrp { fsl,pins =3D < MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0 >; }; =20 - pinctrl_snvs_wifi_pdn: snvs-wifi-pdn-grp { + pinctrl_snvs_wifi_pdn: snvswifipdngrp { fsl,pins =3D < MX6ULL_PAD_BOOT_MODE1__GPIO5_IO11 0x130a0 >; --=20 2.35.1