From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1318C433EF for ; Thu, 5 May 2022 19:46:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385293AbiEETtu (ORCPT ); Thu, 5 May 2022 15:49:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385279AbiEETtq (ORCPT ); Thu, 5 May 2022 15:49:46 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2561E5D645; Thu, 5 May 2022 12:46:06 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 23C351F45CC2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779965; bh=21w7d4HLQIHxJNtHhSY7Qd63ixB77Yj/2Hy7oU1nCRM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MA793fHkQpeb0B6Mq8BCqnXq8maWZ6jDR75RsX19Yzl66A9YyFx4ue57yg4ruqcFH ENNSUUUJj1sRlTTvM2WxOTiSIRf2NO2PEVfLJqAchkCpLsUzDU8phQbVgiqiwNZHOb KaF8HNW9JZU4ujSTDwIkJQvZPIiDgP+KBJiE6UCixBzGn8wTkjqfKhG7n/3CkOqCik k2qWff5dxwOgh7Iqc6gIKN/Z0ela1sSgBG0BTCgUYrKDo1VxU6pRFC+6fXcLB8uZt7 lFOywidO3A6gKDkrrZ8MihQyE+n5Ndbyh1BBnThv6p7bseJMMF35WvQK0biC02PakZ 8YqDaPWLOazaQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Allen-KH Cheng , Fabien Parent , Hsin-Yi Wang , Krzysztof Kozlowski , Luca Weiss , Maxim Kutnij , Rob Herring , Sam Shih , Sean Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 01/16] dt-bindings: arm64: dts: mediatek: Add mt8192-asurada-spherion Date: Thu, 5 May 2022 15:45:35 -0400 Message-Id: <20220505194550.3094656-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for the Google Spherion board, which is used for Acer Chromebook 514 (CB514-2H). Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch Documentation/devicetree/bindings/arm/mediatek.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 4a2bd9759c47..43fc3417e786 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -131,6 +131,14 @@ properties: - enum: - mediatek,mt8183-evb - const: mediatek,mt8183 + - description: Google Spherion (Acer Chromebook 514) + items: + - const: google,spherion-rev3 + - const: google,spherion-rev2 + - const: google,spherion-rev1 + - const: google,spherion-rev0 + - const: google,spherion + - const: mediatek,mt8192 - items: - enum: - mediatek,mt8192-evb --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5E09C433EF for ; Thu, 5 May 2022 19:46:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385305AbiEETt4 (ORCPT ); Thu, 5 May 2022 15:49:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34498 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385294AbiEETtv (ORCPT ); Thu, 5 May 2022 15:49:51 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4821D5D651; Thu, 5 May 2022 12:46:11 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 9FA281F45CC6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779970; bh=5Kcbcqr9OhmHIuCYNXcg4C+KzQ6qGeSuadFLlrIJIpI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ea29dOxZVnZfxMa8lHkkVZVcdYNA/IJW9A/OO8DPYVdpBx9E2IEP7OKdsAekp9IlG /NOoFuzjIX/C73+/b/njYYfStfREJ6dg+jd5C2ViKlHimpXa1rCxbDs//sGEr18atH sU7wovYGUidGjGXEwLvbl/jWKXKUSbEvsvJbrkjyVDNVMKnz5FV14FIVrBgvbVQZ9m j6ShUa/7LqVG86/oJRLW3Wqx78A1fQmsQVaELZdkMVXDGJnamVjHXZ4gV8IUa6HdDq 3pvQqX7hrCYkZWb+aWVEGIX0brnH+szPZBmV2Bz+/oYo70AzptrMw4Atvb4l27drJ8 cmxgDAcyMnAdw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Allen-KH Cheng , Hsin-Yi Wang , Krzysztof Kozlowski , Maxim Kutnij , Rob Herring , Sam Shih , Sean Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 02/16] dt-bindings: arm64: dts: mediatek: Add mt8192-asurada-hayato Date: Thu, 5 May 2022 15:45:36 -0400 Message-Id: <20220505194550.3094656-3-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add binding for the Google Hayato board. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch Documentation/devicetree/bindings/arm/mediatek.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 43fc3417e786..bbe475788479 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -131,6 +131,11 @@ properties: - enum: - mediatek,mt8183-evb - const: mediatek,mt8183 + - description: Google Hayato + items: + - const: google,hayato-rev1 + - const: google,hayato + - const: mediatek,mt8192 - description: Google Spherion (Acer Chromebook 514) items: - const: google,spherion-rev3 --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CA2DC433F5 for ; Thu, 5 May 2022 19:46:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385317AbiEETt7 (ORCPT ); Thu, 5 May 2022 15:49:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385303AbiEETty (ORCPT ); Thu, 5 May 2022 15:49:54 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 761D85D651; Thu, 5 May 2022 12:46:14 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id A12161F45CCB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779973; bh=sGHBxK6V/fFriQYhcXCXjVn4Eixl4oBE2sqjXMTIte8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k7cC7WwrvswPAet+3zghF6librIKngm73EtS/0lUq7zY8jL71ZyuHD7NlryCHwyde gwoiWydPnuyLsNMjtKVLEPYJXY0NtZfugYR3nclvxRlWYAJh4JJuU2Mi/CNrqhMv1r iSgphCOzAFzc60sb2fASVmuLUik60cQXHvGqzdVuXC4gSL6/7E4aMOb70c42r6YoKv Mt3QZcR4hMdQSl+Q1oO+RfKeQhgAIdJOhGW5K75kpZDyN7VJL1zlDxnDTkC2fqi6bW z3nfRtQmN1VYxUevVhcMZ1lmsGF9kVqUzaXE1usbg9TXtARvNVTnKtofX1BF0xauZi LysvqzuhmvD1Q== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 03/16] arm64: dts: mediatek: Introduce MT8192-based Asurada board family Date: Thu, 5 May 2022 15:45:37 -0400 Message-Id: <20220505194550.3094656-4-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Introduce the MT8192 Asurada Chromebook platform, including the Asurada Spherion and Asurada Hayato boards. This is enough configuration to get serial output working on Spherion and Hayato. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Changed model name prefix from Mediatek to Google on Hayato and Spherion dts arch/arm64/boot/dts/mediatek/Makefile | 2 ++ .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 11 ++++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 13 ++++++++++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 26 +++++++++++++++++++ 4 files changed, 52 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.d= ts create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0= .dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index c7d4636a2cb7..4f2c258311d6 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -37,6 +37,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-kodama-sku3= 2.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-kukui-krane-sku176.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8183-pumpkin.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-hayato-r1.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-asurada-spherion-r0.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8192-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8195-evb.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/ar= ch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts new file mode 100644 index 000000000000..00c76709a055 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Google LLC + */ +/dts-v1/; +#include "mt8192-asurada.dtsi" + +/ { + model =3D "Google Hayato rev1"; + compatible =3D "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts new file mode 100644 index 000000000000..d384d584bbcf --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2021 Google LLC + */ +/dts-v1/; +#include "mt8192-asurada.dtsi" + +/ { + model =3D "Google Spherion (rev0 - 3)"; + compatible =3D "google,spherion-rev3", "google,spherion-rev2", + "google,spherion-rev1", "google,spherion-rev0", + "google,spherion", "mediatek,mt8192"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi new file mode 100644 index 000000000000..277bd38943fe --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2020 MediaTek Inc. + * Author: Seiya Wang + */ +/dts-v1/; +#include "mt8192.dtsi" + +/ { + aliases { + serial0 =3D &uart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + memory@40000000 { + device_type =3D "memory"; + reg =3D <0 0x40000000 0 0x80000000>; + }; +}; + +&uart0 { + status =3D "okay"; +}; --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91AF9C433F5 for ; Thu, 5 May 2022 19:46:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385244AbiEETuJ (ORCPT ); Thu, 5 May 2022 15:50:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385302AbiEETt5 (ORCPT ); Thu, 5 May 2022 15:49:57 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6413E5D645; Thu, 5 May 2022 12:46:17 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id B7ACC1F45CC6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779976; bh=9KGAf5hdHZB127eIs5P8+2H2JU2EwWKMyqvvcsvsETU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n4+o6THEhmHSSB+EDl0I0M4qWz60BWuae9YbFhwP67bfCw5MqFHtqxmwkNF8QFcNM fUVY3Zw+BPkaDUXIGD+YxwYxYfhyi72I6iKnKYXZr+gaM+ItAd3L621DfdUO41GywB /e0RiEJLKg7tios7IvWPXk3FuUC/Y3/VWPayv7j8KPIeSc1OMWz1/xfRzAiua8Xncf 08qhlPFXm0LvobytR1xlvR4M087Z4fC5Rpo6ULqko2THnyBTvWW/gCUbp9zZrS1zz+ tIQIN3WZLBeJdxrGa6ybixd4afbfWe4dbVGmVS32VuKuKX81el5CQGTtNz7/QNw3Qo Fe4M7zECjSkhQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 04/16] arm64: dts: mediatek: asurada: Document GPIO names Date: Thu, 5 May 2022 15:45:38 -0400 Message-Id: <20220505194550.3094656-5-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the gpio-line-names property to gpio-controller in order to document the usage of GPIOs on the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 228 ++++++++++++++++++ 1 file changed, 228 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 277bd38943fe..e10636298639 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -21,6 +21,234 @@ memory@40000000 { }; }; =20 +&pio { + /* 220 lines */ + gpio-line-names =3D "I2S_DP_LRCK", + "IS_DP_BCLK", + "I2S_DP_MCLK", + "I2S_DP_DATAOUT", + "SAR0_INT_ODL", + "EC_AP_INT_ODL", + "EDPBRDG_INT_ODL", + "DPBRDG_INT_ODL", + "DPBRDG_PWREN", + "DPBRDG_RST_ODL", + "I2S_HP_MCLK", + "I2S_HP_BCK", + "I2S_HP_LRCK", + "I2S_HP_DATAIN", + /* + * AP_FLASH_WP_L is crossystem ABI. Schematics + * call it AP_FLASH_WP_ODL. + */ + "AP_FLASH_WP_L", + "TRACKPAD_INT_ODL", + "EC_AP_HPD_OD", + "SD_CD_ODL", + "HP_INT_ODL_ALC", + "EN_PP1000_DPBRDG", + "AP_GPIO20", + "TOUCH_INT_L_1V8", + "UART_BT_WAKE_ODL", + "AP_GPIO23", + "AP_SPI_FLASH_CS_L", + "AP_SPI_FLASH_CLK", + "EN_PP3300_DPBRDG_DX", + "AP_SPI_FLASH_MOSI", + "AP_SPI_FLASH_MISO", + "I2S_HP_DATAOUT", + "AP_GPIO30", + "I2S_SPKR_MCLK", + "I2S_SPKR_BCLK", + "I2S_SPKR_LRCK", + "I2S_SPKR_DATAIN", + "I2S_SPKR_DATAOUT", + "AP_SPI_H1_TPM_CLK", + "AP_SPI_H1_TPM_CS_L", + "AP_SPI_H1_TPM_MISO", + "AP_SPI_H1_TPM_MOSI", + "BL_PWM", + "EDPBRDG_PWREN", + "EDPBRDG_RST_ODL", + "EN_PP3300_HUB", + "HUB_RST_L", + "", + "", + "", + "", + "", + "", + "SD_CLK", + "SD_CMD", + "SD_DATA3", + "SD_DATA0", + "SD_DATA2", + "SD_DATA1", + "", + "", + "", + "", + "", + "", + "PCIE_WAKE_ODL", + "PCIE_RST_L", + "PCIE_CLKREQ_ODL", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SPMI_SCL", + "SPMI_SDA", + "AP_GOOD", + "UART_DBG_TX_AP_RX", + "UART_AP_TX_DBG_RX", + "UART_AP_TX_BT_RX", + "UART_BT_TX_AP_RX", + "MIPI_DPI_D0_R", + "MIPI_DPI_D1_R", + "MIPI_DPI_D2_R", + "MIPI_DPI_D3_R", + "MIPI_DPI_D4_R", + "MIPI_DPI_D5_R", + "MIPI_DPI_D6_R", + "MIPI_DPI_D7_R", + "MIPI_DPI_D8_R", + "MIPI_DPI_D9_R", + "MIPI_DPI_D10_R", + "", + "", + "MIPI_DPI_DE_R", + "MIPI_DPI_D11_R", + "MIPI_DPI_VSYNC_R", + "MIPI_DPI_CLK_R", + "MIPI_DPI_HSYNC_R", + "PCM_BT_DATAIN", + "PCM_BT_SYNC", + "PCM_BT_DATAOUT", + "PCM_BT_CLK", + "AP_I2C_AUDIO_SCL", + "AP_I2C_AUDIO_SDA", + "SCP_I2C_SCL", + "SCP_I2C_SDA", + "AP_I2C_WLAN_SCL", + "AP_I2C_WLAN_SDA", + "AP_I2C_DPBRDG_SCL", + "AP_I2C_DPBRDG_SDA", + "EN_PP1800_DPBRDG_DX", + "EN_PP3300_EDP_DX", + "EN_PP1800_EDPBRDG_DX", + "EN_PP1000_EDPBRDG", + "SCP_JTAG0_TDO", + "SCP_JTAG0_TDI", + "SCP_JTAG0_TMS", + "SCP_JTAG0_TCK", + "SCP_JTAG0_TRSTN", + "EN_PP3000_VMC_PMU", + "EN_PP3300_DISPLAY_DX", + "TOUCH_RST_L_1V8", + "TOUCH_REPORT_DISABLE", + "", + "", + "AP_I2C_TRACKPAD_SCL_1V8", + "AP_I2C_TRACKPAD_SDA_1V8", + "EN_PP3300_WLAN", + "BT_KILL_L", + "WIFI_KILL_L", + "SET_VMC_VOLT_AT_1V8", + "EN_SPK", + "AP_WARM_RST_REQ", + "", + "", + "EN_PP3000_SD_S3", + "AP_EDP_BKLTEN", + "", + "", + "", + "AP_SPI_EC_CLK", + "AP_SPI_EC_CS_L", + "AP_SPI_EC_MISO", + "AP_SPI_EC_MOSI", + "AP_I2C_EDPBRDG_SCL", + "AP_I2C_EDPBRDG_SDA", + "MT6315_PROC_INT", + "MT6315_GPU_INT", + "UART_SERVO_TX_SCP_RX", + "UART_SCP_TX_SERVO_RX", + "BT_RTS_AP_CTS", + "AP_RTS_BT_CTS", + "UART_AP_WAKE_BT_ODL", + "WLAN_ALERT_ODL", + "EC_IN_RW_ODL", + "H1_AP_INT_ODL", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MSDC0_CMD", + "MSDC0_DAT0", + "MSDC0_DAT2", + "MSDC0_DAT4", + "MSDC0_DAT6", + "MSDC0_DAT1", + "MSDC0_DAT5", + "MSDC0_DAT7", + "MSDC0_DSL", + "MSDC0_CLK", + "MSDC0_DAT3", + "MSDC0_RST_L", + "SCP_VREQ_VAO", + "AUD_DAT_MOSI2", + "AUD_NLE_MOSI1", + "AUD_NLE_MOSI0", + "AUD_DAT_MISO2", + "AP_I2C_SAR_SDA", + "AP_I2C_SAR_SCL", + "AP_I2C_PWR_SCL", + "AP_I2C_PWR_SDA", + "AP_I2C_TS_SCL_1V8", + "AP_I2C_TS_SDA_1V8", + "SRCLKENA0", + "SRCLKENA1", + "AP_EC_WATCHDOG_L", + "PWRAP_SPI0_MI", + "PWRAP_SPI0_CSN", + "PWRAP_SPI0_MO", + "PWRAP_SPI0_CK", + "AP_RTC_CLK32K", + "AUD_CLK_MOSI", + "AUD_SYNC_MOSI", + "AUD_DAT_MOSI0", + "AUD_DAT_MOSI1", + "AUD_DAT_MISO0", + "AUD_DAT_MISO1"; +}; + &uart0 { status =3D "okay"; }; --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B13FFC4332F for ; Thu, 5 May 2022 19:46:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385320AbiEETuN (ORCPT ); Thu, 5 May 2022 15:50:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34846 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385211AbiEETuJ (ORCPT ); Thu, 5 May 2022 15:50:09 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9D6175DA7B; Thu, 5 May 2022 12:46:28 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id E74AB1F45CC9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779979; bh=XzEaiEHNWOYXuBWQGKEaKopiSHkFX8Xw6nY868u+Ces=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=U2rc+UO+OXSwdT+oR1eWJK4kT4Bc6IoHf8rWTxs4788dFRNZhJb9WKoKYG+xJu5if 2wYeQewZ9+k9NipMekRbxrVHCIiOYyu+b5vlmSPHFptmohRO3HPHCpbl7fswzixn6W DeYH86oCoryzksUAlzjbGnV1rvuF+C7mnKNx0iAbvtuY9m5tWc0Ni6dotvG0UAUB0r 1m5ak/CX+USpqHr+uR2jGOKmfFDn4A6EvFJlRQq1iEpWosMm3UsW+8wm4P2VjqUsLE vNIZzlEZoOFG9m3UeuDWMTzndhGPVqi6oL2AoNmFedsBQW8c57GBNAipiebTwLGLQ5 wSnUBZjND6gvw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 05/16] arm64: dts: mediatek: asurada: Add system-wide power supplies Date: Thu, 5 May 2022 15:45:39 -0400 Message-Id: <20220505194550.3094656-6-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add system-wide power supplies present on all of the boards in the Asurada family. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index e10636298639..5cb7580a13cf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -19,6 +19,70 @@ memory@40000000 { device_type =3D "memory"; reg =3D <0 0x40000000 0 0x80000000>; }; + + /* system wide LDO 1.8V power rail */ + pp1800_ldo_g: pp1800-ldo-g { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp1800_ldo_g"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&pp3300_g>; + }; + + /* system wide switching 3.3V power rail */ + pp3300_g: pp3300-g { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_g"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide LDO 3.3V power rail */ + pp3300_ldo_z: pp3300-ldo-z { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_ldo_z"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* separately switched 3.3V power rail */ + pp3300_u: pp3300-u { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_u"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + /* enable pin wired to GPIO controlled by EC */ + vin-supply =3D <&pp3300_g>; + }; + + /* system wide switching 5.0V power rail */ + pp5000_a: pp5000-a { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp5000_a"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&ppvar_sys>; + }; + + /* system wide semi-regulated power rail from battery or USB */ + ppvar_sys: ppvar-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "ppvar_sys"; + regulator-always-on; + regulator-boot-on; + }; }; =20 &pio { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC485C433EF for ; Thu, 5 May 2022 19:46:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385341AbiEETuR (ORCPT ); Thu, 5 May 2022 15:50:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34850 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385303AbiEETuL (ORCPT ); Thu, 5 May 2022 15:50:11 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A46B85D651; Thu, 5 May 2022 12:46:31 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 8D1111F45CCB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779990; bh=I6V1qhlJl3e4i+gbr+q91PTZx0jogs0Jp+BzGxZx2KE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TW06FaAmI0ySY7OshRtxKpiWkT8By/BDpG0/bMqo7BdF1ZvxjVqFAOC5wrNrVHtUR WJAkewcDestegsNrKlFxerdHr6Pl2+/5VHqy/oK0yu/aay2lc5zmHI6LalzT/spr1y 89GihkT0L92RSIxX18NuevodbMabh6sZ+pbUyng3PIT16k8j5oioirdNbux/OmAghp iAVFdGyCWfy6tEkOxcIjwNrATs32aPF5eABgkKJJIo32jsiogZnwqCJ3lxMnAdemvb RqJDse0mK7FFnDO5WUTxS90w1F86oD1pFuM0EkMZMX9W6G6mP8rznAMg5ckXCycYYT /r4izLAdEGq+w== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 06/16] arm64: dts: mediatek: asurada: Enable and configure I2C and SPI busses Date: Thu, 5 May 2022 15:45:40 -0400 Message-Id: <20220505194550.3094656-7-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform has five I2C controllers and two SPI controllers that are used. In preparation for enabling the devices connected to these controllers, enable and configure their busses. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 130 ++++++++++++++++++ 1 file changed, 130 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 5cb7580a13cf..3c5b1e475cf6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -85,6 +85,47 @@ ppvar_sys: ppvar-sys { }; }; =20 +&i2c0 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; +}; + +&i2c1 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c1_pins>; +}; + +&i2c2 { + status =3D "okay"; + + clock-frequency =3D <400000>; + clock-stretch-ns =3D <12600>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_pins>; +}; + +&i2c3 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c3_pins>; +}; + +&i2c7 { + status =3D "okay"; + + clock-frequency =3D <400000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c7_pins>; +}; + &pio { /* 220 lines */ gpio-line-names =3D "I2S_DP_LRCK", @@ -311,6 +352,95 @@ &pio { "AUD_DAT_MOSI1", "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + + i2c0_pins: i2c0-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c1_pins: i2c1-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c2_pins: i2c2-default-pins { + pins-bus { + pinmux =3D , + ; + bias-pull-up; + mediatek,pull-up-adv =3D <3>; + mediatek,drive-strength-adv =3D <0>; + }; + }; + + i2c3_pins: i2c3-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + i2c7_pins: i2c7-default-pins { + pins-bus { + pinmux =3D , + ; + bias-disable; + mediatek,drive-strength-adv =3D <7>; + }; + }; + + spi1_pins: spi1-default-pins { + pins-cs-mosi-clk { + pinmux =3D , + , + ; + bias-disable; + }; + + pins-miso { + pinmux =3D ; + bias-pull-down; + }; + }; + + spi5_pins: spi5-default-pins { + pins-bus { + pinmux =3D , + , + , + ; + bias-disable; + }; + }; +}; + +&spi1 { + status =3D "okay"; + + mediatek,pad-select =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi1_pins>; +}; + +&spi5 { + status =3D "okay"; + + cs-gpios =3D <&pio 37 GPIO_ACTIVE_LOW>; + mediatek,pad-select =3D <0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&spi5_pins>; }; =20 &uart0 { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8215C433F5 for ; Thu, 5 May 2022 19:46:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385354AbiEETuZ (ORCPT ); Thu, 5 May 2022 15:50:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385326AbiEETuP (ORCPT ); Thu, 5 May 2022 15:50:15 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C62CE5DA7B; Thu, 5 May 2022 12:46:34 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 448A11F45CD4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779993; bh=e74sZbpqUGhj6kx7s7bPANpIdoqwtDfemeI26ZuR+Yw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iT1gT+XswaaRB3tvXjtX2P9YwdojMf8MvpLtpB6o39WkDOBggr7DqmJzXpXAckyGQ oDiBYI933R5vdaZddvqdrIBGSY/ArJnxm0p8R7tPuZd3yg9Pwsm5zUCzw4VWQdSLDC kEF9bppZUpFbd+HJZutnuiBEj9z+MBhI03uvQAJrGHXM+bWEq/FawTQZzYkFx8V2jx TZGKL//dB7u+ekP7npJFTZJoi19Tps2XE2frrhUbzUaoMS3OYGloZnigNvZSbiu6xb tD/7P/eqs5UsU37OcNKPF01TOoyONzX/xVC1epVd0gfL3Exwhg+fazLYMvDwnrffV3 AnfBwHshSJNqA== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 07/16] arm64: dts: mediatek: asurada: Add ChromeOS EC Date: Thu, 5 May 2022 15:45:41 -0400 Message-Id: <20220505194550.3094656-8-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Renamed PWM subnode to avoid dt-binding warning (ec-pwm -> pwm) .../boot/dts/mediatek/mt8192-asurada.dtsi | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 3c5b1e475cf6..662207d0eb75 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -353,6 +353,14 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; =20 + cros_ec_int: cros-ec-irq-default-pins { + pins-ec-ap-int-odl { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + }; + i2c0_pins: i2c0-default-pins { pins-bus { pinmux =3D , @@ -432,6 +440,74 @@ &spi1 { mediatek,pad-select =3D <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&spi1_pins>; + + cros_ec: ec@0 { + compatible =3D "google,cros-ec-spi"; + reg =3D <0>; + interrupts-extended =3D <&pio 5 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <3000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cros_ec_int>; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + base_detection: cbas { + compatible =3D "google,cros-cbas"; + }; + + cros_ec_pwm: pwm { + compatible =3D "google,cros-ec-pwm"; + #pwm-cells =3D <1>; + + status =3D "disabled"; + }; + + i2c_tunnel: i2c-tunnel { + compatible =3D "google,cros-ec-i2c-tunnel"; + google,remote-bus =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mt6360_ldo3_reg: regulator@0 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <0>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + }; + + mt6360_ldo5_reg: regulator@1 { + compatible =3D "google,cros-ec-regulator"; + reg =3D <1>; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + }; + + typec { + compatible =3D "google,cros-ec-typec"; + #address-cells =3D <1>; + #size-cells =3D <0>; + + usb_c0: connector@0 { + compatible =3D "usb-c-connector"; + reg =3D <0>; + label =3D "left"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + + usb_c1: connector@1 { + compatible =3D "usb-c-connector"; + reg =3D <1>; + label =3D "right"; + power-role =3D "dual"; + data-role =3D "host"; + try-power-role =3D "source"; + }; + }; + }; }; =20 &spi5 { @@ -446,3 +522,6 @@ &spi5 { &uart0 { status =3D "okay"; }; + +#include +#include --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D10BC433EF for ; Thu, 5 May 2022 19:46:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385369AbiEETua (ORCPT ); Thu, 5 May 2022 15:50:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35054 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385343AbiEETuT (ORCPT ); Thu, 5 May 2022 15:50:19 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1D5245D651; Thu, 5 May 2022 12:46:38 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 1B9571F45CCD DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651779997; bh=T51OK/vVhW36JlunHPrBRDVW5Rm5AifIL1V8W6fBY8E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FsRnU6UG3UgTCz1SocvQc9D26+Rih/z1frhQXpJMHYd3Jr6cX/jBWl8/5/3EsATUI rx9M01vWO6o7C6w3BIU4sFNFND3/66m3LmoPMFMzJ8I68t0YwEQnYlnlUVO9EwM4va lpR8Qopc5wGhBIWVVxH2JFNIbxbJaHSCCcCVcu7ngtznSl87qThvwgrHHJjc74KNJT z4CSPH+pH6nuxckVLbSr2e5kTfRNbBulrzQDGerPmxHIfhhJKUgXqdUzKNM6gaTFbA je2Le7PNhrO21y/z/GNYT1ZxhBoG7Kv+r15OeOPxYbyMN5UvQ1BCuo+DZ4ri/V07Kf SbJhrPNPAcLtA== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 08/16] arm64: dts: mediatek: asurada: Add keyboard mapping for the top row Date: Thu, 5 May 2022 15:45:42 -0400 Message-Id: <20220505194550.3094656-9-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Chromebooks' embedded keyboards differ from standard layouts for the top row in that they have shortcuts in place of the standard function keys. Map these keys to achieve the functionality that is pictured on the printouts. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 662207d0eb75..a1cbf7a375b6 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -525,3 +525,32 @@ &uart0 { =20 #include #include + +&keyboard_controller { + function-row-physmap =3D < + MATRIX_KEY(0x00, 0x02, 0) /* T1 */ + MATRIX_KEY(0x03, 0x02, 0) /* T2 */ + MATRIX_KEY(0x02, 0x02, 0) /* T3 */ + MATRIX_KEY(0x01, 0x02, 0) /* T4 */ + MATRIX_KEY(0x03, 0x04, 0) /* T5 */ + MATRIX_KEY(0x02, 0x04, 0) /* T6 */ + MATRIX_KEY(0x01, 0x04, 0) /* T7 */ + MATRIX_KEY(0x02, 0x09, 0) /* T8 */ + MATRIX_KEY(0x01, 0x09, 0) /* T9 */ + MATRIX_KEY(0x00, 0x04, 0) /* T10 */ + >; + linux,keymap =3D < + MATRIX_KEY(0x00, 0x02, KEY_BACK) + MATRIX_KEY(0x03, 0x02, KEY_REFRESH) + MATRIX_KEY(0x02, 0x02, KEY_ZOOM) + MATRIX_KEY(0x01, 0x02, KEY_SCALE) + MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) + MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) + MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) + MATRIX_KEY(0x02, 0x09, KEY_MUTE) + MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) + MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) + + CROS_STD_MAIN_KEYMAP + >; +}; --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 18C0BC433FE for ; Thu, 5 May 2022 19:46:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385346AbiEETue (ORCPT ); Thu, 5 May 2022 15:50:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385361AbiEETu1 (ORCPT ); Thu, 5 May 2022 15:50:27 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8CD495E168; Thu, 5 May 2022 12:46:41 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 782D21F45CCE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780000; bh=4PBOh4M6bJ2M0kJAtlVqT+bTLE2+DOSd+p4NN3H8MQA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QKA+47hAV5ct/svISUIaYtGG5R/sdS7fMhJs89/a16lQCxjf4o4CjsvkqnJsXgiDz N1sey4E/PkrX2KyFuS6rkShD0Kvg+iNGap4LHhiWSAMQlUNrsLFnrKMkDjlYDZv5g0 rYcJGUjOd3YvvKd/WDl9WTTki2G2q3DdWgOJasAtiRQGabVMDSAxvx4GQMnUTRkPHK riayXt8vZGtRcfIy4/akKmcd4FSVaYjDsY6RSr8+mdRkcJ3cukG+2saQFOKurxl2Uu 9paXDzzT1t88+gVXu4HMr9Dzskn0I//D6F0mEmAP93j476tPJ0zOMLiu6Oa27+EcP9 matsHtM8koagg== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 09/16] arm64: dts: mediatek: asurada: Add Cr50 TPM Date: Thu, 5 May 2022 15:45:43 -0400 Message-Id: <20220505194550.3094656-10-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform has a Google Security Chip connected to the SPI5 bus. It runs the cr50 firmware and provides TPM functionality. Add support for it. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a1cbf7a375b6..5221f1d1b7dc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include =20 / { aliases { @@ -353,6 +354,13 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; =20 + cr50_int: cr50-irq-default-pins { + pins-gsc-ap-int-odl { + pinmux =3D ; + input-enable; + }; + }; + cros_ec_int: cros-ec-irq-default-pins { pins-ec-ap-int-odl { pinmux =3D ; @@ -517,6 +525,15 @@ &spi5 { mediatek,pad-select =3D <0>; pinctrl-names =3D "default"; pinctrl-0 =3D <&spi5_pins>; + + cr50@0 { + compatible =3D "google,cr50"; + reg =3D <0>; + interrupts-extended =3D <&pio 171 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency =3D <1000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cr50_int>; + }; }; =20 &uart0 { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BDFF5C4332F for ; Thu, 5 May 2022 19:47:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385357AbiEETuk (ORCPT ); Thu, 5 May 2022 15:50:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385374AbiEETub (ORCPT ); Thu, 5 May 2022 15:50:31 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 942565E74E; Thu, 5 May 2022 12:46:44 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id D308A1F45CD0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780003; bh=Dj7vGkYC2BwaxdlFtxv9aMWMtotDYi0t1OanA82gQVk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ob34YrajdxH8LFFr/Uzcr6LQXBusD66HfS6+XCkQgwF+9I7/dqzTSip4UumJ4ElDm 4gctg/6716y5yLvdh//RAFfzEe8J6t0Ncmt/4HFojagHFvLoK04+slvMT7QaTb2lKE qGQcN6oGcWHVmnXfQLuKrvPsz3uE/IUGlkqv4X1JErzfPjIv0qPZka/2oz0Myn9dlb M4QnLgRAtia18gCJqu6J3PJ5UTWtGu96zvoHzyKo0/Ac5R1zUEUOTC5LGC4yin5Q+c 3gij+MxiX93X0p3kLNn+a8K63GVV75bhsOXAPlctkv1Vx8K01hRGrRMeoPUA1SxjYx 8HbVB94qzSN7w== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 10/16] arm64: dts: mediatek: asurada: Add Elan eKTH3000 I2C trackpad Date: Thu, 5 May 2022 15:45:44 -0400 Message-Id: <20220505194550.3094656-11-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for the Elan eKTH3000 i2c trackpad present on Asurada. It is connected to the I2C2 bus and has address 0x15. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../boot/dts/mediatek/mt8192-asurada.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 5221f1d1b7dc..a15e84d86449 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -109,6 +109,16 @@ &i2c2 { clock-stretch-ns =3D <12600>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c2_pins>; + + trackpad@15 { + compatible =3D "elan,ekth3000"; + reg =3D <0x15>; + interrupts-extended =3D <&pio 15 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&trackpad_pins>; + vcc-supply =3D <&pp3300_u>; + wakeup-source; + }; }; =20 &i2c3 { @@ -440,6 +450,14 @@ pins-bus { bias-disable; }; }; + + trackpad_pins: trackpad-default-pins { + pins-int-n { + pinmux =3D ; + input-enable; + mediatek,pull-up-adv =3D <3>; + }; + }; }; =20 &spi1 { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82207C433EF for ; Thu, 5 May 2022 19:47:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385408AbiEETup (ORCPT ); Thu, 5 May 2022 15:50:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385358AbiEETub (ORCPT ); Thu, 5 May 2022 15:50:31 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6D8B15E774; Thu, 5 May 2022 12:46:47 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id E54C31F45CCE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780006; bh=1u4qe9l+DHtHmHsuoC7WXDiH41P3SfBlsVHP90O4+hc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iUsc7EfC2p097+dI8XIPo9JDk6gX753g0G1/Si2UqCm3ikI747zz/stCNIK6Dpmqz P6BHLqVWuG19pE3sJUTgoqX8NbHjh6yg8cu2tXKEukziIva+Y7BkG1LZWgBE3fMQ2t 502HkgGOGV8vDP51J/YRgaUXYprC9nR4i2QInYLc5wHX/9ZsgvUp+/Q5hMHNRriJ39 ash6cLkfw5OvlDY86v2jxVxND0LSPmI6gUmVLiLsrqMYFZEJwjTzvX6HLEYMyhuhpD JxgTlUZmDEgiBJjniQ50ztDlvHyTlGiu9bKeVSk5VDAaEHWyp5vUISWZUrMs1CA8Nz LZOtzseQwk5aw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 11/16] arm64: dts: mediatek: asurada: Add I2C touchscreen Date: Thu, 5 May 2022 15:45:45 -0400 Message-Id: <20220505194550.3094656-12-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org All machines of the Asurada platform have a touchscreen at address 0x10 in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500 touchscreen, while Hayato has a generic HID-over-i2c touchscreen. Add common support for the touchscreens on the platform and the specifics in each board file. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../dts/mediatek/mt8192-asurada-hayato-r1.dts | 7 ++++++ .../mediatek/mt8192-asurada-spherion-r0.dts | 4 +++ .../boot/dts/mediatek/mt8192-asurada.dtsi | 25 +++++++++++++++++++ 3 files changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts b/ar= ch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts index 00c76709a055..b62c747e9e54 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dts @@ -9,3 +9,10 @@ / { model =3D "Google Hayato rev1"; compatible =3D "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; }; + +&touchscreen { + compatible =3D "hid-over-i2c"; + post-power-on-delay-ms =3D <10>; + hid-descr-addr =3D <0x0001>; + vdd-supply =3D <&pp3300_u>; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index d384d584bbcf..35d9c5294fe0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -11,3 +11,7 @@ / { "google,spherion-rev1", "google,spherion-rev0", "google,spherion", "mediatek,mt8192"; }; + +&touchscreen { + compatible =3D "elan,ekth3500"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a15e84d86449..c852cb0e8b63 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -92,6 +92,13 @@ &i2c0 { clock-frequency =3D <400000>; pinctrl-names =3D "default"; pinctrl-0 =3D <&i2c0_pins>; + + touchscreen: touchscreen@10 { + reg =3D <0x10>; + interrupts-extended =3D <&pio 21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touchscreen_pins>; + }; }; =20 &i2c1 { @@ -458,6 +465,24 @@ pins-int-n { mediatek,pull-up-adv =3D <3>; }; }; + + touchscreen_pins: touchscreen-default-pins { + pins-irq { + pinmux =3D ; + input-enable; + bias-pull-up; + }; + + pins-reset { + pinmux =3D ; + output-high; + }; + + pins-report-sw { + pinmux =3D ; + output-low; + }; + }; }; =20 &spi1 { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 30B5DC433FE for ; Thu, 5 May 2022 19:47:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385498AbiEETu4 (ORCPT ); Thu, 5 May 2022 15:50:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35646 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385416AbiEETuf (ORCPT ); Thu, 5 May 2022 15:50:35 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DF545EBD1; Thu, 5 May 2022 12:46:50 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id AC83F1F45CD2 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780009; bh=8TvoEhGQU6t2qg9uM8iphoK/DuIcgX6ObTBGTPSxnTk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=XSsfXvMh/3UvAYBBO5gWbz63asC1SxSMIAZvqX3j4MDRYYwGfClwFV3ak8VXdWV18 bqv0Bh+GBInZgOfD2LHapuhjie9qOp1OdtpVe4r5OREjgzG7zvI1lK4ulqRe2u9/Oi BGB/xUNuCMopwMrJnmU27zEjybmvzVd0qfrgolUngTt7beTEIafEG19kQzBpz/Wym+ eBGunoEKPuB4GDZfZEdeI7Gpaa+dPb3d8J4WgKx4zEvvUrvNPfepXdEoaVvolV/bAt pk4eKgKw+iuLd2pDB9EOAIWEwz09nXqgR2icBMdLX3MoaH6MHYFwYK+OT93OnNZn03 kg6aDjWuS0D1Q== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 12/16] arm64: dts: mediatek: spherion: Add keyboard backlight Date: Thu, 5 May 2022 15:45:46 -0400 Message-Id: <20220505194550.3094656-13-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Spherion board has keyboard backlight controlled by the PWM signal generated by the ChromeOS EC. Enable PWM output for ChromeOS EC and add a PWM controlled LED node for the keyboard backlight. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- (no changes since v1) .../dts/mediatek/mt8192-asurada-spherion-r0.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts b/= arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts index 35d9c5294fe0..7f9cf7ee1437 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada-spherion-r0.dts @@ -4,12 +4,28 @@ */ /dts-v1/; #include "mt8192-asurada.dtsi" +#include =20 / { model =3D "Google Spherion (rev0 - 3)"; compatible =3D "google,spherion-rev3", "google,spherion-rev2", "google,spherion-rev1", "google,spherion-rev0", "google,spherion", "mediatek,mt8192"; + + pwmleds { + compatible =3D "pwm-leds"; + + led { + function =3D LED_FUNCTION_KBD_BACKLIGHT; + color =3D ; + pwms =3D <&cros_ec_pwm 0>; + max-brightness =3D <1023>; + }; + }; +}; + +&cros_ec_pwm { + status =3D "okay"; }; =20 &touchscreen { --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 845E5C433FE for ; Thu, 5 May 2022 19:47:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385451AbiEETvB (ORCPT ); Thu, 5 May 2022 15:51:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385443AbiEETug (ORCPT ); Thu, 5 May 2022 15:50:36 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C3AD5E748; Thu, 5 May 2022 12:46:53 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 9B9201F45CD6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780011; bh=m1JTt5Fhkh+wV/Wx5MQaFp1SHyGbtuJWnkpiKW7wYyk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Gag2AsnwQgh2vQVDAEVDp4CJ0Gg0ajkhD3r6zJ6ryZ0yKuIZg0659ICdeIjNunthQ IYhJNu0FB7Yetj0JqD0+lQtapqYLyC1MG88tvbbrvEdVVyPNKYs/Z3p2TFprrh2hAS qIzVyQ6I7NgSznVSvf0F3GDHxMW4pFgF6rgtbwhTua9kjdXIIHAnfxnW7DGSN/Ou4Z hZ2ILyVPMOihj/DUAZTGHFe0HL695bWtSxlVu3CTji/ksEs7i7haJHSeFdrkHEqBp2 oLDQtZxowi/i8TqBvVhRI7zJVnO6uZ+IZ5lfQJLA2Rai3e1afiilN+M9GlaJ9jqLMn IgUs2DYqCXetA== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 13/16] arm64: dts: mediatek: asurada: Enable XHCI Date: Thu, 5 May 2022 15:45:47 -0400 Message-Id: <20220505194550.3094656-14-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable XHCI controller on the Asurada platform. This allows the use of the USB ports, and therefore a rootfs can be loaded and a usable shell reached from a live USB image. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index c852cb0e8b63..4f9a9ec046b0 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -583,6 +583,14 @@ &uart0 { status =3D "okay"; }; =20 +&xhci { + status =3D "okay"; + + wakeup-source; + vusb33-supply =3D <&pp3300_g>; + vbus-supply =3D <&pp5000_a>; +}; + #include #include =20 --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B08FC433FE for ; Thu, 5 May 2022 19:47:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1379615AbiEETvK (ORCPT ); Thu, 5 May 2022 15:51:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238792AbiEETuk (ORCPT ); Thu, 5 May 2022 15:50:40 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0B6D15E75B; Thu, 5 May 2022 12:46:56 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 51B7B1F45CD4 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780014; bh=xzUy2wIyZXyHws5Sfef8bUOIhBVmWMeAQk76VcEPaRI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eOVPVi70rUmGojFG3yEu34VRcLCOrYmReCGhcDWvQJ2s4HSOPhs4Gj+1janAdE+w+ UyXPLWUsJhooEqMvJ1dzcg2vuUnJeIvGe5zXkG8yxz3Gi7jS6Waa7FWzlkVZpF3BPd 8SJ12uM12ezZyu7YLHdTKy7QPFNBl/stxL34IXZiJG6CNpcvugBCGEFShYe0iCCK0W AMISaWJ0IBoxLmhmE7mZtHtgVBUlB2aysdQXLpi7sHmiw6oFXet2pJr2SmPML89+8O +6DOPUKVQY/dO2aCqIug8a5AGYxnq44atGQlD8CCO/2voZJXbfUuqXbi/o2Gfoz64C 6xeQciBOFYGFw== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 14/16] arm64: dts: mediatek: asurada: Enable PCIe and add WiFi Date: Thu, 5 May 2022 15:45:48 -0400 Message-Id: <20220505194550.3094656-15-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 4f9a9ec046b0..87a9a6b1eabc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -66,6 +66,19 @@ pp3300_u: pp3300-u { vin-supply =3D <&pp3300_g>; }; =20 + pp3300_wlan: pp3300-wlan { + compatible =3D "regulator-fixed"; + regulator-name =3D "pp3300_wlan"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pp3300_wlan_pins>; + enable-active-high; + gpio =3D <&pio 143 GPIO_ACTIVE_HIGH>; + }; + /* system wide switching 5.0V power rail */ pp5000_a: pp5000-a { compatible =3D "regulator-fixed"; @@ -84,6 +97,17 @@ ppvar_sys: ppvar-sys { regulator-always-on; regulator-boot-on; }; + + reserved_memory: reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + wifi_restricted_dma_region: wifi@c0000000 { + compatible =3D "restricted-dma-pool"; + reg =3D <0 0xc0000000 0 0x4000000>; + }; + }; }; =20 &i2c0 { @@ -144,6 +168,28 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins>; + + pcie0: pcie@0,0 { + device_type =3D "pci"; + reg =3D <0x0000 0 0 0 0>; + num-lanes =3D <1>; + bus-range =3D <0x1 0x1>; + + #address-cells =3D <3>; + #size-cells =3D <2>; + ranges; + + wifi: wifi@0,0 { + reg =3D <0x10000 0 0 0 0x100000>, + <0x10000 0 0x100000 0 0x100000>; + memory-region =3D <&wifi_restricted_dma_region>; + }; + }; +}; + &pio { /* 220 lines */ gpio-line-names =3D "I2S_DP_LRCK", @@ -434,6 +480,34 @@ pins-bus { }; }; =20 + pcie_pins: pcie-default-pins { + pins-pcie-wake { + pinmux =3D ; + bias-pull-up; + }; + + pins-pcie-pereset { + pinmux =3D ; + }; + + pins-pcie-clkreq { + pinmux =3D ; + bias-pull-up; + }; + + pins-wifi-kill { + pinmux =3D ; /* WIFI_KILL_L */ + output-high; + }; + }; + + pp3300_wlan_pins: pp3300-wlan-pins { + pins-pcie-en-pp3300-wlan { + pinmux =3D ; + output-high; + }; + }; + spi1_pins: spi1-default-pins { pins-cs-mosi-clk { pinmux =3D , --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD9F8C433FE for ; Thu, 5 May 2022 19:47:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236603AbiEETvX (ORCPT ); Thu, 5 May 2022 15:51:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385457AbiEETul (ORCPT ); Thu, 5 May 2022 15:50:41 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50B6E5E74C; Thu, 5 May 2022 12:46:59 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 6824E1F45CD7 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780018; bh=66Gcdl/BCzrTY3JeghuLR7TheiL9yVTorpEjlpfyV/8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=clx1QUAk8PRxDtNJSmG0WHj2SvvJhV+eWQHT6V/uHzLDOmjgrAULRqO22jnVi4B7R KrVPYpgopgTt1EP8r9ITnc8O+J0zWoALXltUIlU1cL330dOvZXLUCCC5WvpS1GByNC ewX4Aw73EaPT9GEZizyuUoeVJNqZiHgp9asN6Ba70yDdGS2wfn0rFL+dZbBve2HE+u Q03Q774WnoLME1E14XLDNaz5PbAhH+9Pu2D9IYS1kJWeONUh3TkMdgiwdAsqNOcs+a llLphy1KdOCJ3XBNSMTNM9ajhJXzP+a/TX3NMush3nP/lmA/gxDydY6tACIvzxBENx vz2hB6Q0KBEeg== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 15/16] arm64: dts: mediatek: asurada: Add MT6359 PMIC Date: Thu, 5 May 2022 15:45:49 -0400 Message-Id: <20220505194550.3094656-16-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT6359 is the primary PMIC present on the Asurada platform. Include its dtsi and configure properties specific for the platform. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index 87a9a6b1eabc..a9ffa74b2764 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include "mt6359.dtsi" #include =20 / { @@ -168,6 +169,31 @@ &i2c7 { pinctrl-0 =3D <&i2c7_pins>; }; =20 +/* for CORE */ +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_sshub_buck_reg { + regulator-always-on; + regulator-min-microvolt =3D <575000>; + regulator-max-microvolt =3D <575000>; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +&mt6359_vufs_ldo_reg { + regulator-always-on; +}; + +&mt6359codec { + mediatek,dmic-mode =3D <1>; /* one-wire */ + mediatek,mic-type-0 =3D <2>; /* DMIC */ + mediatek,mic-type-2 =3D <2>; /* DMIC */ +}; + &pcie { pinctrl-names =3D "default"; pinctrl-0 =3D <&pcie_pins>; @@ -559,6 +585,10 @@ pins-report-sw { }; }; =20 +&pmic { + interrupts-extended =3D <&pio 214 IRQ_TYPE_LEVEL_HIGH>; +}; + &spi1 { status =3D "okay"; =20 --=20 2.36.0 From nobody Sun Sep 22 02:08:52 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 386E8C433EF for ; Thu, 5 May 2022 19:47:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1385437AbiEETv2 (ORCPT ); Thu, 5 May 2022 15:51:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1385368AbiEETun (ORCPT ); Thu, 5 May 2022 15:50:43 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A26D5DA7D; Thu, 5 May 2022 12:47:02 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id A6FE71F45CD3 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780021; bh=riKUyF3QA26FPC6IN4C9exUYKfoEiGvXUwpYMcRDj7M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IEVITc3sCSDV2yoTf1mQwuHfgdj8nF+d/X2n/ZXKi5YwM4pS/WjEOl1DDvuWwo0cX HRjoOZee/WLN0iYDbwq3L9ydeRrTcCQoKLpcx3sD6uXW+L9di4gL1P7yjES8JrRTZW /PIYVbLAV0WClG+LBhsMYiLY/8LzDaRruJ/whCVuUVJngCTA1WixTyslwdSff4daGY S1mjJ6Uv2yolUv3Wcyb5cKE92j4ate6tCwKPdN+rxgyrb2k6tY1s/Lt5JHd2DrTKJ1 F4I3r5vPy3rqobPCxOvXQ9V6zXFeE1WG9wn3UTDOOPczbAqri0k0AX1IX5CBw5MNrz 5qD5Q98uEZ7nQ== From: =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?UTF-8?q?N=C3=ADcolas=20F=2E=20R=2E=20A=2E=20Prado?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 16/16] arm64: dts: mediatek: asurada: Add SPMI regulators Date: Thu, 5 May 2022 15:45:50 -0400 Message-Id: <20220505194550.3094656-17-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Asurada platform uses regulators from MT6315 PMICs acessible through SPMI. Add support for them. Signed-off-by: N=C3=ADcolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Tested-by: Chen-Yu Tsai --- Changes in v2: - Added this patch .../boot/dts/mediatek/mt8192-asurada.dtsi | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/= boot/dts/mediatek/mt8192-asurada.dtsi index a9ffa74b2764..7f4cee928f71 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -7,6 +7,7 @@ #include "mt8192.dtsi" #include "mt6359.dtsi" #include +#include =20 / { aliases { @@ -683,6 +684,54 @@ cr50@0 { }; }; =20 +&spmi { + #address-cells =3D <2>; + #size-cells =3D <0>; + + mt6315_6: pmic@6 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x6 SPMI_USID>; + + regulators { + mt6315_6_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vbcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + + mt6315_6_vbuck3: vbuck3 { + regulator-compatible =3D "vbuck3"; + regulator-name =3D "Vlcpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + regulator-always-on; + }; + }; + }; + + mt6315_7: pmic@7 { + compatible =3D "mediatek,mt6315-regulator"; + reg =3D <0x7 SPMI_USID>; + + regulators { + mt6315_7_vbuck1: vbuck1 { + regulator-compatible =3D "vbuck1"; + regulator-name =3D "Vgpu"; + regulator-min-microvolt =3D <300000>; + regulator-max-microvolt =3D <1193750>; + regulator-enable-ramp-delay =3D <256>; + regulator-allowed-modes =3D <0 1 2>; + }; + }; + }; +}; + &uart0 { status =3D "okay"; }; --=20 2.36.0