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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:28 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 01/13] dt-bindings: soc: qcom: aoss: document qcom,sm8450-aoss-qmp Date: Wed, 4 May 2022 15:19:11 +0200 Message-Id: <20220504131923.214367-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatible for qcom,sm8450-aoss-qmp with qcom,aoss-qmp as a fallback. This fixes dtbs_check warnings like: sm8450-hdk.dtb: power-controller@c300000: compatible:0: 'qcom,sm8450-aoss= -qmp' is not one of ['qcom,sc7180-aoss-qmp', 'qcom,sc7280-aoss-qmp', 'qcom,sc8180x-aoss-qmp= ', 'qcom,sdm845-aoss-qmp', 'qcom,sm6350-aoss-qmp', 'qcom,sm8150-aoss-qmp', 'qcom,sm8250-aoss-qmp'= , 'qcom,sm8350-aoss-qmp'] Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml = b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index e2e173dfada7..d01e98768153 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -33,6 +33,7 @@ properties: - qcom,sm8150-aoss-qmp - qcom,sm8250-aoss-qmp - qcom,sm8350-aoss-qmp + - qcom,sm8450-aoss-qmp - const: qcom,aoss-qmp =20 reg: --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71954C433F5 for ; Wed, 4 May 2022 13:19:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350434AbiEDNXX (ORCPT ); Wed, 4 May 2022 09:23:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34004 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350285AbiEDNXI (ORCPT ); Wed, 4 May 2022 09:23:08 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A5FA192A4 for ; Wed, 4 May 2022 06:19:31 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id i19so2819452eja.11 for ; Wed, 04 May 2022 06:19:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cIxbMsIYOC41nyD069BUzktCiWAoIc1Hw5a409uln8M=; b=O6pIQLrnTXqGXjoUibcX5awF0VD5FEN531oxXY/6EUZ1VhVGdnwoZ1/LeOSvKx6tAN cmI/EGnXI/rSzAqODaIzfmd0pgvRQ2JB/hUH9D0O65GDm2WBsdNX45FmlJHRN5GpBvJA 2Hf6k0buqbzGPKkiqYpsWNz1JSy/1v4uMK3WWSDnPPWNwHfnB2hechyV0yGFf4FAzOqz ff0ueW6q42HCthGjFrT18uA2Brfuh24iC2xRufNYgHPf6LzEdPv+ziuNgE4GT6UAS8+c Pz0AyQhc2PQIrPir9ZyS48xmsH7NQmtytuwFBdUdU1tjkEcxRlEFZlr6nFuVpb0xkt0k jLaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cIxbMsIYOC41nyD069BUzktCiWAoIc1Hw5a409uln8M=; b=wyaVBNr5z/khkRNzg8DoAGBh8ZnWVvqBGxOG9uAl9NYl68yApOv/pUmyg8B5X2K9vm Fa0erGOEayMxjZi4FZ7x/bHitIQzYtfN6MaG0cKFnA3sKMIUSEu+iMbO7Xtw0K2OIzR+ glpo2Lg2YEjPGs0bRnphR5s3APXeO5omUusL4Q0jMpzWamkV2ZKEi+QjD226XkDGOhGg ElzKl2MBBOtKMoLy03vnTtbxxPwKmtmVf1nID4ZnfflHEImAIlaigep2VfiaOOBbpCdJ JggT9eMCqJ1N6WkwNxta7G9WRtTrUM5OPiFxR1LxVZR6rYhIU7eTWokP6TN8gJk8YaHt wr3A== X-Gm-Message-State: AOAM53274TgN6h1DjUH+rieKogaZKrKzqHOXLEygcsZ0dUDjIbF70bDW vVh6iXS7gHezAdWMfxuXnwa4/w== X-Google-Smtp-Source: ABdhPJyuS3YxpEL7hJnfn9pk/WUIYNUrf65URgEiaFNNqK23PLeYMn6slxsruSPDITumPuxYywifrg== X-Received: by 2002:a17:907:1c0d:b0:6f3:b742:ef56 with SMTP id nc13-20020a1709071c0d00b006f3b742ef56mr20212422ejc.504.1651670369760; Wed, 04 May 2022 06:19:29 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:29 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 02/13] dt-bindings: soc: qcom: qcom,smd-rpm: add power-controller Date: Wed, 4 May 2022 15:19:12 +0200 Message-Id: <20220504131923.214367-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Document power-controller child of Qualcomm RPM over SMD to fix dtbs_check warnings like: msm8916-huawei-g7.dtb: rpm-requests: 'power-controller' do not match any = of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml b= /Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml index f0f1bf06aea6..cc1b35080162 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,smd-rpm.yaml @@ -51,6 +51,9 @@ properties: $ref: /schemas/clock/qcom,rpmcc.yaml# unevaluatedProperties: false =20 + power-controller: + $ref: /schemas/power/qcom,rpmpd.yaml# + qcom,smd-channels: $ref: /schemas/types.yaml#/definitions/string-array description: Channel name used for the RPM communication --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81170C433EF for ; Wed, 4 May 2022 13:20:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350430AbiEDNXo (ORCPT ); Wed, 4 May 2022 09:23:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34012 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350390AbiEDNXJ (ORCPT ); Wed, 4 May 2022 09:23:09 -0400 Received: from mail-ej1-x635.google.com (mail-ej1-x635.google.com [IPv6:2a00:1450:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4B27C3B007 for ; Wed, 4 May 2022 06:19:32 -0700 (PDT) Received: by mail-ej1-x635.google.com with SMTP id dk23so2833561ejb.8 for ; Wed, 04 May 2022 06:19:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wtiS0vwUpWebphFXLVeTyRDTHsS+dMpyDeFB5sbVoPk=; b=WMcDqMBOQTWHQiHzKnK155CAcLbJFQiywJq2+OHBtLh2wtbdrvfmT+eVf/1qGi+8Gs VUocQGWrCexi0Npuo1PUCo1ievCEkGHVXhL79bjHLJ4Q9hp8ygEBznhKNqJbHdBeSAJ3 boomwuB+OytFwgC3kGjWxyI3QKAJtNGcf9hYk2JqJLRvDj6bUMBBNV0VdNmI0r4WL5yf dL6OmTB/xuss+0C9ohEnqyT9FwMIy1vdU0SDxKK7iCawXoOVTmrP78pzdiutyXdmJDay TZ36Wix0WF1YbdqnBg5mmYnCBlifObmjldYNTL1EqN7lBNlMl1JYnM74RKnwmTpLmuFC 56+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wtiS0vwUpWebphFXLVeTyRDTHsS+dMpyDeFB5sbVoPk=; b=ZJkdp5C+Sq8+CRiUC4V0mifYmBhGy8SAAWv0ISQx1yar44SNH+/kdLfYuXOmAexD1V 234Orw5N433PXLI+6MebWjEyeGdOXn75SNTXU0grnqM0S+MPmatcdgmqeYHC5NpzJlh4 M7V1IahAVPewgESXomoPXTmxusQY26TUYdnGcVuZETrppFYZxNeqq+lQGDW6z79WqFCX SDF7TkrMzqUw6NdPD7wAiuaKAjqrtgOhHhzIZHHceHBzmjZpKMoMNUMQiUM/BcUfU3Rm 3fYkvbfZ6wqekkZOLz5RSHHkhzOu/GGLatVkmPRyoSmTZz3kU1QwM9EvyW7UeS3NIC72 JTgg== X-Gm-Message-State: AOAM532E1hqeTIae4YuBJkUHPjZCXfPbD/mEEPg4ZN9snoA/WHdCjv7P PKPsodZT1LuT/hF5+TtXInHyig== X-Google-Smtp-Source: ABdhPJxpiNIp7y7Iq7FQeCbjSAWRjH6/GJCoUIDnG3RWGsD6Fl//cWVMX2EAziFaYhRTq1UePB4XLg== X-Received: by 2002:a17:906:9749:b0:6ef:bc52:1f94 with SMTP id o9-20020a170906974900b006efbc521f94mr19947138ejy.666.1651670370844; Wed, 04 May 2022 06:19:30 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:30 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 03/13] dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125 Date: Wed, 4 May 2022 15:19:13 +0200 Message-Id: <20220504131923.214367-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add compatibles for dedicated USB DWC3 blocks on Qualcomm IPQ8074, MSM8994, QCS404 and SM6125. They differ against other variants in clock and/or interrupts. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documen= tation/devicetree/bindings/usb/qcom,dwc3.yaml index ce252db2aab3..03f93f25cba4 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -16,9 +16,12 @@ properties: - qcom,ipq4019-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,qcs404-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sdm660-dwc3 @@ -26,6 +29,7 @@ properties: - qcom,sdx55-dwc3 - qcom,sm4250-dwc3 - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 - qcom,sm8150-dwc3 - qcom,sm8250-dwc3 --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 669A4C4321E for ; Wed, 4 May 2022 13:20:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350452AbiEDNXi (ORCPT ); Wed, 4 May 2022 09:23:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350392AbiEDNXJ (ORCPT ); Wed, 4 May 2022 09:23:09 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 729543BA5C for ; Wed, 4 May 2022 06:19:32 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id bv19so2838034ejb.6 for ; Wed, 04 May 2022 06:19:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=geJ1oCMfHvrwrPUcn2CBZQZQvkPEsJJFNL12XqUDXCM=; b=eXCGt2ajshLobHOIJRX+d5yT3wL9OfZmJInYcSe/ETxQ72pQJIFe62eQYgmFP1pPPJ kw8FYnmaF3rxOURKKA5S6VccS8E75IY1RlhJFP2oNZdXW1wP4RBFEHs6XilEinPW6vrj Isc5hh11tqC1fdg1dc0MFa+ynH1gH0R//ndqg72N390E1LRiLtRwgk/EeW3psHNxc7du SkwoD4sQ6Fgwv2wkNc6Xqd5moC3kSbCRMVEDmZWulqR+nCAAeae8kel9LtInwG32vPDE /TIRLmnOfb7bc9M1ARp0XWGsPNH7DB20OxcANoK8jqJVhvVM/a6UYme2PxNOZRjwWP0+ K3ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=geJ1oCMfHvrwrPUcn2CBZQZQvkPEsJJFNL12XqUDXCM=; b=V+xVNknTD6bPZPatJPsnnrmxhzNO51AP6s7oqszrieofllubXbklKA+ny5v6RVzUrY rFwG/SISeRw1h1wLVS4+FDX2t94I1YaWUNvkJW73IPydJFaQ8aCA588upAbmiEe6Cj/V DVvtx/41dOfVSnwnXMse83ADvNXPAp6oKdW5M72SwVkOMb3XFHjaRKeAkfMGXHc2ECf2 avdW/ztgkWR9X8zHaKohX3Ud+m8FSN3/pH2/ajjAfQCT3ZA1EDoow9TFrLX1oAeie5Sh VLgGOlrY8d64TYpJ7FhgUrnNgkrQEnzfJOX9SH7wyREXR8uSWnUKOLQPjtRqp53Ev3xw 2rYg== X-Gm-Message-State: AOAM531DEzTCHDjXzLTmNZBMoG3aSPB8eVe1oODXTwHaObjDNsprYCcj P6twBrHRHhnSgavuHazkFcK6wg== X-Google-Smtp-Source: ABdhPJyfY9xuMVGc8LsmWl5zLun+0BP87d5iqcnXk5tyahzJRG6mgYGf6XihuoXxleN8KGqlPLo2LA== X-Received: by 2002:a17:907:8a06:b0:6f4:922b:4b91 with SMTP id sc6-20020a1709078a0600b006f4922b4b91mr7152726ejc.670.1651670372039; Wed, 04 May 2022 06:19:32 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:31 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 04/13] dt-bindings: usb: qcom,dwc3: fix clock matching Date: Wed, 4 May 2022 15:19:14 +0200 Message-Id: <20220504131923.214367-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The bindings defined strict clocks but several variants do not use them in such order. Split the clocks and clock-names per variants to match current DTS usage. In few cases this might not be complete match, due to incomplete DTS. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 222 ++++++++++++++++-- 1 file changed, 200 insertions(+), 22 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documen= tation/devicetree/bindings/usb/qcom,dwc3.yaml index 03f93f25cba4..5047ca31657c 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -54,26 +54,22 @@ properties: maxItems: 1 =20 clocks: - description: - A list of phandle and clock-specifier pairs for the clocks - listed in clock-names. - items: - - description: System Config NOC clock. - - description: Master/Core clock, has to be >=3D 125 MHz - for SS operation and >=3D 60MHz for HS operation. - - description: System bus AXI clock. - - description: Mock utmi clock needed for ITP/SOF generation - in host mode. Its frequency should be 19.2MHz. - - description: Sleep clock, used for wakeup when - USB3 core goes into low power mode (U3). + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >=3D 125 MHz for SS operation= and >=3D + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 6 =20 clock-names: - items: - - const: cfg_noc - - const: core - - const: iface - - const: mock_utmi - - const: sleep + minItems: 1 + maxItems: 6 =20 assigned-clocks: items: @@ -136,6 +132,185 @@ required: - interrupts - interrupt-names =20 +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >=3D 125 MHz + for SS operation and >=3D 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: bus + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + additionalProperties: false =20 examples: @@ -157,10 +332,13 @@ examples: clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B416AC433EF for ; Wed, 4 May 2022 13:22:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350544AbiEDNXr (ORCPT ); Wed, 4 May 2022 09:23:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34082 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350402AbiEDNXL (ORCPT ); Wed, 4 May 2022 09:23:11 -0400 Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A2A093E0D8 for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:32 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 05/13] arm64: dts: qcom: add missing AOSS QMP compatible fallback Date: Wed, 4 May 2022 15:19:15 +0200 Message-Id: <20220504131923.214367-6-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The AOSS QMP bindings expect all compatibles to be followed by fallback "qcom,aoss-qmp" because all of these are actually compatible with each other. This fixes dtbs_check warnings like: sm8250-hdk.dtb: power-controller@c300000: compatible: ['qcom,sm8250-aoss-= qmp'] is too short Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8250.dtsi | 2 +- arch/arm64/boot/dts/qcom/sm8350.dtsi | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index 86175d257b1e..925340fbbb59 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3219,7 +3219,7 @@ aoss_reset: reset-controller@c2a0000 { }; =20 aoss_qmp: power-controller@c300000 { - compatible =3D "qcom,sc7180-aoss-qmp"; + compatible =3D "qcom,sc7180-aoss-qmp", "qcom,aoss-qmp"; reg =3D <0 0x0c300000 0 0x400>; interrupts =3D ; mboxes =3D <&apss_shared 0>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index ccf5e95071f9..e2857d3393ef 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3835,7 +3835,7 @@ aoss_reset: reset-controller@c2a0000 { }; =20 aoss_qmp: power-controller@c300000 { - compatible =3D "qcom,sc7280-aoss-qmp"; + compatible =3D "qcom,sc7280-aoss-qmp", "qcom,aoss-qmp"; reg =3D <0 0x0c300000 0 0x400>; interrupts-extended =3D <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 2700a8145cb9..90a4c09e67f1 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3710,7 +3710,7 @@ pdc: interrupt-controller@b220000 { }; =20 aoss_qmp: power-controller@c300000 { - compatible =3D "qcom,sm8150-aoss-qmp"; + compatible =3D "qcom,sm8150-aoss-qmp", "qcom,aoss-qmp"; reg =3D <0x0 0x0c300000 0x0 0x400>; interrupts =3D ; mboxes =3D <&apss_shared 0>; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index dc2562070336..881550cf7557 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -3726,7 +3726,7 @@ tsens1: thermal-sensor@c265000 { }; =20 aoss_qmp: power-controller@c300000 { - compatible =3D "qcom,sm8250-aoss-qmp"; + compatible =3D "qcom,sm8250-aoss-qmp", "qcom,aoss-qmp"; reg =3D <0 0x0c300000 0 0x400>; interrupts-extended =3D <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index c0137bdcf94b..e1eba30dc7ad 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -1718,7 +1718,7 @@ tsens1: thermal-sensor@c265000 { }; =20 aoss_qmp: power-controller@c300000 { - compatible =3D "qcom,sm8350-aoss-qmp"; + compatible =3D "qcom,sm8350-aoss-qmp", "qcom,aoss-qmp"; reg =3D <0 0x0c300000 0 0x400>; interrupts-extended =3D <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_= QMP IRQ_TYPE_EDGE_RISING>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 40C34C4332F for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:33 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 06/13] arm64: dts: qcom: correct DWC3 node names and unit addresses Date: Wed, 4 May 2022 15:19:16 +0200 Message-Id: <20220504131923.214367-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Align DWC3 USB node names with DT schema ("usb" is expected) and correct the unit addresses to match the "reg" property. This also implies overriding nodes by label, instead of full path. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/apq8096-db820c.dts | 18 ++++++++--------- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- .../boot/dts/qcom/msm8996-xiaomi-common.dtsi | 20 +++++++++---------- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 7 ++++--- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- 11 files changed, 37 insertions(+), 36 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts b/arch/arm64/boot/= dts/qcom/apq8096-db820c.dts index 56e54ce4d10e..49afbb1a066a 100644 --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dts +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dts @@ -1052,22 +1052,22 @@ &ufshc { &usb2 { status =3D "okay"; extcon =3D <&usb2_id>; +}; =20 - dwc3@7600000 { - extcon =3D <&usb2_id>; - dr_mode =3D "otg"; - maximum-speed =3D "high-speed"; - }; +&usb2_dwc3 { + extcon =3D <&usb2_id>; + dr_mode =3D "otg"; + maximum-speed =3D "high-speed"; }; =20 &usb3 { status =3D "okay"; extcon =3D <&usb3_id>; +}; =20 - dwc3@6a00000 { - extcon =3D <&usb3_id>; - dr_mode =3D "otg"; - }; +&usb3_dwc3 { + extcon =3D <&usb3_id>; + dr_mode =3D "otg"; }; =20 &usb3phy { diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qc= om/ipq6018.dtsi index a4d363c187fc..835de9834833 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -653,7 +653,7 @@ qusb_phy_1: qusb@59000 { status =3D "disabled"; }; =20 - usb2: usb2@7000000 { + usb2: usb@70f8800 { compatible =3D "qcom,ipq6018-dwc3", "qcom,dwc3"; reg =3D <0x0 0x070F8800 0x0 0x400>; #address-cells =3D <2>; @@ -730,7 +730,7 @@ qusb_phy_0: qusb@79000 { status =3D "disabled"; }; =20 - usb3: usb3@8A00000 { + usb3: usb@8af8800 { compatible =3D "qcom,ipq6018-dwc3", "qcom,dwc3"; reg =3D <0x0 0x8AF8800 0x0 0x400>; #address-cells =3D <2>; @@ -756,7 +756,7 @@ usb3: usb3@8A00000 { resets =3D <&gcc GCC_USB0_BCR>; status =3D "disabled"; =20 - dwc_0: usb@8A00000 { + dwc_0: usb@8a00000 { compatible =3D "snps,dwc3"; reg =3D <0x0 0x8A00000 0x0 0xcd00>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qc= om/ipq8074.dtsi index 943243d5515b..519938530c35 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -578,7 +578,7 @@ usb_0: usb@8af8800 { resets =3D <&gcc GCC_USB0_BCR>; status =3D "disabled"; =20 - dwc_0: dwc3@8a00000 { + dwc_0: usb@8a00000 { compatible =3D "snps,dwc3"; reg =3D <0x8a00000 0xcd00>; interrupts =3D ; @@ -618,7 +618,7 @@ usb_1: usb@8cf8800 { resets =3D <&gcc GCC_USB1_BCR>; status =3D "disabled"; =20 - dwc_1: dwc3@8c00000 { + dwc_1: usb@8c00000 { compatible =3D "snps,dwc3"; reg =3D <0x8c00000 0xcd00>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi b/arch/arm= 64/boot/dts/qcom/msm8996-xiaomi-common.dtsi index be4f643b1fd1..a7090befc16f 100644 --- a/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi @@ -308,19 +308,19 @@ &usb3 { extcon =3D <&typec>; =20 qcom,select-utmi-as-pipe-clk; +}; =20 - dwc3@6a00000 { - extcon =3D <&typec>; +&usb3_dwc3 { + extcon =3D <&typec>; =20 - /* usb3-phy is not used on this device */ - phys =3D <&hsusb_phy1>; - phy-names =3D "usb2-phy"; + /* usb3-phy is not used on this device */ + phys =3D <&hsusb_phy1>; + phy-names =3D "usb2-phy"; =20 - maximum-speed =3D "high-speed"; - snps,is-utmi-l1-suspend; - snps,usb2-gadget-lpm-disable; - snps,hird-threshold =3D /bits/ 8 <0>; - }; + maximum-speed =3D "high-speed"; + snps,is-utmi-l1-suspend; + snps,usb2-gadget-lpm-disable; + snps,hird-threshold =3D /bits/ 8 <0>; }; =20 &hsusb_phy1 { diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc= om/msm8996.dtsi index 205af7b479a8..fc2e026d4c07 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2731,7 +2731,7 @@ usb3: usb@6af8800 { power-domains =3D <&gcc USB30_GDSC>; status =3D "disabled"; =20 - usb3_dwc3: dwc3@6a00000 { + usb3_dwc3: usb@6a00000 { compatible =3D "snps,dwc3"; reg =3D <0x06a00000 0xcc00>; interrupts =3D <0 131 IRQ_TYPE_LEVEL_HIGH>; @@ -3059,7 +3059,7 @@ usb2: usb@76f8800 { qcom,select-utmi-as-pipe-clk; status =3D "disabled"; =20 - dwc3@7600000 { + usb2_dwc3: usb@7600000 { compatible =3D "snps,dwc3"; reg =3D <0x07600000 0xcc00>; interrupts =3D <0 138 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qc= om/msm8998.dtsi index 4a84de6cee1e..0200d532b531 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2040,7 +2040,7 @@ usb3: usb@a8f8800 { =20 resets =3D <&gcc GCC_USB_30_BCR>; =20 - usb3_dwc3: dwc3@a800000 { + usb3_dwc3: usb@a800000 { compatible =3D "snps,dwc3"; reg =3D <0x0a800000 0xcd00>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts= /qcom/qcs404-evb.dtsi index a80c578484ba..2f3104a84417 100644 --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi @@ -337,9 +337,10 @@ &usb2_phy_sec { &usb3 { status =3D "okay"; =20 - dwc3@7580000 { - dr_mode =3D "host"; - }; +}; + +&usb3_dwc3 { + dr_mode =3D "host"; }; =20 &usb2_phy_prim { diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qco= m/qcs404.dtsi index bc446c6002d0..568821259f11 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -544,7 +544,7 @@ usb3: usb@7678800 { assigned-clock-rates =3D <19200000>, <200000000>; status =3D "disabled"; =20 - dwc3@7580000 { + usb3_dwc3: usb@7580000 { compatible =3D "snps,dwc3"; reg =3D <0x07580000 0xcd00>; interrupts =3D ; @@ -573,7 +573,7 @@ usb2: usb@79b8800 { assigned-clock-rates =3D <19200000>, <133333333>; status =3D "disabled"; =20 - dwc3@78c0000 { + usb@78c0000 { compatible =3D "snps,dwc3"; reg =3D <0x078c0000 0xcc00>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index 925340fbbb59..e9f834361660 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2786,7 +2786,7 @@ usb_1: usb@a6f8800 { <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>; interconnect-names =3D "usb-ddr", "apps-usb"; =20 - usb_1_dwc3: dwc3@a600000 { + usb_1_dwc3: usb@a600000 { compatible =3D "snps,dwc3"; reg =3D <0 0x0a600000 0 0xe000>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 692cf4be4eef..6af80a627c3a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3868,7 +3868,7 @@ usb_1: usb@a6f8800 { <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; interconnect-names =3D "usb-ddr", "apps-usb"; =20 - usb_1_dwc3: dwc3@a600000 { + usb_1_dwc3: usb@a600000 { compatible =3D "snps,dwc3"; reg =3D <0 0x0a600000 0 0xcd00>; interrupts =3D ; @@ -3916,7 +3916,7 @@ usb_2: usb@a8f8800 { <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; interconnect-names =3D "usb-ddr", "apps-usb"; =20 - usb_2_dwc3: dwc3@a800000 { + usb_2_dwc3: usb@a800000 { compatible =3D "snps,dwc3"; reg =3D <0 0x0a800000 0 0xcd00>; interrupts =3D ; diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index 90a4c09e67f1..a57a13486c6c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3635,7 +3635,7 @@ usb_1: usb@a6f8800 { =20 resets =3D <&gcc GCC_USB30_PRIM_BCR>; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:35 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 07/13] arm64: dts: qcom: ipq8074: add dedicated qcom,ipq8074-dwc3 compatible Date: Wed, 4 May 2022 15:19:17 +0200 Message-Id: <20220504131923.214367-8-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qc= om/ipq8074.dtsi index 519938530c35..253fde08db44 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -553,7 +553,7 @@ qpic_nand: nand@79b0000 { }; =20 usb_0: usb@8af8800 { - compatible =3D "qcom,dwc3"; + compatible =3D "qcom,ipq8074-dwc3", "qcom,dwc3"; reg =3D <0x08af8800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; @@ -593,7 +593,7 @@ dwc_0: usb@8a00000 { }; =20 usb_1: usb@8cf8800 { - compatible =3D "qcom,dwc3"; + compatible =3D "qcom,ipq8074-dwc3", "qcom,dwc3"; reg =3D <0x08cf8800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98448C433F5 for ; Wed, 4 May 2022 13:22:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348685AbiEDNZw (ORCPT ); Wed, 4 May 2022 09:25:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350499AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EF1440929 for ; Wed, 4 May 2022 06:19:38 -0700 (PDT) Received: by mail-ej1-x634.google.com with SMTP id g6so2871988ejw.1 for ; Wed, 04 May 2022 06:19:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2xS+3Wq/qARvDYZ495/QJzgQMFIcqN5BlqQIo6Nwqu0=; b=Xv2tW6s0n6YZ8iVchnpOyt+jsm7rAsv5nm12e8wVrOiE76NhrNAykn3GsR+abcbwee j8q1fdVKvAY03NUuxp3OouylVW/2muBkZMDCPMGZMNBSnRkUkXvxZq01/FT2nlfK5ZgQ DljrEqSK8KnUd3yks7KZVG9X8A2UYSxpXHXKnDse/VVJD3sfm1MoACL3Ke1vNBVgbLaE 3XPpEgWSTEyZ84IZQoBtueEtnp5lEvIm9f0fI5O4xPlXQCBYiHa3YWlnE1nrKmbCrmI5 XVrmklD0pJ9OAWtBvq/rbaDP2M+xie/SA3yWzeGi1VOokfWA7bphD+dUi5u1sEcudgiw 4SfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2xS+3Wq/qARvDYZ495/QJzgQMFIcqN5BlqQIo6Nwqu0=; b=Wgj87oVZDuUVvTtynLb41zkGCtV44U/TsaVtjnzDP666K2jcWYNyrWqGzoFmWNqHaf f0pROUVnGRATIaurLo8Y7dvV8ySAbq0dtZpjAgPmDVVnMIiBkcj6QaEJybVY6BarZDnd ds07WrUvDBY5ItI/eaPANScQcf7iFt4Pp8PPMVQbyVp3Y5QKMUherWZjpxN+0dHgurX/ P95y4ghClovvEHUoOzhE+yxNL5Vtzw+tgc+oVPIo8EQXliri+b5bC4h5ruc+tujW+rYx op5qSon+fZoU68rIxfqLohfMXJJ9Gb4R3QJQcW/6L2r86J9tWB7CskrdV/40biR2nVIj e/Pg== X-Gm-Message-State: AOAM533pFaQFs9LHscejlekBkDnyAZDpNYjchdyblV58c4Lxpze46owC jFbzAkw3X74dkWIKMg5Ktb1N4Q== X-Google-Smtp-Source: ABdhPJw5+CyL4NjX2j/bsZp3+/uT3m87qFXb6CjbQGBrCcBokpRX6U0WSVDj7IdHjP2m5JHP+hYmNA== X-Received: by 2002:a17:907:1b28:b0:6f0:836:89b0 with SMTP id mp40-20020a1709071b2800b006f0083689b0mr19282474ejc.379.1651670376494; Wed, 04 May 2022 06:19:36 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:36 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 08/13] arm64: dts: qcom: msm8994: add dedicated qcom,msm8994-dwc3 compatible Date: Wed, 4 May 2022 15:19:18 +0200 Message-Id: <20220504131923.214367-9-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qc= om/msm8994.dtsi index 367ed913902c..10c1cce74dad 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -428,7 +428,7 @@ frame@f9028000 { }; =20 usb3: usb@f92f8800 { - compatible =3D "qcom,msm8996-dwc3", "qcom,dwc3"; + compatible =3D "qcom,msm8994-dwc3", "qcom,dwc3"; reg =3D <0xf92f8800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C4F5C433F5 for ; Wed, 4 May 2022 13:22:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350481AbiEDNZn (ORCPT ); Wed, 4 May 2022 09:25:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34516 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350486AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EEAC1AF12 for ; Wed, 4 May 2022 06:19:38 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id n10so2840748ejk.5 for ; Wed, 04 May 2022 06:19:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0LP0boZM960tMKw61ptITfkUb9H0O0vIQhKa4zQvzjA=; b=w4cyYNikfx+UmgSVEYJzPHrYaFIQ8UoeyCgqKpZqtkQQF721o37eqZTwgGepliwWHt wTPgTZSBH0hvlEsdfzTw+z/O4TAlfJuRt5VaVPpMMCI6vWEQuMWVZ3SfvpKA2QWl3eaP mNsS0HUuQQ5nU8yCWVlirenVEdBjP3sWDUSVQOrYUVBxb1cQ9pNnVkGwK+nAfax4vNo/ nR5nzIJOAXY53+1gsPp7o6r03uJI8YK/SVjdAViilHgChP6O/oMvoTg2ScDhRxrY68xv 8M2Ku6bHGlxsblC5vVqdUqROE/R6V/o0cvBmwr3nAs1geAdyFzXU5SxZijIETZJYGJmT YKfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0LP0boZM960tMKw61ptITfkUb9H0O0vIQhKa4zQvzjA=; b=LP8QpGR+Ps47st+OEULoaUIC5MDs5KfR0xjFmrPs+sbdv7pfzLKkXqJ4ALz7JDLiy7 SZo+sTlNE7XMG0me2jMGEXhZXr7M85GGsb3JL/Dod51N+Q/spUdPz8+sAHAtX6qFspSL uEvKVy8msWaBmCh5DtxFqFWddu3xKHwlzgFjGSF2ZbfRYXQ5hnsxDvhy3R9HpHG4yFpL x1MF0t2yUQ231/OzVzyl+5F+xF6Ldp6Xre8hea9yN6TZGhzCah5DOcL2Ys+7v+h4fyJ2 HBXIJd6MqWunIS9Nb0TftUwpFWtVTJxb7kObtV+/fAMPOLJ671jDwmV+SXzk1T+DIDa8 yEOw== X-Gm-Message-State: AOAM532tJ9B3KeA+ivlQjQNQvpLqLdx9AN7ULFWNvl5bSP20eUYB8aCV b8phz9JZN2d4NaJYF2VrHECFRw== X-Google-Smtp-Source: ABdhPJw+EEGLGalZ/eEwWqsNp7BUw8GjNWPpmOoHcPJ1kmrbxMj4PJ4PTT5WNehpyVr4w4SLufDq0g== X-Received: by 2002:a17:907:7216:b0:6f4:70d4:a3c4 with SMTP id dr22-20020a170907721600b006f470d4a3c4mr10253408ejc.529.1651670377591; Wed, 04 May 2022 06:19:37 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:37 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 09/13] arm64: dts: qcom: sm6125: add dedicated qcom,sm6125-dwc3 compatible Date: Wed, 4 May 2022 15:19:19 +0200 Message-Id: <20220504131923.214367-10-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qco= m/sm6125.dtsi index e81b2a7794fb..50def880bc87 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -481,7 +481,7 @@ sdhc_2: sdhci@4784000 { }; =20 usb3: usb@4ef8800 { - compatible =3D "qcom,msm8996-dwc3", "qcom,dwc3"; + compatible =3D "qcom,sm6125-dwc3", "qcom,dwc3"; reg =3D <0x04ef8800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D9ACC43219 for ; Wed, 4 May 2022 13:20:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346678AbiEDNY2 (ORCPT ); Wed, 4 May 2022 09:24:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34880 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350512AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3385940A2C for ; Wed, 4 May 2022 06:19:39 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id z2so1267656ejj.3 for ; Wed, 04 May 2022 06:19:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EHKSy8u2AYcSiYwpKMBhG78dGQ0CWmrQswGZWwNmBSE=; b=AII7DZs1qL3ytQ0tKTDDsyRtxKmN7Vo5x4CZZkN5bfopoIpwxt4ZBX8ZdS8qicRwr5 dl38rxdZ2WrTVq2Fn32nD7DNHY1pz+0yzJ0lADSWpQQJk+T0R/XgIDyASA6pNhx4FtRN 56bMwDlYZf8YkIzocvlX5A14yQX3kYHlMI7zJGpgzx4RU7IJX8UfOnfZjNMwKlolphMz ikLzjP8utgr8hR6rkDXick46xNEXnvNLrkE2p6lCeldmp45ahO7+5VLu1UvMckqQpMeh GmyLPKZ4ST+aaM8t4uBYc6KMkJZrorPI5QTCIsg6P1RhMkv7TR06OTlN++DuKr+b3siK RhoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EHKSy8u2AYcSiYwpKMBhG78dGQ0CWmrQswGZWwNmBSE=; b=0ptpZ+ZIaTIp5nyuXp4tAVuVtVKTvRD889DrCoV9qW/53dAGzyZw0AGzjADxmDaCGM zfJD6z/S/sXGazlzrvaTTlaQLf7G1ZppO9LVoflpwjmWUExLhKJbiAP897l4HOKZ4bPC 4WfllIwC683V46YLz7BauZBQa8PoK2rTvtTXtnD8boQQSn2ZmeglTFdHT3CBaDGNj45U NuzcV5U2nYV6w9xFgm8tFrM1R7DEfpWbaPfoD+rM9eaboNzA7nTxnIli3n5wspJgfcUi Xk7AO5DARi8WVc95BnYLLJ14EgWVmA5BX+Kd4UgdcpEaFNbcTCZ5di6aLnsQuB7et9+W fC8A== X-Gm-Message-State: AOAM532gRx88xtL0vCGL6KVg6tUDVPmxARJzDytMbd/r0TLHwW+mRboE f0ef5N7ZEjWDOWGlqpO3GmOfbA== X-Google-Smtp-Source: ABdhPJwpnIZFtYA5xNncFRACp4CyShNQZR9ctDuVvi8Lr3eLD0PfhzP7p/JpHNg8QjkqPiUTvEwUhQ== X-Received: by 2002:a17:907:7b92:b0:6db:71f1:fc20 with SMTP id ne18-20020a1709077b9200b006db71f1fc20mr19139977ejc.343.1651670378673; Wed, 04 May 2022 06:19:38 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:38 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 10/13] arm64: dts: qcom: qcs404: add dedicated qcom,qcs404-dwc3 compatible Date: Wed, 4 May 2022 15:19:20 +0200 Message-Id: <20220504131923.214367-11-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add dedicated compatible for DWC3 USB node name to allow more accurate DT schema matching. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qco= m/qcs404.dtsi index 568821259f11..d912166b7552 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -529,7 +529,7 @@ glink-edge { }; =20 usb3: usb@7678800 { - compatible =3D "qcom,dwc3"; + compatible =3D "qcom,qcs404-dwc3", "qcom,dwc3"; reg =3D <0x07678800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; @@ -558,7 +558,7 @@ usb3_dwc3: usb@7580000 { }; =20 usb2: usb@79b8800 { - compatible =3D "qcom,dwc3"; + compatible =3D "qcom,qcs404-dwc3", "qcom,dwc3"; reg =3D <0x079b8800 0x400>; #address-cells =3D <1>; #size-cells =3D <1>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C15FC4332F for ; Wed, 4 May 2022 13:20:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350731AbiEDNYY (ORCPT ); Wed, 4 May 2022 09:24:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350513AbiEDNXg (ORCPT ); Wed, 4 May 2022 09:23:36 -0400 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 59B5640E50 for ; Wed, 4 May 2022 06:19:41 -0700 (PDT) Received: by mail-ed1-x529.google.com with SMTP id t5so1654271edw.11 for ; Wed, 04 May 2022 06:19:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ADNyDG2DBGoI4aNwBUTKAtbwSm7KSpl3k1qLdQ+eNVc=; b=jWzS0esi1guJympagVAcA3QTh3pWmFIg059YzKQUR43O1SsyuAePGn1+b179PJujHl /XO4EoffzIkbOtmFoXliLccdVP0GlgC6lSYieM9AMLcGFkBaq9vW7qNq39lUKFgxWM94 GvAHZgvyT7N/eDJpbbM1oEnaF/+GBRDy9MgWx2iOzkf24u6oh9o18VYgNeSSjEl2PGam Dx5khFSWL5HHKbSVFbdPpDNSmeHON7JFCeOHFIeS2S1bjZkiqGst+ysnyLCOy0nGNqNj XotVUY5gJigxDEgGhHKGSY0e7aY/3+SYMsBJkclQNygDnW1klMdpaH31KUZNx5qVBBzM +yvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ADNyDG2DBGoI4aNwBUTKAtbwSm7KSpl3k1qLdQ+eNVc=; b=dqG3pNeBeRuKhPPUTHLW1j6gkbg17LP72BWm9dFypA/shJeH/lf2IHoZB28ZDrgGbL FzVRt6K8yJkMom2WE3zzKQPFSMUaamX2vhO0eEYAI1Vy1uTW585R7tK5UpVDmQwe4iek AktwwrGXxpMiAWgn/lFKUAq4rJMH6pIYFKoVzZCGbH9pGtlNe7OgqaqY5phNiXjzqm1U RuvBBpzRUGOtlJQ3THp3+xYElPu/gZRSx6g9BVLSFINI5jqGxrOvr3m89vMhUTGaoIxA 2ZjWDfs19n2HGQ4IhLY0eRH3xexzBmGnIsDxgAokB7wmxm949GD4kRDsNQvw8MoIn96+ Cgxg== X-Gm-Message-State: AOAM532CqazDSxotG92cjuV5qPeTDVCYh77cJ/rLmsaRaWFly6kGjK3O ai0NFDkDyf0lXD92K6rw+5VTYA== X-Google-Smtp-Source: ABdhPJzi0UFBk+U8jgTCaeO7i9cpBHQDLvfub0EZ5Bf6vo5Ltzx5N8wg/f9zEiZuAimbgXJnuku/eg== X-Received: by 2002:aa7:cd0a:0:b0:425:bc13:4ccb with SMTP id b10-20020aa7cd0a000000b00425bc134ccbmr22949498edw.229.1651670379824; Wed, 04 May 2022 06:19:39 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:39 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 11/13] arm64: dts: qcom: msm8996: add clock-names to DWC3 USB node Date: Wed, 4 May 2022 15:19:21 +0200 Message-Id: <20220504131923.214367-12-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The clock-names is a required property of DWC3 USB node. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc= om/msm8996.dtsi index fc2e026d4c07..b717c01d87e8 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -3050,6 +3050,11 @@ usb2: usb@76f8800 { <&gcc GCC_USB20_MOCK_UTMI_CLK>, <&gcc GCC_USB20_SLEEP_CLK>, <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB20_MOCK_UTMI_CLK>, <&gcc GCC_USB20_MASTER_CLK>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E39AEC433F5 for ; Wed, 4 May 2022 13:21:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350740AbiEDNYn (ORCPT ); Wed, 4 May 2022 09:24:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348396AbiEDNXi (ORCPT ); Wed, 4 May 2022 09:23:38 -0400 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6002D40E53 for ; Wed, 4 May 2022 06:19:41 -0700 (PDT) Received: by mail-ej1-x62b.google.com with SMTP id j6so2806425ejc.13 for ; Wed, 04 May 2022 06:19:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PtRXlZ6cLHKAcMNy9RZzniYXCerLrLi7gRFRODKYeuA=; b=h0cUVB+2J6EsRUSAXbsvlZuCkuOVTrnIIjx59jxQC4m5XPywkDcVaRvJ1AwCxc844H mOZVxSPwiq6xFpP6cAezHduw9kPbPiwkmnOQ0Ed7SkctRf9T/Ra4KoC0hg6T2TBUpiGe RtuDtXLg/hELtmUp0G0stcdgv7wokCLVRUqcbDvnABtUblZCiSR3tIaVtrfJxRYrzWDz D6W5KhcmCBc0erBTZ8Kp+QORfVWNkh+aME4X/WGL9JTAdYCj4V79FsLOvOSrm1GUTYZE 475MO7zXv7tLq84eZs6YW+cfVK2LSn9XQR3KX0JG7DdE7MErotJF+K2zM/rwjZG+842S 5s7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PtRXlZ6cLHKAcMNy9RZzniYXCerLrLi7gRFRODKYeuA=; b=sVB8uhXMSUaJxjMiCrJC1ZkgLBARcYx86LJUL4IPBftlhOIUfWo4G7Lbp3/mCUDbbu N65suIOf9zDULO0FZPWFwmHsRySOZzLCXyF6eeL46jhda0gup+vIk33wo1u6q/pfMJFJ /IemTwxsiuh9Ug36EWz+9g52Eu/WiPsHzAqymZMirUDdZkL3BQMmCGga3NemNTajhBBw +LBP2s1DqvOHrwCJp/bd52x0Q2DbQqv8SOtpvXqvox3QItTSR2jUKe5OrYzWQx/BWYXJ LB+9lnDzQO4KXN8hXKAbvVZ8FbGXG+996VHSyrzIDcma3Yu6bWAAFSADCGHQvfELv4mj 7Grw== X-Gm-Message-State: AOAM532PFos4KO7YD27sqD2RwZaT042wIbZkoUDdjX3WSfaf2vw8zmdn 9mqYmSmdps/PBIUAuRWh+NMNdA== X-Google-Smtp-Source: ABdhPJyQDf58gvAOiIvCu1q0/QJwYa1lbyJA7AR6+c/S6wUKcF13UysUQFWbRgiJQ6paalLOpLihzA== X-Received: by 2002:a17:907:8a0b:b0:6f4:4899:db98 with SMTP id sc11-20020a1709078a0b00b006f44899db98mr14039008ejc.622.1651670380906; Wed, 04 May 2022 06:19:40 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:40 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 12/13] arm64: dts: qcom: align DWC3 USB clocks with DT schema Date: Wed, 4 May 2022 15:19:22 +0200 Message-Id: <20220504131923.214367-13-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Align order of clocks and their names with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm/boot/dts/qcom-sdx55.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/ipq6018.dtsi | 6 +++--- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++---- arch/arm64/boot/dts/qcom/msm8953.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/msm8994.dtsi | 5 ++++- arch/arm64/boot/dts/qcom/msm8996.dtsi | 14 +++++++++----- arch/arm64/boot/dts/qcom/msm8998.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sc7180.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sc7280.dtsi | 22 ++++++++++++++-------- arch/arm64/boot/dts/qcom/sdm630.dtsi | 12 ++++++++---- arch/arm64/boot/dts/qcom/sdm845.dtsi | 22 ++++++++++++++-------- arch/arm64/boot/dts/qcom/sm6125.dtsi | 14 ++++++++++---- arch/arm64/boot/dts/qcom/sm6350.dtsi | 11 +++++++---- arch/arm64/boot/dts/qcom/sm8150.dtsi | 20 ++++++++++++++------ arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++------ arch/arm64/boot/dts/qcom/sm8350.dtsi | 21 ++++++++++++++------- arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 +++++++--- 18 files changed, 151 insertions(+), 80 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-i= pq4019.dtsi index 9d5e934f2272..c5da723f7674 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -646,7 +646,7 @@ usb3: usb3@8af8800 { clocks =3D <&gcc GCC_USB3_MASTER_CLK>, <&gcc GCC_USB3_SLEEP_CLK>, <&gcc GCC_USB3_MOCK_UTMI_CLK>; - clock-names =3D "master", "sleep", "mock_utmi"; + clock-names =3D "core", "sleep", "mock_utmi"; ranges; status =3D "disabled"; =20 diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx= 55.dtsi index 4d45be049613..089033299fa2 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -490,10 +490,13 @@ usb: usb@a6f8800 { clocks =3D <&gcc GCC_USB30_SLV_AHB_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_USB30_MSTR_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qc= om/ipq6018.dtsi index 835de9834833..c89499e366d3 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -662,7 +662,7 @@ usb2: usb@70f8800 { clocks =3D <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names =3D "master", + clock-names =3D "core", "sleep", "mock_utmi"; =20 @@ -741,8 +741,8 @@ usb3: usb@8af8800 { <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "sys_noc_axi", - "master", + clock-names =3D "cfg_noc", + "core", "sleep", "mock_utmi"; =20 diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qc= om/ipq8074.dtsi index 253fde08db44..4c38b15c6fd4 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -563,8 +563,8 @@ usb_0: usb@8af8800 { <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, <&gcc GCC_USB0_MOCK_UTMI_CLK>; - clock-names =3D "sys_noc_axi", - "master", + clock-names =3D "cfg_noc", + "core", "sleep", "mock_utmi"; =20 @@ -603,8 +603,8 @@ usb_1: usb@8cf8800 { <&gcc GCC_USB1_MASTER_CLK>, <&gcc GCC_USB1_SLEEP_CLK>, <&gcc GCC_USB1_MOCK_UTMI_CLK>; - clock-names =3D "sys_noc_axi", - "master", + clock-names =3D "cfg_noc", + "core", "sleep", "mock_utmi"; =20 diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index 49903a6e9dfd..ffc3ec2cd3bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -759,10 +759,13 @@ usb3: usb@70f8800 { clocks =3D <&gcc GCC_USB_PHY_CFG_AHB_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_PCNOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", - "mock_utmi", "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qc= om/msm8994.dtsi index 10c1cce74dad..0318d42c5736 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -438,7 +438,10 @@ usb3: usb@f92f8800 { <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_SLEEP_CLK>, <&gcc GCC_USB30_MOCK_UTMI_CLK>; - clock-names =3D "core", "iface", "sleep", "mock_utmi", "ref", "xo"; + clock-names =3D "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qc= om/msm8996.dtsi index b717c01d87e8..9932186f7ceb 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2718,11 +2718,15 @@ usb3: usb@6af8800 { interrupt-names =3D "hs_phy_irq", "ss_phy_irq"; =20 clocks =3D <&gcc GCC_SYS_NOC_USB3_AXI_CLK>, - <&gcc GCC_USB30_MASTER_CLK>, - <&gcc GCC_AGGRE2_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>, - <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; + <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_AGGRE2_USB3_AXI_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qc= om/msm8998.dtsi index 0200d532b531..758c45bbbe78 100644 --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi @@ -2023,10 +2023,13 @@ usb3: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_AGGRE1_USB3_AXI_CLK>, - <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qco= m/sc7180.dtsi index e9f834361660..bedb4991cc5c 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -2762,10 +2762,13 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index e2857d3393ef..5d51b6ce45ef 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3069,10 +3069,13 @@ usb_2: usb@8cf8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SEC_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface","mock_utmi", - "sleep"; + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; @@ -3249,10 +3252,13 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qco= m/sdm630.dtsi index 7f875bf9390a..b72e8e6c52f3 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1215,11 +1215,15 @@ usb3: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_AXI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, <&gcc GCC_AGGRE2_USB3_AXI_CLK>, - <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, <&gcc GCC_USB30_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "bus", - "mock_utmi", "sleep"; + <&rpmcc RPM_SMD_AGGR2_NOC_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "bus"; =20 assigned-clocks =3D <&gcc GCC_USB30_MOCK_UTMI_CLK>, <&gcc GCC_USB30_MASTER_CLK>, diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 6af80a627c3a..0692ae0e60a4 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3844,10 +3844,13 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3892,10 +3895,13 @@ usb_2: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_SEC_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qco= m/sm6125.dtsi index 50def880bc87..135e6e0da27a 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -487,12 +487,18 @@ usb3: usb@4ef8800 { #size-cells =3D <1>; ranges; =20 - clocks =3D <&gcc GCC_USB30_PRIM_MASTER_CLK>, + clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, + <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_SYS_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB3_PRIM_CLKREF_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, + <&gcc GCC_USB3_PRIM_CLKREF_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qco= m/sm6350.dtsi index fb1a0f662575..d4f8f33f3f0c 100644 --- a/arch/arm64/boot/dts/qcom/sm6350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi @@ -1034,10 +1034,13 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 interrupts-extended =3D <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index a57a13486c6c..47700697c5ef 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -3614,11 +3614,15 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3659,11 +3663,15 @@ usb_2: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qco= m/sm8250.dtsi index 881550cf7557..c8962acfddbe 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -2995,11 +2995,15 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -3046,11 +3050,15 @@ usb_2: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qco= m/sm8350.dtsi index e1eba30dc7ad..dd32b227df49 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2449,10 +2449,13 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; @@ -2492,11 +2495,15 @@ usb_2: usb@a8f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>, - <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_SLEEP_CLK>, + <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB3_SEC_CLKREF_EN>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>, <&gcc GCC_USB30_SEC_MASTER_CLK>; diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index 7f52c3cfdfb7..e8c19b37ca0e 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3107,11 +3107,15 @@ usb_1: usb@a6f8800 { clocks =3D <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB3_0_CLKREF_EN>; - clock-names =3D "cfg_noc", "core", "iface", "mock_utmi", - "sleep", "xo"; + clock-names =3D "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi", + "xo"; =20 assigned-clocks =3D <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; --=20 2.32.0 From nobody Fri May 8 10:48:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2AF3C433F5 for ; Wed, 4 May 2022 13:21:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350500AbiEDNYe (ORCPT ); Wed, 4 May 2022 09:24:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350564AbiEDNXw (ORCPT ); Wed, 4 May 2022 09:23:52 -0400 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78BA841300 for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gx3-20020a1709068a4300b006f3ef214dc4sm5660924ejc.42.2022.05.04.06.19.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 06:19:41 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Greg Kroah-Hartman , Manu Gautam , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 13/13] arm64: dts: qcom: align DWC3 USB interrupts with DT schema Date: Wed, 4 May 2022 15:19:23 +0200 Message-Id: <20220504131923.214367-14-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> References: <20220504131923.214367-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Align order of interrupts with Qualcomm DWC3 USB DT schema. No functional impact expected. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 10 ++++++---- arch/arm64/boot/dts/qcom/sm8450.dtsi | 10 ++++++---- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index 5d51b6ce45ef..3eafc50b6abd 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -3265,11 +3265,13 @@ usb_1: usb@a6f8800 { assigned-clock-rates =3D <19200000>, <200000000>; =20 interrupts-extended =3D <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_EDGE_BOTH>, <&pdc 15 IRQ_TYPE_EDGE_BOTH>, - <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "hs_phy_irq", "dp_hs_phy_irq", - "dm_hs_phy_irq", "ss_phy_irq"; + <&pdc 14 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names =3D "hs_phy_irq", + "ss_phy_irq", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; =20 power-domains =3D <&gcc GCC_USB30_PRIM_GDSC>; =20 diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qco= m/sm8450.dtsi index e8c19b37ca0e..7d08fad76371 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -3122,11 +3122,13 @@ usb_1: usb@a6f8800 { assigned-clock-rates =3D <19200000>, <200000000>; =20 interrupts-extended =3D <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, - <&pdc 14 IRQ_TYPE_EDGE_BOTH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, <&pdc 15 IRQ_TYPE_EDGE_BOTH>, - <&pdc 17 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names =3D "hs_phy_irq", "dp_hs_phy_irq", - "dm_hs_phy_irq", "ss_phy_irq"; + <&pdc 14 IRQ_TYPE_EDGE_BOTH>; + interrupt-names =3D "hs_phy_irq", + "ss_phy_irq", + "dm_hs_phy_irq", + "dp_hs_phy_irq"; =20 power-domains =3D <&gcc USB30_PRIM_GDSC>; =20 --=20 2.32.0