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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id l21-20020a056402345500b0042617ba6393sm8781322edc.29.2022.05.04.01.17.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 01:17:52 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 1/5] dt-bindings: interconnect: qcom,sdm845-cpu-bwmon: add BWMON device Date: Wed, 4 May 2022 10:17:31 +0200 Message-Id: <20220504081735.26906-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> References: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add bindings for the Qualcomm Bandwidth Monitor device providing performance data on interconnects. The bindings describe only BWMON version 4, e.g. the instance on SDM845 between CPU and Last Level Cache Controller. Signed-off-by: Krzysztof Kozlowski Acked-by: Georgi Djakov Reviewed-by: Rob Herring --- .../interconnect/qcom,sdm845-cpu-bwmon.yaml | 105 ++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sdm= 845-cpu-bwmon.yaml diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu= -bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cp= u-bwmon.yaml new file mode 100644 index 000000000000..c9b68ca87548 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.= yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sdm845-cpu-bwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Interconnect Bandwidth Monitor + +maintainers: + - Krzysztof Kozlowski + +description: + Bandwidth Monitor measures current throughput on buses between various N= oC + fabrics and provides information when it crosses configured thresholds. + +properties: + compatible: + enum: + - qcom,sdm845-cpu-bwmon # BWMON v4 + + interconnects: + maxItems: 2 + + interconnect-names: + items: + - const: ddr + - const: l3c + + interrupts: + maxItems: 1 + + operating-points-v2: true + opp-table: true + + reg: + # Currently described BWMON v4 and v5 use one register address space. + # BWMON v2 uses two register spaces - not yet described. + maxItems: 1 + +required: + - compatible + - interconnects + - interconnect-names + - interrupts + - operating-points-v2 + - opp-table + - reg + +additionalProperties: false + +examples: + - | + #include + #include + #include + + pmu@1436400 { + compatible =3D "qcom,sdm845-cpu-bwmon"; + reg =3D <0x01436400 0x600>; + + interrupts =3D ; + + interconnects =3D <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLA= VE_EBI1 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; + interconnect-names =3D "ddr", "l3c"; + + operating-points-v2 =3D <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-0 { + opp-peak-kBps =3D <800000 4800000>; + opp-avg-kBps =3D <800000 4800000>; + }; + opp-1 { + opp-peak-kBps =3D <1804000 9216000>; + opp-avg-kBps =3D <1804000 9216000>; + }; + opp-2 { + opp-peak-kBps =3D <2188000 11980800>; + opp-avg-kBps =3D <2188000 11980800>; + }; + opp-3 { + opp-peak-kBps =3D <3072000 15052800>; + opp-avg-kBps =3D <3072000 15052800>; + }; + opp-4 { + opp-peak-kBps =3D <4068000 19353600>; + opp-avg-kBps =3D <4068000 19353600>; + }; + opp-5 { + opp-peak-kBps =3D <5412000 20889600>; + opp-avg-kBps =3D <5412000 20889600>; + }; + opp-6 { + opp-peak-kBps =3D <6220000 22425600>; + opp-avg-kBps =3D <6220000 22425600>; + }; + opp-7 { + opp-peak-kBps =3D <7216000 25497600>; + opp-avg-kBps =3D <7216000 25497600>; + }; + }; + }; --=20 2.32.0 From nobody Sun May 10 12:56:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 42710C433F5 for ; Wed, 4 May 2022 08:18:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346241AbiEDIVv (ORCPT ); Wed, 4 May 2022 04:21:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48668 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346147AbiEDIVb (ORCPT ); Wed, 4 May 2022 04:21:31 -0400 Received: from mail-ed1-x532.google.com (mail-ed1-x532.google.com [IPv6:2a00:1450:4864:20::532]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D61E022B33 for ; Wed, 4 May 2022 01:17:55 -0700 (PDT) Received: by mail-ed1-x532.google.com with SMTP id k27so841137edk.4 for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id l21-20020a056402345500b0042617ba6393sm8781322edc.29.2022.05.04.01.17.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 01:17:53 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thara Gopinath Subject: [PATCH v2 2/5] opp: Add apis to retrieve opps with interconnect bandwidth Date: Wed, 4 May 2022 10:17:32 +0200 Message-Id: <20220504081735.26906-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> References: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add dev_pm_opp_find_bw_ceil and dev_pm_opp_find_bw_floor to retrieve opps based on interconnect associated with the opp and bandwidth. The index variable is the index of the interconnect as specified in the opp table in Devicetree. Co-developed-by: Thara Gopinath Signed-off-by: Thara Gopinath Signed-off-by: Krzysztof Kozlowski --- drivers/opp/core.c | 120 +++++++++++++++++++++++++++++++++++++++++ include/linux/pm_opp.h | 19 +++++++ 2 files changed, 139 insertions(+) diff --git a/drivers/opp/core.c b/drivers/opp/core.c index 2945f3c1ce09..8125342cee2f 100644 --- a/drivers/opp/core.c +++ b/drivers/opp/core.c @@ -729,6 +729,126 @@ struct dev_pm_opp *dev_pm_opp_find_freq_ceil_by_volt(= struct device *dev, } EXPORT_SYMBOL_GPL(dev_pm_opp_find_freq_ceil_by_volt); =20 +/** + * dev_pm_opp_find_bw_ceil() - Search for a rounded ceil bandwidth + * @dev: device for which we do this operation + * @freq: start bandwidth + * @index: which bandwidth to compare, in case of OPPs with several values + * + * Search for the matching floor *available* OPP from a starting bandwidth + * for a device. + * + * Return: matching *opp and refreshes *bw accordingly, else returns + * ERR_PTR in case of error and should be handled using IS_ERR. Error retu= rn + * values can be: + * EINVAL: for bad pointer + * ERANGE: no match found for search + * ENODEV: if device not found in list of registered devices + * + * The callers are required to call dev_pm_opp_put() for the returned OPP = after + * use. + */ +struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *dev, + unsigned int *bw, int index) +{ + struct opp_table *opp_table; + struct dev_pm_opp *temp_opp, *opp =3D ERR_PTR(-ERANGE); + + if (!dev || !bw) { + dev_err(dev, "%s: Invalid argument bw=3D%p\n", __func__, bw); + return ERR_PTR(-EINVAL); + } + + opp_table =3D _find_opp_table(dev); + if (IS_ERR(opp_table)) + return ERR_CAST(opp_table); + + if (index >=3D opp_table->path_count) + return ERR_PTR(-EINVAL); + + mutex_lock(&opp_table->lock); + + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { + if (temp_opp->available && temp_opp->bandwidth) { + if (temp_opp->bandwidth[index].peak >=3D *bw) { + opp =3D temp_opp; + *bw =3D opp->bandwidth[index].peak; + + /* Increment the reference count of OPP */ + dev_pm_opp_get(opp); + break; + } + } + } + + mutex_unlock(&opp_table->lock); + dev_pm_opp_put_opp_table(opp_table); + + return opp; +} +EXPORT_SYMBOL_GPL(dev_pm_opp_find_bw_ceil); + +/** + * dev_pm_opp_find_bw_floor() - Search for a rounded floor bandwidth + * @dev: device for which we do this operation + * @freq: start bandwidth + * @index: which bandwidth to compare, in case of OPPs with several values + * + * Search for the matching floor *available* OPP from a starting bandwidth + * for a device. + * + * Return: matching *opp and refreshes *bw accordingly, else returns + * ERR_PTR in case of error and should be handled using IS_ERR. Error retu= rn + * values can be: + * EINVAL: for bad pointer + * ERANGE: no match found for search + * ENODEV: if device not found in list of registered devices + * + * The callers are required to call dev_pm_opp_put() for the returned OPP = after + * use. + */ +struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *dev, + unsigned int *bw, int index) +{ + struct opp_table *opp_table; + struct dev_pm_opp *temp_opp, *opp =3D ERR_PTR(-ERANGE); + + if (!dev || !bw) { + dev_err(dev, "%s: Invalid argument bw=3D%p\n", __func__, bw); + return ERR_PTR(-EINVAL); + } + + opp_table =3D _find_opp_table(dev); + if (IS_ERR(opp_table)) + return ERR_CAST(opp_table); + + if (index >=3D opp_table->path_count) + return ERR_PTR(-EINVAL); + + mutex_lock(&opp_table->lock); + + list_for_each_entry(temp_opp, &opp_table->opp_list, node) { + if (temp_opp->available && temp_opp->bandwidth) { + /* go to the next node, before choosing prev */ + if (temp_opp->bandwidth[index].peak > *bw) + break; + opp =3D temp_opp; + } + } + + /* Increment the reference count of OPP */ + if (!IS_ERR(opp)) + dev_pm_opp_get(opp); + mutex_unlock(&opp_table->lock); + dev_pm_opp_put_opp_table(opp_table); + + if (!IS_ERR(opp)) + *bw =3D opp->bandwidth[index].peak; + + return opp; +} +EXPORT_SYMBOL_GPL(dev_pm_opp_find_bw_floor); + static int _set_opp_voltage(struct device *dev, struct regulator *reg, struct dev_pm_opp_supply *supply) { diff --git a/include/linux/pm_opp.h b/include/linux/pm_opp.h index 0d85a63a1f78..dcea178868c9 100644 --- a/include/linux/pm_opp.h +++ b/include/linux/pm_opp.h @@ -129,6 +129,13 @@ struct dev_pm_opp *dev_pm_opp_find_freq_ceil_by_volt(s= truct device *dev, =20 struct dev_pm_opp *dev_pm_opp_find_freq_ceil(struct device *dev, unsigned long *freq); + +struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *dev, + unsigned int *bw, int index); + +struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *dev, + unsigned int *bw, int index); + void dev_pm_opp_put(struct dev_pm_opp *opp); =20 int dev_pm_opp_add(struct device *dev, unsigned long freq, @@ -279,6 +286,18 @@ static inline struct dev_pm_opp *dev_pm_opp_find_freq_= ceil(struct device *dev, return ERR_PTR(-EOPNOTSUPP); } =20 +static inline struct dev_pm_opp *dev_pm_opp_find_bw_ceil(struct device *de= v, + unsigned int *bw, int index) +{ + return ERR_PTR(-EOPNOTSUPP); +} + +static inline struct dev_pm_opp *dev_pm_opp_find_bw_floor(struct device *d= ev, + unsigned int *bw, int index) +{ + return ERR_PTR(-EOPNOTSUPP); +} + static inline void dev_pm_opp_put(struct dev_pm_opp *opp) {} =20 static inline int dev_pm_opp_add(struct device *dev, unsigned long freq, --=20 2.32.0 From nobody Sun May 10 12:56:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3C5D8C433F5 for ; Wed, 4 May 2022 08:18:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346127AbiEDIVs (ORCPT ); Wed, 4 May 2022 04:21:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346159AbiEDIVc (ORCPT ); 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id l21-20020a056402345500b0042617ba6393sm8781322edc.29.2022.05.04.01.17.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 01:17:55 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thara Gopinath Subject: [PATCH v2 3/5] soc: qcom: icc-bwmon: Add bandwidth monitoring driver Date: Wed, 4 May 2022 10:17:33 +0200 Message-Id: <20220504081735.26906-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> References: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Bandwidth monitoring h/w sits between various subsytems like cpu, gpu etc and ddr subsystem. This h/w can be configured to monitor the data traffic between ddr and other subsytems. The bandwidth values obtained from this monitoring is used to bump up or down the corresponding interconnect speeds. Co-developed-by: Thara Gopinath Signed-off-by: Thara Gopinath Signed-off-by: Krzysztof Kozlowski --- MAINTAINERS | 7 + drivers/soc/qcom/Kconfig | 10 ++ drivers/soc/qcom/Makefile | 1 + drivers/soc/qcom/icc-bwmon.c | 329 +++++++++++++++++++++++++++++++++++ 4 files changed, 347 insertions(+) create mode 100644 drivers/soc/qcom/icc-bwmon.c diff --git a/MAINTAINERS b/MAINTAINERS index 6157e706ed02..bc123f706256 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16376,6 +16376,13 @@ S: Maintained F: Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt F: drivers/i2c/busses/i2c-qcom-cci.c =20 +QUALCOMM INTERCONNECT BWMON DRIVER +M: Krzysztof Kozlowski +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/interconnect/qcom,sdm845-cpu-bwmon.ya= ml +F: drivers/soc/qcom/icc-bwmon.c + QUALCOMM IOMMU M: Rob Clark L: iommu@lists.linux-foundation.org diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig index e718b8735444..04375824e71a 100644 --- a/drivers/soc/qcom/Kconfig +++ b/drivers/soc/qcom/Kconfig @@ -228,4 +228,14 @@ config QCOM_APR application processor and QDSP6. APR is used by audio driver to configure QDSP6 ASM, ADM and AFE modules. + +config QCOM_ICC_BWMON + tristate "QCOM Interconnect Bandwidth Monitor driver" + depends on ARCH_QCOM || COMPILE_TEST + select PM_OPP + help + Sets up driver monitoring bandwidth on various interconnects and + based on that voting for interconnect bandwidth, adjusting their + speed to current demand. + endmenu diff --git a/drivers/soc/qcom/Makefile b/drivers/soc/qcom/Makefile index 70d5de69fd7b..d66604aff2b0 100644 --- a/drivers/soc/qcom/Makefile +++ b/drivers/soc/qcom/Makefile @@ -28,3 +28,4 @@ obj-$(CONFIG_QCOM_LLCC) +=3D llcc-qcom.o obj-$(CONFIG_QCOM_RPMHPD) +=3D rpmhpd.o obj-$(CONFIG_QCOM_RPMPD) +=3D rpmpd.o obj-$(CONFIG_QCOM_KRYO_L2_ACCESSORS) +=3D kryo-l2-accessors.o +obj-$(CONFIG_QCOM_ICC_BWMON) +=3D icc-bwmon.o diff --git a/drivers/soc/qcom/icc-bwmon.c b/drivers/soc/qcom/icc-bwmon.c new file mode 100644 index 000000000000..8460712e7298 --- /dev/null +++ b/drivers/soc/qcom/icc-bwmon.c @@ -0,0 +1,329 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. + * Copyright (C) 2021-2022 Linaro Ltd + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define HW_TIMER_HZ 19200000 + +#define BWMON_GLOBAL_IRQ_STATUS 0x0 +#define BWMON_GLOBAL_IRQ_CLEAR 0x8 +#define BWMON_GLOBAL_IRQ_ENABLE 0xc +#define BWMON_GLOBAL_IRQ_ENABLE_ENABLE BIT(0) + +#define BWMON_IRQ_STATUS 0x100 +#define BWMON_IRQ_CLEAR 0x108 +#define BWMON_IRQ_ENABLE 0x10c +#define BWMON_IRQ_ENABLE_ZONE1_SHIFT 5 +#define BWMON_IRQ_ENABLE_ZONE3_SHIFT 7 + +#define BWMON_ENABLE 0x2a0 +#define BWMON_ENABLE_ENABLE BIT(0) + +#define BWMON_CLEAR 0x2a4 +#define BWMON_CLEAR_CLEAR BIT(0) + +#define BWMON_SAMPLE_WINDOW 0x2a8 +#define BWMON_THRESHOLD_HIGH 0x2ac +#define BWMON_THRESHOLD_MED 0x2b0 +#define BWMON_THRESHOLD_LOW 0x2b4 + +#define BWMON_ZONE_ACTIONS 0x2b8 +#define BWMON_ZONE_ACTIONS_DEFAULT 0x95250901 + +#define BWMON_THRESHOLD_COUNT 0x2bc +#define BWMON_THRESHOLD_COUNT_ZONE1_SHIFT 8 +#define BWMON_THRESHOLD_COUNT_ZONE2_SHIFT 16 +#define BWMON_THRESHOLD_COUNT_ZONE3_SHIFT 24 +#define BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT 0xFF +#define BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT 0xFF + +/* BWMON registers count data in MB/s */ +#define BWMON_ZONE_COUNT 0x2d8 +#define BWMON_ZONE_MAX(zone) (0x2e0 + 4 * (zone)) + +struct icc_bwmon_data { + unsigned int sample_ms; + unsigned int default_highbw_kbps; + unsigned int default_medbw_kbps; + unsigned int default_lowbw_kbps; + u8 zone1_thres_count; + u8 zone3_thres_count; +}; + +struct icc_bwmon { + struct device *dev; + void __iomem *base; + int irq; + + unsigned int sample_ms; + unsigned int max_bw_kbps; + unsigned int min_bw_kbps; + unsigned int target_kbps; + unsigned int current_kbps; +}; + +static void bwmon_clear(struct icc_bwmon *bwmon) +{ + /* + * Clear zone and global interrupts. The order and barriers are + * important. Quoting downstream Qualcomm msm-4.9 tree: + * + * Synchronize the local interrupt clear in mon_irq_clear() + * with the global interrupt clear here. Otherwise, the CPU + * may reorder the two writes and clear the global interrupt + * before the local interrupt, causing the global interrupt + * to be retriggered by the local interrupt still being high. + * + * Similarly, because the global registers are in a different + * region than the local registers, we need to ensure any register + * writes to enable the monitor after this call are ordered with the + * clearing here so that local writes don't happen before the + * interrupt is cleared. + */ + writel(0xa0, bwmon->base + BWMON_IRQ_CLEAR); + writel(BIT(0), bwmon->base + BWMON_GLOBAL_IRQ_CLEAR); + + /* Clear counters */ + writel(BWMON_CLEAR_CLEAR, bwmon->base + BWMON_CLEAR); +} + +static void bwmon_disable(struct icc_bwmon *bwmon) +{ + /* Disable interrupts. Strict ordering, see bwmon_clear(). */ + writel(0x0, bwmon->base + BWMON_GLOBAL_IRQ_ENABLE); + writel(0x0, bwmon->base + BWMON_IRQ_ENABLE); + + /* Disable bwmon */ + writel(0x0, bwmon->base + BWMON_ENABLE); +} + +static void bwmon_enable(struct icc_bwmon *bwmon, unsigned int irq_enable) +{ + /* Enable interrupts */ + writel(BWMON_GLOBAL_IRQ_ENABLE_ENABLE, + bwmon->base + BWMON_GLOBAL_IRQ_ENABLE); + writel(irq_enable, bwmon->base + BWMON_IRQ_ENABLE); + + /* Enable bwmon */ + writel(BWMON_ENABLE_ENABLE, bwmon->base + BWMON_ENABLE); +} + +static void bwmon_set_threshold(struct icc_bwmon *bwmon, unsigned int reg, + unsigned int kbps) +{ + unsigned int mbps =3D kbps / SZ_1K; + unsigned int thres; + + thres =3D mult_frac(mbps, bwmon->sample_ms, MSEC_PER_SEC); + writel_relaxed(thres, bwmon->base + reg); +} + +static void bwmon_start(struct icc_bwmon *bwmon, + const struct icc_bwmon_data *data) +{ + unsigned int thres_count, irq_enable; + int window; + + bwmon_clear(bwmon); + + window =3D mult_frac(bwmon->sample_ms, HW_TIMER_HZ, MSEC_PER_SEC); + writel_relaxed(window, bwmon->base + BWMON_SAMPLE_WINDOW); + + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH, + data->default_highbw_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED, + data->default_medbw_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_LOW, + data->default_lowbw_kbps); + + thres_count =3D data->zone3_thres_count << BWMON_THRESHOLD_COUNT_ZONE3_SH= IFT | + BWMON_THRESHOLD_COUNT_ZONE2_DEFAULT << BWMON_THRESHOLD_COUNT_ZONE2_SHIF= T | + data->zone1_thres_count << BWMON_THRESHOLD_COUNT_ZONE1_SHIFT | + BWMON_THRESHOLD_COUNT_ZONE0_DEFAULT; + writel_relaxed(thres_count, bwmon->base + BWMON_THRESHOLD_COUNT); + writel_relaxed(BWMON_ZONE_ACTIONS_DEFAULT, + bwmon->base + BWMON_ZONE_ACTIONS); + + /* Write barriers in bwmon_clear() */ + irq_enable =3D BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT) | + BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT); + bwmon_clear(bwmon); + bwmon_enable(bwmon, irq_enable); +} + +static irqreturn_t bwmon_intr(int irq, void *dev_id) +{ + struct icc_bwmon *bwmon =3D dev_id; + unsigned int status, max; + int zone; + + status =3D readl(bwmon->base + BWMON_IRQ_STATUS); + + if (!status) + return IRQ_NONE; + + bwmon_disable(bwmon); + + zone =3D get_bitmask_order(status >> 4) - 1; + max =3D readl(bwmon->base + BWMON_ZONE_MAX(zone)) * SZ_1K; + bwmon->target_kbps =3D mult_frac(max, MSEC_PER_SEC, bwmon->sample_ms); + + return IRQ_WAKE_THREAD; +} + +static irqreturn_t bwmon_intr_thread(int irq, void *dev_id) +{ + struct icc_bwmon *bwmon =3D dev_id; + unsigned int irq_enable =3D 0; + struct dev_pm_opp *opp, *target_opp; + unsigned int bw_kbps, up_kbps, down_kbps; + + bw_kbps =3D bwmon->target_kbps; + + target_opp =3D dev_pm_opp_find_bw_ceil(bwmon->dev, &bw_kbps, 0); + if (IS_ERR(target_opp) && PTR_ERR(target_opp) =3D=3D -ERANGE) + target_opp =3D dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0); + + bwmon->target_kbps =3D bw_kbps; + + bw_kbps--; + opp =3D dev_pm_opp_find_bw_floor(bwmon->dev, &bw_kbps, 0); + if (IS_ERR(opp) && PTR_ERR(opp) =3D=3D -ERANGE) + down_kbps =3D bwmon->target_kbps; + else + down_kbps =3D bw_kbps; + + up_kbps =3D bwmon->target_kbps + 1; + + if (bwmon->target_kbps >=3D bwmon->max_bw_kbps) + irq_enable =3D BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT); + else if (bwmon->target_kbps <=3D bwmon->min_bw_kbps) + irq_enable =3D BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT); + else + irq_enable =3D BIT(BWMON_IRQ_ENABLE_ZONE1_SHIFT) | + BIT(BWMON_IRQ_ENABLE_ZONE3_SHIFT); + + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_HIGH, up_kbps); + bwmon_set_threshold(bwmon, BWMON_THRESHOLD_MED, down_kbps); + bwmon_clear(bwmon); + bwmon_enable(bwmon, irq_enable); + + if (bwmon->target_kbps =3D=3D bwmon->current_kbps) + goto out; + + dev_pm_opp_set_opp(bwmon->dev, target_opp); + bwmon->current_kbps =3D bwmon->target_kbps; + +out: + dev_pm_opp_put(target_opp); + if (!IS_ERR(opp)) + dev_pm_opp_put(opp); + + return IRQ_HANDLED; +} + +static int bwmon_probe(struct platform_device *pdev) +{ + struct device *dev =3D &pdev->dev; + struct dev_pm_opp *opp; + struct icc_bwmon *bwmon; + const struct icc_bwmon_data *data; + int ret; + + bwmon =3D devm_kzalloc(dev, sizeof(*bwmon), GFP_KERNEL); + if (!bwmon) + return -ENOMEM; + + data =3D of_device_get_match_data(dev); + + bwmon->base =3D devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(bwmon->base)) { + dev_err(dev, "failed to map bwmon registers\n"); + return PTR_ERR(bwmon->base); + } + + bwmon->irq =3D platform_get_irq(pdev, 0); + if (bwmon->irq < 0) { + dev_err(dev, "failed to acquire bwmon IRQ\n"); + return bwmon->irq; + } + + ret =3D devm_pm_opp_of_add_table(dev); + if (ret) + return dev_err_probe(dev, ret, "failed to add OPP table\n"); + + bwmon->max_bw_kbps =3D UINT_MAX; + opp =3D dev_pm_opp_find_bw_floor(dev, &bwmon->max_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, ret, "failed to find max peak bandwidth\n"); + + bwmon->min_bw_kbps =3D 0; + opp =3D dev_pm_opp_find_bw_ceil(dev, &bwmon->min_bw_kbps, 0); + if (IS_ERR(opp)) + return dev_err_probe(dev, ret, "failed to find min peak bandwidth\n"); + + bwmon->sample_ms =3D data->sample_ms; + bwmon->dev =3D dev; + + bwmon_disable(bwmon); + ret =3D devm_request_threaded_irq(dev, bwmon->irq, bwmon_intr, + bwmon_intr_thread, + IRQF_ONESHOT, dev_name(dev), bwmon); + if (ret) + return dev_err_probe(dev, ret, "failed to request IRQ\n"); + + platform_set_drvdata(pdev, bwmon); + bwmon_start(bwmon, data); + + return 0; +} + +static int bwmon_remove(struct platform_device *pdev) +{ + struct icc_bwmon *bwmon =3D platform_get_drvdata(pdev); + + bwmon_disable(bwmon); + + return 0; +} + +/* BWMON v4 */ +static const struct icc_bwmon_data sdm845_bwmon_data =3D { + .sample_ms =3D 4, + .default_highbw_kbps =3D 4800 * SZ_1K, + .default_medbw_kbps =3D 512 * SZ_1K, + .default_lowbw_kbps =3D 0, + .zone1_thres_count =3D 0x10, + .zone3_thres_count =3D 0x1, +}; + +static const struct of_device_id bwmon_of_match[] =3D { + { .compatible =3D "qcom,sdm845-cpu-bwmon", .data =3D &sdm845_bwmon_data }, + {} +}; +MODULE_DEVICE_TABLE(of, bwmon_of_match); + +static struct platform_driver bwmon_driver =3D { + .probe =3D bwmon_probe, + .remove =3D bwmon_remove, + .driver =3D { + .name =3D "qcom-bwmon", + .of_match_table =3D bwmon_of_match, + }, +}; +module_platform_driver(bwmon_driver); + +MODULE_AUTHOR("Krzysztof Kozlowski "); +MODULE_DESCRIPTION("QCOM BWMON driver"); +MODULE_LICENSE("GPL"); --=20 2.32.0 From nobody Sun May 10 12:56:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91EABC433FE for ; Wed, 4 May 2022 08:18:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346198AbiEDIVq (ORCPT ); Wed, 4 May 2022 04:21:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346127AbiEDIVc (ORCPT ); Wed, 4 May 2022 04:21:32 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C4F822BDF for ; Wed, 4 May 2022 01:17:57 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id l18so1415807ejc.7 for ; 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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id l21-20020a056402345500b0042617ba6393sm8781322edc.29.2022.05.04.01.17.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 01:17:56 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 4/5] arm64: defconfig: enable Qualcomm Bandwidth Monitor Date: Wed, 4 May 2022 10:17:34 +0200 Message-Id: <20220504081735.26906-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> References: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the Qualcomm Bandwidth Monitor to allow scaling interconnects depending on bandwidth usage between CPU and memory. This is used already on Qualcomm SDM845 SoC. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 6906b83f5e45..6edbcfd3f4ca 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1096,6 +1096,7 @@ CONFIG_QCOM_SOCINFO=3Dm CONFIG_QCOM_STATS=3Dm CONFIG_QCOM_WCNSS_CTRL=3Dm CONFIG_QCOM_APR=3Dm +CONFIG_QCOM_ICC_BWMON=3Dm CONFIG_ARCH_R8A77995=3Dy CONFIG_ARCH_R8A77990=3Dy CONFIG_ARCH_R8A77950=3Dy --=20 2.32.0 From nobody Sun May 10 12:56:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 32702C433EF for ; Wed, 4 May 2022 08:18:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346248AbiEDIV4 (ORCPT ); Wed, 4 May 2022 04:21:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346175AbiEDIVf (ORCPT ); Wed, 4 May 2022 04:21:35 -0400 Received: from mail-ej1-x62c.google.com (mail-ej1-x62c.google.com [IPv6:2a00:1450:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C17EA22B3A for ; Wed, 4 May 2022 01:17:59 -0700 (PDT) Received: by mail-ej1-x62c.google.com with SMTP id j6so1380299ejc.13 for ; Wed, 04 May 2022 01:17:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=db4sc5OrkSnoCCAKUJDacMNlzRQIVW40R0PO9szPpSw=; b=KGe1IO2UQP6MpGQv+BVltLwD9dOiM7SMH1UbK9CnTQOl8t4b+rgRa096yc/0T7rmKA y4oqULZRKgXEJPdnA3ilr+g5cu2qvVA5dzvUCafkP9P707OmXoqXiEMtwAhajmTmt0PS KU/6xKMRuHuk9OIBNjRd9S3KDEJZWEC6AzacTw2JmJrfullQbhFYGNYdc9y2VrE8H/5J YHrzlSbNL9zKcrExFI4EZ86BsbykSMrQxsaWyQ0dWcmiIGEZzZDQipfsiZuLy/kWjZBG EHKb13kDDn51oBgLLUkxYjvTF49F7jioGbJWceAIxfNwjzcIooOE+UYYN27V6vJeY3vy GHMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=db4sc5OrkSnoCCAKUJDacMNlzRQIVW40R0PO9szPpSw=; b=IAuhQWsxelQEAM020vdBCFuWR2RmmJsJ31fyJEVA8qxAKgkTcAOF42CS3JH88lSyyg DTKfINjlcdi5CrFF0UyH+yTr8zfszl3bC3Qxije5PxkNAd4zLFlL83pdGZeTnnDxHQ81 R6ErVoQxH7cja5GXBMhauwafWet/pL3uHRNVfDxowhZgiHvsSX2YwP4kGnF7cVXIfCl4 RkcWo486AQhpRAw4kt5cpS/FaGtYFbH0UIXG8cVeVyxjs+Ytdli0iOQp1/NcsPkrkM36 JDMELkxUclZm5nc2VBHtjbxQeR572D3xf11T63OhdXZscnkzseLPSlvrZv5x+bvKvc0e OSlA== X-Gm-Message-State: AOAM5305GmXtRalGOdhf5cHKxAgBoOnPcFWNyLCLa7rMlhF0ecjljapJ /e/7Ymr7DhAvi+rlyD4q9cxo+A== X-Google-Smtp-Source: ABdhPJykdvNWku+TlTP7WoUCk8uQAX3gxkIBwzvlnxQzOMfyQc/XrabUiCA6VmEEOpKo+JqKj41WNA== X-Received: by 2002:a17:907:7ea6:b0:6f4:9d64:8e20 with SMTP id qb38-20020a1709077ea600b006f49d648e20mr5150330ejc.634.1651652278223; Wed, 04 May 2022 01:17:58 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id l21-20020a056402345500b0042617ba6393sm8781322edc.29.2022.05.04.01.17.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 04 May 2022 01:17:57 -0700 (PDT) From: Krzysztof Kozlowski To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Georgi Djakov , Rob Herring , Catalin Marinas , Will Deacon , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" , linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thara Gopinath Subject: [PATCH v2 5/5] arm64: dts: qcom: sdm845: Add CPU BWMON Date: Wed, 4 May 2022 10:17:35 +0200 Message-Id: <20220504081735.26906-6-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> References: <20220504081735.26906-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add device node for CPU-memory BWMON device (bandwidth monitoring) on SDM845. Co-developed-by: Thara Gopinath Signed-off-by: Thara Gopinath Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 60 ++++++++++++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index 692cf4be4eef..bd4577f0a92f 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2026,6 +2026,66 @@ llcc: system-cache-controller@1100000 { interrupts =3D ; }; =20 + pmu@1436400 { + compatible =3D "qcom,sdm845-cpu-bwmon"; + reg =3D <0 0x01436400 0 0x600>; + + interrupts =3D ; + + interconnects =3D <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EB= I1 3>, + <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>; + interconnect-names =3D "ddr", "l3c"; + + operating-points-v2 =3D <&cpu_bwmon_opp_table>; + + cpu_bwmon_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + /* + * The interconnect paths bandwidths calculated + * from msm-4.9 downstream kernel: + * - the gladiator_noc-mem_noc from bandwidth + * table of qcom,llccbw (property qcom,bw-tbl); + * bus width: 4 bytes; + * - the OSM L3 from bandiwdth table of + * qcom,cpu4-l3lat-mon (qcom,core-dev-table); + * bus width: 16 bytes; + */ + opp-0 { + opp-peak-kBps =3D <800000 4800000>; + opp-avg-kBps =3D <800000 4800000>; + }; + opp-1 { + opp-peak-kBps =3D <1804000 9216000>; + opp-avg-kBps =3D <1804000 9216000>; + }; + opp-2 { + opp-peak-kBps =3D <2188000 11980800>; + opp-avg-kBps =3D <2188000 11980800>; + }; + opp-3 { + opp-peak-kBps =3D <3072000 15052800>; + opp-avg-kBps =3D <3072000 15052800>; + }; + opp-4 { + opp-peak-kBps =3D <4068000 19353600>; + opp-avg-kBps =3D <4068000 19353600>; + }; + opp-5 { + opp-peak-kBps =3D <5412000 20889600>; + opp-avg-kBps =3D <5412000 20889600>; + }; + opp-6 { + opp-peak-kBps =3D <6220000 22425600>; + opp-avg-kBps =3D <6220000 22425600>; + }; + opp-7 { + opp-peak-kBps =3D <7216000 25497600>; + opp-avg-kBps =3D <7216000 25497600>; + }; + }; + }; + pcie0: pci@1c00000 { compatible =3D "qcom,pcie-sdm845"; reg =3D <0 0x01c00000 0 0x2000>, --=20 2.32.0