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Wed, 04 May 2022 00:53:49 -0700 From: Piyush Mehta To: , , , , , , CC: , , , , , , Piyush Mehta Subject: [PATCH 1/2] dt-bindings: usb: dwc3-xilinx: add optional property reset-gpios Date: Wed, 4 May 2022 13:23:08 +0530 Message-ID: <20220504075309.6244-2-piyush.mehta@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220504075309.6244-1-piyush.mehta@xilinx.com> References: <20220504075309.6244-1-piyush.mehta@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 37556571-75ef-447a-05d1-08da2da344fc X-MS-TrafficTypeDiagnostic: DM5PR02MB3209:EE_ X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8XeQsacuXmMS1X6b31DVXpvCCGxCyrAbWKgnwfBDLCwgG0pQ/O3wxr5wZzf6VHSxq1HSdovOOSon5NLMIyVXLDbDpnNTrUkEPRRQr2t5AoYaCxrgZQzLI+vGf6h+tTcgiBSDwPsBu1bXji5oPrdNSzR57pXNgaQ2ONZaNiTQfbMt5DWuNd3ybtBvO8pBJBdq+4dxofqVCneKHdcoRxu6MpdgenQP5tERtRY8ZCqfjwWSXpb9W/omx3sFmqK5JKqlI2f6pvymJ7J5gTGnlblS43aw5oEgh4WSEXWmFZ+FfVsUYYxdXxQhtGjSBvulV2RJ+7Z+sqrorP25wyOOSZXV4p/iRWv9h2TfFibS7M4/VPHMO387/z6CG1u9NLJNN7dwAFqJRY7D4UkO9JCrAf8zpIxG8nLqy5Jt1KP7/T4BzpvswmPpFb7KSGG6BviBWqbNMdwkD16+JRHrzSe3VhBUJ8rJTYvc8q2cGlF1F6e1K7kgaCPqBhvMLlSJ/GvUJQxC40u8x1yKkLVEfYu1XmiXMnypvZuSwQ61M+TU9sSlN/SHATjXm34qpbHEPQSAywUbrKbQrqML9+qJaBjo81WWIxP1i0eihtDC3zl64dh/nEo/PUPwWNOekWFTQdis1I2gtTn6f7XsO3YeYRKBP2OWGMRqkpDBN64jca90XesEz7IM0xohHjhzJUQZtX80OpCXZvG+q+0T3+FR2++meCcWhA7oY/OWmtf6kLhbvvCykf0= X-Forefront-Antispam-Report: CIP:149.199.62.198;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:xsj-pvapexch02.xlnx.xilinx.com;PTR:unknown-62-198.xilinx.com;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(46966006)(40470700004)(47076005)(426003)(336012)(1076003)(186003)(26005)(6666004)(7696005)(2616005)(107886003)(7636003)(356005)(40460700003)(82310400005)(36860700001)(4744005)(110136005)(44832011)(5660300002)(54906003)(508600001)(6636002)(316002)(8676002)(70206006)(4326008)(70586007)(9786002)(8936002)(36756003)(2906002)(102446001)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2022 07:54:08.5383 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 37556571-75ef-447a-05d1-08da2da344fc X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch02.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: BN1NAM02FT022.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR02MB3209 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Added optional property support reset-gpios for the dwc3-Xilinx glue driver. Signed-off-by: Piyush Mehta Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Docum= entation/devicetree/bindings/usb/dwc3-xilinx.yaml index f77c16e..098b731 100644 --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml @@ -71,6 +71,10 @@ properties: - usb2-phy - usb3-phy =20 + reset-gpios: + description: GPIO used for the reset ulpi-phy + maxItems: 1 + # Required child node: =20 patternProperties: --=20 2.7.4 From nobody Sun May 10 12:50:05 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 93000C433F5 for ; Wed, 4 May 2022 07:54:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343600AbiEDH6G (ORCPT ); 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Wed, 4 May 2022 07:54:18 +0000 Received: from xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) by xsj-pvapexch01.xlnx.xilinx.com (172.19.86.40) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2176.14; Wed, 4 May 2022 00:54:02 -0700 Received: from smtp.xilinx.com (172.19.127.95) by xsj-pvapexch02.xlnx.xilinx.com (172.19.86.41) with Microsoft SMTP Server id 15.1.2176.14 via Frontend Transport; Wed, 4 May 2022 00:54:02 -0700 Envelope-to: git@xilinx.com, gregkh@linuxfoundation.org, balbi@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Received: from [10.140.6.18] (port=46956 helo=xhdlakshmis40.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from ) id 1nm9pi-000B5T-6E; Wed, 04 May 2022 00:54:02 -0700 From: Piyush Mehta To: , , , , , , CC: , , , , , , Piyush Mehta Subject: [PATCH 2/2] usb: dwc3: xilinx: Add gpio-reset support Date: Wed, 4 May 2022 13:23:09 +0530 Message-ID: <20220504075309.6244-3-piyush.mehta@xilinx.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220504075309.6244-1-piyush.mehta@xilinx.com> References: <20220504075309.6244-1-piyush.mehta@xilinx.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 41945fa2-ad94-4331-06f5-08da2da34ab1 X-MS-TrafficTypeDiagnostic: SN6PR02MB4528:EE_ X-Microsoft-Antispam-PRVS: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2022 07:54:18.1600 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 41945fa2-ad94-4331-06f5-08da2da34ab1 X-MS-Exchange-CrossTenant-Id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=657af505-d5df-48d0-8300-c31994686c5c;Ip=[149.199.62.198];Helo=[xsj-pvapexch01.xlnx.xilinx.com] X-MS-Exchange-CrossTenant-AuthSource: SN1NAM02FT0037.eop-nam02.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN6PR02MB4528 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch adds a USB GPIO based reset for dwc3-xilinx driver. The PHY needs to be reset after the completion of phy initialization. As part of the reset, check for gpio-reset binding before toggling the pin. This feature is advantageous when the user toggle GPIO to trigger the ULPI-PHY reset. Delay of milliseconds is added in between low and high to meet the setup and hold time requirement of the reset. The reset-gpio error handling is added for error notification. Some GPIO controllers must be accessed using message-based buses, like I2C or SPI, to address this problem, updates GPIO access with sleep API. This reset is specific to the zynqMp. Signed-off-by: Piyush Mehta --- drivers/usb/dwc3/dwc3-xilinx.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-xilinx.c b/drivers/usb/dwc3/dwc3-xilinx.c index a6f3a9b..67b237c 100644 --- a/drivers/usb/dwc3/dwc3-xilinx.c +++ b/drivers/usb/dwc3/dwc3-xilinx.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -98,6 +99,7 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *priv_d= ata) { struct device *dev =3D priv_data->dev; struct reset_control *crst, *hibrst, *apbrst; + struct gpio_desc *reset_gpio; struct phy *usb3_phy; int ret =3D 0; u32 reg; @@ -201,6 +203,21 @@ static int dwc3_xlnx_init_zynqmp(struct dwc3_xlnx *pri= v_data) } =20 skip_usb3_phy: + /* ulpi reset via gpio-modepin or gpio-framework driver */ + reset_gpio =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset_gpio)) { + return dev_err_probe(dev, PTR_ERR(reset_gpio), + "Failed to request reset GPIO\n"); + } + + if (reset_gpio) { + /* Toggle ulpi to reset the phy. */ + gpiod_set_value_cansleep(reset_gpio, 1); + usleep_range(5000, 10000); + gpiod_set_value_cansleep(reset_gpio, 0); + usleep_range(5000, 10000); + } + /* * This routes the USB DMA traffic to go through FPD path instead * of reaching DDR directly. This traffic routing is needed to --=20 2.7.4