From nobody Sun May 10 14:20:38 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DFCADC433EF for ; Tue, 3 May 2022 09:26:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233387AbiECJaN (ORCPT ); Tue, 3 May 2022 05:30:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34868 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233376AbiECJaL (ORCPT ); Tue, 3 May 2022 05:30:11 -0400 Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 444E334641 for ; Tue, 3 May 2022 02:26:38 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id n10so14881735ejk.5 for ; Tue, 03 May 2022 02:26:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FUOtlbGVsYih4mc6eQpV5OoGIdZjeLrioJqeo3NGpEU=; b=HoP+fdqdEi/S/Nlnq2/b62HpRadWITtZg2Xp4xwINxyhNYrmzEjQxRaYsm9KqK2FJ3 TFzvJ3nrkSqKSB9r/s0QFJicqbiM6Cp8Hmt74PhBohMtM+/V8rJVfcQtL7DDA1CN2TA/ 2wAixifczmYb9Bt0pxyvhFbU8gAagEW7Qm7yXM395BZ2PAoyHm8U5dW3/WD1f1uAXwgu XmtDC48WoF+JfUwhAfqco2eTtWmWFXMag3RtgXfWON83+eqterxUMY0bRCk0tcnvGYnK gHHEbMJzIDh36lbnJhT3iLLbuKi2Eq+uY0WYU6xE2buR7ZfJEL6xA5EX1SKlb9EptMoB zgBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=FUOtlbGVsYih4mc6eQpV5OoGIdZjeLrioJqeo3NGpEU=; b=oUlv92q8JnlL5x7q29mQmjPexIFXnYB7j+k8Bx1dVieqmL01MfjbGe551G7yQR4gfB LcvsfnVRTmz0iPErNzAPzauyspCd5u6Wqo0Kq3gUWOQFSKXwwfKOqx07zdksHCX2tXB6 4WSavJuYjg5ALR/QXkvIQmjKJxU07/d7gSlPqIHbAuPljV7yE2LEy1Oip3YJPtbK1UBm 2GtVT/7q/fIofkypWSJFFiqHfi9JNaQtIirqD9hlIGtS31vE0rmTDYsXz708HCOuL3nY EAYVDGPsKAl+InazZXLkHFJFK7MFGAe4oG2islU8qqBRL3rDa9RdsXV2ryJkvbw4krCL M3Hw== X-Gm-Message-State: AOAM5301rQnIXt5PuRp0zhwWR6dYICKvmP1s4xWb2zL4rOROleWO9C0h 54YDGGeiR+Iq63HNRe2f498kJw== X-Google-Smtp-Source: ABdhPJwe3rmhvyYQ9yly28q1qZ4Sfx+S8eowB6YZIkuiRGyD2d9LMQilECpX/TWVcond5jGZPMPpNg== X-Received: by 2002:a17:906:5793:b0:6f3:d546:1764 with SMTP id k19-20020a170906579300b006f3d5461764mr15390330ejq.247.1651569996868; Tue, 03 May 2022 02:26:36 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-176-92.adslplus.ch. [188.155.176.92]) by smtp.gmail.com with ESMTPSA id e4-20020a170906844400b006f3ef214da4sm4493685ejy.10.2022.05.03.02.26.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 02:26:36 -0700 (PDT) From: Krzysztof Kozlowski To: Rob Herring , Krzysztof Kozlowski , Alim Akhtar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Chanho Park , Krzysztof Kozlowski Subject: [PATCH] arm64: dts: exynos: move XTCXO clock frequency to board in Exynos Auto v9 Date: Tue, 3 May 2022 11:26:31 +0200 Message-Id: <20220503092631.174713-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The external oscillator - XTCXO - is an input to the SoC. It is defined in the Exynos Auto v9 SoC DTSI, because all boards will provide it and clock controller bindings expect it, however the actual frequency of the clock should be determined by the board. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Chanho Park --- arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts | 4 ++++ arch/arm64/boot/dts/exynos/exynosautov9.dtsi | 1 - 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts b/arch/arm64/= boot/dts/exynos/exynosautov9-sadk.dts index 57518cb5e8c4..17e568853eb6 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts +++ b/arch/arm64/boot/dts/exynos/exynosautov9-sadk.dts @@ -58,3 +58,7 @@ &ufs_0 { &usi_0 { status =3D "okay"; }; + +&xtcxo { + clock-frequency =3D <26000000>; +}; diff --git a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi b/arch/arm64/boot= /dts/exynos/exynosautov9.dtsi index 807d500d6022..68d087ed0459 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov9.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov9.dtsi @@ -153,7 +153,6 @@ fixed-rate-clocks { xtcxo: clock { compatible =3D "fixed-clock"; #clock-cells =3D <0>; - clock-frequency =3D <26000000>; clock-output-names =3D "oscclk"; }; =20 --=20 2.32.0