From nobody Sun May 10 14:12:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 52420C433EF for ; Mon, 2 May 2022 15:24:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1380705AbiEBP13 (ORCPT ); Mon, 2 May 2022 11:27:29 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59576 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239345AbiEBP1I (ORCPT ); Mon, 2 May 2022 11:27:08 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [217.70.183.193]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2FC5A13CC9 for ; Mon, 2 May 2022 08:23:39 -0700 (PDT) Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 39548240004; Mon, 2 May 2022 15:23:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1651505017; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=4TZJ67Qf5npxgRoNb/48DKjrSfSErIPD2XpuA2RT2wg=; b=EVMm6S6AgU3AzldZff9PeF8IJgqpp6sNTnF4puLTECYqHMJFbvvUOTsobpOXJ8LCeAp0lR OVif4WVfeMEpxedo3J3vTva0KoGGD7uAlMY0aM94w83frxyNElsdQ58wgvSOW4iBOCMkbb Knh/Y7K9171lJVd9G9iGbsOAM6Ty6B7ykQ3vaoNvXQ1VUtG2y1sDCUihdws6ydvy2/un+k 9nvdOPfnBsZJl80mCgnI/Am3OsmWHaa14SH6MK5d8PAVW7dlTT6EygGzjozayw/v86s03z dQIOojhuvbYr7xSGR09HCjB39ORfnEI5aZxJyW1Op85yJvSIDtyYx1yLInZR2A== From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Russell King , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v3 1/2] ARM: at91: add code to handle secure calls Date: Mon, 2 May 2022 17:22:18 +0200 Message-Id: <20220502152219.216758-2-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220502152219.216758-1-clement.leger@bootlin.com> References: <20220502152219.216758-1-clement.leger@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since OP-TEE now has a more complete support for sama5d2, add necessary code to perform SMC calls. The detection of OP-TEE is based on a specific device-tree node path (/firmware/optee) such has done by some other SoC. A check is added to avoid doing SMC calls without having OP-TEE. Signed-off-by: Cl=C3=A9ment L=C3=A9ger --- arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/sam_secure.c | 46 +++++++++++++++++++++++++++++++++ arch/arm/mach-at91/sam_secure.h | 14 ++++++++++ arch/arm/mach-at91/sama5.c | 2 ++ 4 files changed, 63 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-at91/sam_secure.c create mode 100644 arch/arm/mach-at91/sam_secure.h diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 522b680b6446..0dcc37180588 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_SOC_AT91RM9200) +=3D at91rm9200.o obj-$(CONFIG_SOC_AT91SAM9) +=3D at91sam9.o obj-$(CONFIG_SOC_SAM9X60) +=3D sam9x60.o -obj-$(CONFIG_SOC_SAMA5) +=3D sama5.o +obj-$(CONFIG_SOC_SAMA5) +=3D sama5.o sam_secure.o obj-$(CONFIG_SOC_SAMA7) +=3D sama7.o obj-$(CONFIG_SOC_SAMV7) +=3D samv7.o =20 diff --git a/arch/arm/mach-at91/sam_secure.c b/arch/arm/mach-at91/sam_secur= e.c new file mode 100644 index 000000000000..2a01f7a7d13f --- /dev/null +++ b/arch/arm/mach-at91/sam_secure.c @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) 2022, Microchip + */ + +#include +#include + +#include "sam_secure.h" + +static bool optee_available; + +#define SAM_SIP_SMC_STD_CALL_VAL(func_num) \ + ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL, ARM_SMCCC_SMC_32, \ + ARM_SMCCC_OWNER_SIP, (func_num)) + +struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1) +{ + struct arm_smccc_res res =3D {.a0 =3D -1}; + + if (WARN_ON(!optee_available)) + return res; + + arm_smccc_smc(SAM_SIP_SMC_STD_CALL_VAL(fn), arg0, arg1, 0, 0, 0, 0, 0, + &res); + + return res; +} + +void __init sam_secure_init(void) +{ + struct device_node *np; + + /* + * We only check that the OP-TEE node is present and available. The + * OP-TEE kernel driver is not needed for the type of interaction made + * with OP-TEE here so the driver's status is not checked. + */ + np =3D of_find_node_by_path("/firmware/optee"); + if (np && of_device_is_available(np)) + optee_available =3D true; + of_node_put(np); + + if (optee_available) + pr_info("Running under OP-TEE firmware\n"); +} diff --git a/arch/arm/mach-at91/sam_secure.h b/arch/arm/mach-at91/sam_secur= e.h new file mode 100644 index 000000000000..360036672f52 --- /dev/null +++ b/arch/arm/mach-at91/sam_secure.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2022, Microchip + */ + +#ifndef SAM_SECURE_H +#define SAM_SECURE_H + +#include + +void __init sam_secure_init(void); +struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1); + +#endif /* SAM_SECURE_H */ diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c index 89dab7cf01e8..de5dd28b392e 100644 --- a/arch/arm/mach-at91/sama5.c +++ b/arch/arm/mach-at91/sama5.c @@ -14,6 +14,7 @@ #include =20 #include "generic.h" +#include "sam_secure.h" =20 static void __init sama5_dt_device_init(void) { @@ -47,6 +48,7 @@ MACHINE_END static void __init sama5d2_init(void) { of_platform_default_populate(NULL, NULL, NULL); + sam_secure_init(); sama5d2_pm_init(); } =20 --=20 2.34.1 From nobody Sun May 10 14:12:26 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD910C433F5 for ; Mon, 2 May 2022 15:23:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239120AbiEBP10 (ORCPT ); Mon, 2 May 2022 11:27:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239375AbiEBP1P (ORCPT ); Mon, 2 May 2022 11:27:15 -0400 Received: from relay1-d.mail.gandi.net (relay1-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::221]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 694C113D1E for ; Mon, 2 May 2022 08:23:40 -0700 (PDT) Received: (Authenticated sender: clement.leger@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id F398D240006; Mon, 2 May 2022 15:23:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1651505018; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=epNsehOQ5G2G1dNlTN4p4tzZ/vqrI4nGDtqFzUY+KDg=; b=UWVp04zye+oewABRxix51t0TRsFXXR3pLjoejridAOZVIoUAaZGVHC0dkBUK97Qc4LOOHG h/Y59+vPypLBYLcCZjf1RRUv2vcJc7Sab1eha4osGA7LF9lmzgYiupY1l0VzcwDKIL7x/Z EzyQuIHjB0u+F7Nb/Uj5Us1BrOAp1xH4RFI8tO+6lzRboOJ2/99mzViA0WN+vN0lodshUB r/8fjiiyUsVvPevw06ErSaoVXMH45EpSTZ/a9vaW23m+9rkQ2bTtv+XG7VAuF2noDSv94Z ShyC061S5uaVWNylxQJvLOEOkd66AtRzpuGsDij3YknopqkNhWkJ7Dvla2npFA== From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= To: Russell King , Nicolas Ferre , Alexandre Belloni , Ludovic Desroches Cc: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Thomas Petazzoni Subject: [PATCH v3 2/2] ARM: at91: pm: add support for sama5d2 secure suspend Date: Mon, 2 May 2022 17:22:19 +0200 Message-Id: <20220502152219.216758-3-clement.leger@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220502152219.216758-1-clement.leger@bootlin.com> References: <20220502152219.216758-1-clement.leger@bootlin.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When running with OP-TEE, the suspend control is handled securely. Suspend can be entered using PSCI support. Since the sama5d2 supports multiple suspend modes, add a new CONFIG_ATMEL_SECURE_PM which will send a SMC call to select the suspend mode at init time. "atmel.pm_modes" boot argument is still supported for compatibility purposes but the standby value is actually ignored since PSCI suspend is used and it only support one mode (suspend). Signed-off-by: Cl=C3=A9ment L=C3=A9ger --- arch/arm/mach-at91/Kconfig | 11 +++++++++- arch/arm/mach-at91/pm.c | 36 +++++++++++++++++++++++++++++++++ arch/arm/mach-at91/sam_secure.h | 4 ++++ 3 files changed, 50 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 279810381256..0e05da5b0aa3 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -209,7 +209,16 @@ config SOC_SAMA5 select SRAM if PM =20 config ATMEL_PM - bool + bool "Atmel PM support" + +config ATMEL_SECURE_PM + bool "Atmel Secure PM support" + depends on SOC_SAMA5D2 && ATMEL_PM + select ARM_PSCI + help + When running under a TEE, the suspend mode must be requested to be set + at TEE level. When enable, this option will use secure monitor calls + to set the suspend level. PSCI is then used to enter suspend. =20 config SOC_SAMA7 bool diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 0fd609e26615..d6886af9b205 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -27,6 +27,7 @@ =20 #include "generic.h" #include "pm.h" +#include "sam_secure.h" =20 #define BACKUP_DDR_PHY_CALIBRATION (9) =20 @@ -881,6 +882,35 @@ static int __init at91_pm_backup_init(void) return ret; } =20 +static void at91_pm_secure_init(void) +{ + int suspend_mode; + struct arm_smccc_res res; + + suspend_mode =3D soc_pm.data.suspend_mode; + + res =3D sam_smccc_call(SAMA5_SMC_SIP_SET_SUSPEND_MODE, + suspend_mode, 0); + if (res.a0 =3D=3D 0) { + pr_info("AT91: Secure PM: suspend mode set to %s\n", + pm_modes[suspend_mode].pattern); + return; + } + + pr_warn("AT91: Secure PM: %s mode not supported !\n", + pm_modes[suspend_mode].pattern); + + res =3D sam_smccc_call(SAMA5_SMC_SIP_GET_SUSPEND_MODE, 0, 0); + if (res.a0 =3D=3D 0) { + pr_warn("AT91: Secure PM: failed to get default mode\n"); + return; + } + + pr_info("AT91: Secure PM: using default suspend mode %s\n", + pm_modes[suspend_mode].pattern); + + soc_pm.data.suspend_mode =3D res.a1; +} static const struct of_device_id atmel_shdwc_ids[] =3D { { .compatible =3D "atmel,sama5d2-shdwc" }, { .compatible =3D "microchip,sam9x60-shdwc" }, @@ -1213,6 +1243,12 @@ void __init sama5d2_pm_init(void) if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) return; =20 + if (IS_ENABLED(CONFIG_ATMEL_SECURE_PM)) { + pr_warn("AT91: Secure PM: ignoring standby mode\n"); + at91_pm_secure_init(); + return; + } + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps)); ret =3D at91_dt_ramc(false); diff --git a/arch/arm/mach-at91/sam_secure.h b/arch/arm/mach-at91/sam_secur= e.h index 360036672f52..1e7d8b20ba1e 100644 --- a/arch/arm/mach-at91/sam_secure.h +++ b/arch/arm/mach-at91/sam_secure.h @@ -8,6 +8,10 @@ =20 #include =20 +/* Secure Monitor mode APIs */ +#define SAMA5_SMC_SIP_SET_SUSPEND_MODE 0x400 +#define SAMA5_SMC_SIP_GET_SUSPEND_MODE 0x401 + void __init sam_secure_init(void); struct arm_smccc_res sam_smccc_call(u32 fn, u32 arg0, u32 arg1); =20 --=20 2.34.1