From nobody Sun May 10 14:25:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFAB1C433F5 for ; Mon, 2 May 2022 10:03:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384496AbiEBKGf (ORCPT ); Mon, 2 May 2022 06:06:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1384366AbiEBKG1 (ORCPT ); Mon, 2 May 2022 06:06:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3D8111A04 for ; Mon, 2 May 2022 03:02:47 -0700 (PDT) From: Viraj Shah DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1651485766; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kFbaTBJ6AL/X2QNd2kSlQdvhpj3h8osfwHT7cP5luao=; b=ecFdqLEbt2QBAgdMnwZIVO7M+kTY7MbFKwl7xJ3yUbcdGbGorZIyle5SffnfrUD7cgXFAU R7b+U/oUhfa3afDtTx6gAzGyeQqULJMQlj3kz6/UgKavTrBIyMBo2BOWqliW7jLGRbiIBS zWESVymhNpNJ05klQrkf/F5i+BqVEHYF723hJLi763SjZgQk+dHu4zvHMq0mD1PVKW4tFt 5iMemher/eZ2IdZFSDUV37NOJr0bONtIjooRQ8Mgy5Qbnr6C6Enq9gObhtfT+zTfig2MCg m2C6+0C//Qwq8U/hdO1JedktHKwb9M61FLt66Puin7BsNpqFzDgREvlVuavqSg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1651485766; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kFbaTBJ6AL/X2QNd2kSlQdvhpj3h8osfwHT7cP5luao=; b=Zsz0j7wTyu86KZrkCFDG/37bshIgmR0pr0gPWky8FVTaAJhAKSe/9m0OcJXeExTFQRA4nm UNziTDS+LijQq+Bw== To: shawnguo@kernel.org, s.hauer@pengutronix.de Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Lucas Stach , Peng Fan , Frieder Schrempf , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 1/4] soc: imx8mm: gpcv2: Power sequence for DISP Date: Mon, 2 May 2022 12:02:30 +0200 Message-Id: <20220502100233.6023-2-viraj.shah@linutronix.de> In-Reply-To: <20220502100233.6023-1-viraj.shah@linutronix.de> References: <20220502100233.6023-1-viraj.shah@linutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As per the imx8mm reference manual, read bit 25(GPC_DISPMIX_ PWRDNACKN) of the power handshake register and wait for ack during power on/off. Signed-off-by: Viraj Shah --- drivers/soc/imx/gpcv2.c | 36 +++++++++++++++++++++++++++++++----- 1 file changed, 31 insertions(+), 5 deletions(-) diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c index 3cb123016b3e..8ee70c30964f 100644 --- a/drivers/soc/imx/gpcv2.c +++ b/drivers/soc/imx/gpcv2.c @@ -254,11 +254,24 @@ static int imx_pgc_power_up(struct generic_pm_domain = *genpd) /* * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait * for PUP_REQ/PDN_REQ bit to be cleared + * + * As per "5.2.9.5 Example Code 5" in i.MX-8MMini-yhsc.pdf + * Display power on section checks for bit 25 of + * Power handshake register to be cleared. */ - ret =3D regmap_read_poll_timeout(domain->regmap, - GPC_PU_PGC_SW_PUP_REQ, reg_val, - !(reg_val & domain->bits.pxx), - 0, USEC_PER_MSEC); + if (domain->bits.pxx =3D=3D IMX8MM_DISPMIX_SW_Pxx_REQ) { + regmap_update_bits(domain->regmap, GPC_PU_PWRHSK, + BIT(7), BIT(7)); + ret =3D regmap_read_poll_timeout(domain->regmap, + GPC_PU_PWRHSK, reg_val, + !(reg_val & IMX8MM_DISPMIX_HSK_PWRDNACKN), + 0, USEC_PER_MSEC); + } else + ret =3D regmap_read_poll_timeout(domain->regmap, + GPC_PU_PGC_SW_PUP_REQ, reg_val, + !(reg_val & domain->bits.pxx), + 0, USEC_PER_MSEC); + if (ret) { dev_err(domain->dev, "failed to command PGC\n"); goto out_clk_disable; @@ -355,11 +368,24 @@ static int imx_pgc_power_down(struct generic_pm_domai= n *genpd) /* * As per "5.5.9.4 Example Code 4" in IMX7DRM.pdf wait * for PUP_REQ/PDN_REQ bit to be cleared + * + * As per "5.2.9.5 Example Code 5" in i.MX-8MMini-yhsc.pdf + * Display power on section checks for bit 25 of + * Power handshake register to be set. */ - ret =3D regmap_read_poll_timeout(domain->regmap, + if (domain->bits.pxx =3D=3D IMX8MM_DISPMIX_SW_Pxx_REQ) { + regmap_clear_bits(domain->regmap, GPC_PU_PWRHSK, + BIT(7)); + ret =3D regmap_read_poll_timeout(domain->regmap, + GPC_PU_PWRHSK, reg_val, + !(reg_val & IMX8MM_DISPMIX_HSK_PWRDNACKN), + 0, USEC_PER_MSEC); + } else { + ret =3D regmap_read_poll_timeout(domain->regmap, GPC_PU_PGC_SW_PDN_REQ, reg_val, !(reg_val & domain->bits.pxx), 0, USEC_PER_MSEC); + } if (ret) { dev_err(domain->dev, "failed to command PGC\n"); goto out_clk_disable; --=20 2.20.1 From nobody Sun May 10 14:25:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4EE6C433F5 for ; Mon, 2 May 2022 10:03:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384379AbiEBKGx (ORCPT ); Mon, 2 May 2022 06:06:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1384355AbiEBKG1 (ORCPT ); Mon, 2 May 2022 06:06:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D526B11A2E for ; Mon, 2 May 2022 03:02:47 -0700 (PDT) From: Viraj Shah DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1651485766; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+BM11kXezS6ePXkdGQMiBvU9nitTToxjKm460+MZkks=; b=tC776zfxQWi3+yMroh1gn1FCwRpnVfuSgn8zfXKsaSXp4RveNqS2jbp5XbUyHu0xhIkBui eZQ5641WNbRApVzwNmwIIw8obxFYSfsdxP7qptpODaGX5Vbp16sCMGfMNMRFlzeTHXvNE7 8UmiH8rs49DCjd1qRItUPzZApSTwKcoAnPqs95jKjyxNwFY9Blf3cI+nCmp+Oeq0YRZ9wq lHz7moeLg+Z26MsSmDbPiWV7roQ9DEGeqN34UHdbqyciFcjdTwrh9AdOJ4HxBNaV6Pf38+ O/8ni4tA5WB2jr/zdN6P+IWEIhUJm9Urkdiqzn+GiVTk+p8KcMlb1b7wxXoriA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1651485766; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+BM11kXezS6ePXkdGQMiBvU9nitTToxjKm460+MZkks=; b=24ayr0y6XLsSQr7YZZ655LtPamGU1XCASCo8dxtOywOIe2DvQlzEdxZmbDv4BiyiA0+ZNg k6FNp8P46Ti4siBQ== To: shawnguo@kernel.org, s.hauer@pengutronix.de Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Lucas Stach , Adam Ford , Frieder Schrempf , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 2/4] soc: imx: imx8m-blk-ctrl: Display Power ON sequence Date: Mon, 2 May 2022 12:02:31 +0200 Message-Id: <20220502100233.6023-3-viraj.shah@linutronix.de> In-Reply-To: <20220502100233.6023-1-viraj.shah@linutronix.de> References: <20220502100233.6023-1-viraj.shah@linutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable the dispmix software clock and release the resets as shown in the 5.2.9.5 section of reference manual. Signed-off-by: Viraj Shah --- drivers/soc/imx/imx8m-blk-ctrl.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-c= trl.c index 122f9c884b38..ca63fd30e70a 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -99,7 +99,10 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_dom= ain *genpd) dev_err(bc->dev, "failed to enable clocks\n"); goto bus_put; } - regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask); + /* As per section 5.2.9.5 of reference manual imx-8MMini-yhsc.pdf, + * enable dispmix sft clock to power on the display + */ + regmap_write(bc->regmap, BLK_CLK_EN, 0x1FFF); =20 /* power up upstream GPC domain */ ret =3D pm_runtime_get_sync(domain->power_dev); @@ -112,7 +115,7 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_do= main *genpd) udelay(5); =20 /* release reset */ - regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask); + regmap_write(bc->regmap, BLK_SFT_RSTN, 0x7F); if (data->mipi_phy_rst_mask) regmap_set_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask); =20 --=20 2.20.1 From nobody Sun May 10 14:25:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7A9CBC433FE for ; Mon, 2 May 2022 10:03:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384373AbiEBKGo (ORCPT ); Mon, 2 May 2022 06:06:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1384367AbiEBKG1 (ORCPT ); Mon, 2 May 2022 06:06:27 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5980915706 for ; Mon, 2 May 2022 03:02:48 -0700 (PDT) From: Viraj Shah DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1651485767; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ormDq4ljLmV7zbEs3SyAq5bqxaVfYVolO3A1FU9LqqI=; b=KF5bUiPd1xvJEUNzH5Jfg7VHq/nTm6YNcaDdot5rXaEB4ZgyRp0+omT92v9ALMhF3QcoZA uyjg3zndeQ8OZsQuFkumhd273LRB8hEpmFTxA9rNYFR4F8PUzaj9WzETR+RH3Vo2b/rjYv 8R6yIhDM9Qr7njvpgQJ4Mus0L3Ie3I2TqILmt4vauT0rYM4omVbs9zsQ3Mio2elQxUTeep uJT2UBdoC5Ms+5rvnyfyGWwTAqEpI9jHTVPrSwfeOr553tBWxFIGSrAnzbF8IRD1MFVm1k NWJA2XG2FCaOLx5YEZTNuiW/d0IvtuLyUyJ8JHeTeZZrdyKmoooJA1Zm/2vVDg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1651485767; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ormDq4ljLmV7zbEs3SyAq5bqxaVfYVolO3A1FU9LqqI=; b=cbJbWE/OMsurhcX8/ELZJl231iZlSWzd9AvKg4lKJW5j9r7SIitra956FwmdfHlFj+RCHH JU3UZVennnjJRvAA== To: shawnguo@kernel.org, s.hauer@pengutronix.de Cc: Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Lucas Stach , Adam Ford , Philipp Zabel , Dan Carpenter , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 3/4] soc: imx: imx8m-blk-ctrl: Add reset bits for mipi dsi phy Date: Mon, 2 May 2022 12:02:32 +0200 Message-Id: <20220502100233.6023-4-viraj.shah@linutronix.de> In-Reply-To: <20220502100233.6023-1-viraj.shah@linutronix.de> References: <20220502100233.6023-1-viraj.shah@linutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As per reference manual page 3903, bit 16 (GPR_MIPI_S_RESETN) as well as 17 (GPR_MIPI_M_RESETN) are the reset masks for mipi phy reset mask. Signed-off-by: Viraj Shah --- drivers/soc/imx/imx8m-blk-ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/imx/imx8m-blk-ctrl.c b/drivers/soc/imx/imx8m-blk-c= trl.c index ca63fd30e70a..d7638b7fa99d 100644 --- a/drivers/soc/imx/imx8m-blk-ctrl.c +++ b/drivers/soc/imx/imx8m-blk-ctrl.c @@ -502,7 +502,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mm_d= isp_blk_ctl_domain_data[] .gpc_name =3D "mipi-dsi", .rst_mask =3D BIT(5), .clk_mask =3D BIT(8) | BIT(9), - .mipi_phy_rst_mask =3D BIT(17), + .mipi_phy_rst_mask =3D BIT(17) | BIT(16), }, [IMX8MM_DISPBLK_PD_MIPI_CSI] =3D { .name =3D "dispblk-mipi-csi", --=20 2.20.1 From nobody Sun May 10 14:25:15 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 123A2C433EF for ; Mon, 2 May 2022 10:03:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1384464AbiEBKGt (ORCPT ); Mon, 2 May 2022 06:06:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1384493AbiEBKG2 (ORCPT ); Mon, 2 May 2022 06:06:28 -0400 Received: from galois.linutronix.de (Galois.linutronix.de [193.142.43.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3A9015816; Mon, 2 May 2022 03:02:48 -0700 (PDT) From: Viraj Shah DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1651485767; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z6/BAB9p5q4hz+/n012rImtlYhnNEb1aerIdTRWZQ5U=; b=qevAM3ihOFB7k4QkmixlJCeSNX3FV/YJRZltA8wWRs0/xrZ0eRD1c3pJslidWpJoViM69+ 2vGMNhQtUgLsNvS6led+g9B65k+DD0j9r/uE0oREDJZRIIFVNFQ/FO15Izt8L703baE+6l kIp14BL8vFAD/kcocn/Sp31bHHt8lN12Pq0KONJcEYhV1mnLMCpm544H2Z2lRwRs+AaUC0 oWhvSGganj2BJJiqVv8QaugTbfisgeQI+LMbx6pDCETpp4C4DabHYvNs1M6HpZoFX5/5Eh E8GgNkVswJJw693ABmvgyzfVrN+9qZtHUd+ZgPqQTP4i21EqaIzrhPFf/12jyA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1651485767; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z6/BAB9p5q4hz+/n012rImtlYhnNEb1aerIdTRWZQ5U=; b=WeO5qxihZottFUJEZLEhgqozHQL0kBLD5lB+kOkd8WXIQkPXlbrJMWIvLpHlMpTD1Fon5R 8nB7eAbGo+LhTEBQ== To: shawnguo@kernel.org, s.hauer@pengutronix.de Cc: Pengutronix Kernel Team , Rob Herring , Krzysztof Kozlowski , Fabio Estevam , NXP Linux Team , Lucas Stach , Adam Ford , Tim Harvey , Peng Fan , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 4/4] arm64: dts: imx8mm.dtsi: Add resets for dispmix power domain. Date: Mon, 2 May 2022 12:02:33 +0200 Message-Id: <20220502100233.6023-5-viraj.shah@linutronix.de> In-Reply-To: <20220502100233.6023-1-viraj.shah@linutronix.de> References: <20220502100233.6023-1-viraj.shah@linutronix.de> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The resets are controlled from src. From reference manual page 959, display controller needs DISP_RESET bit to be set to reset dispmix. Signed-off-by: Viraj Shah --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dt= s/freescale/imx8mm.dtsi index 1ee05677c2dd..11a6cae5bb99 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -734,6 +734,7 @@ assigned-clock-parents =3D <&clk IMX8MM_SYS_PLL2_1000M>, <&clk IMX8MM_SYS_PLL1_800M>; assigned-clock-rates =3D <500000000>, <200000000>; + resets =3D <&src IMX8MQ_RESET_DISP_RESET>; }; =20 pgc_mipi: power-domain@11 { --=20 2.20.1