From nobody Sun May 10 17:10:16 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88B0CC433EF for ; Thu, 28 Apr 2022 12:29:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346280AbiD1Mck (ORCPT ); Thu, 28 Apr 2022 08:32:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346236AbiD1Mch (ORCPT ); Thu, 28 Apr 2022 08:32:37 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id E4C1BAF1EA for ; Thu, 28 Apr 2022 05:29:20 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8A691474; Thu, 28 Apr 2022 05:29:20 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id F341C3F73B; Thu, 28 Apr 2022 05:29:19 -0700 (PDT) From: Sudeep Holla To: linux-kernel@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Cristian Marussi Subject: [PATCH] firmware: arm_scmi: Set clock latency to U32_MAX if it is not supported Date: Thu, 28 Apr 2022 13:29:13 +0100 Message-Id: <20220428122913.1654821-1-sudeep.holla@arm.com> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" As per the spec, the clock_enable_delay is the worst case latency incurred by the platform to enable the clock. The value of 0 indicates that the platform doesn't support the same and must be considered as maximum latency for practical purposes. Currently the value of 0 is assigned as is and is propogated to the clock framework which can assume that the clock can support atomic enable operati= on. Fixes: 18f295b758b2 ("firmware: arm_scmi: Add support for clock_enable_late= ncy") Signed-off-by: Sudeep Holla --- drivers/firmware/arm_scmi/clock.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/firmware/arm_scmi/clock.c b/drivers/firmware/arm_scmi/= clock.c index 7a031afff389..2460979eabd2 100644 --- a/drivers/firmware/arm_scmi/clock.c +++ b/drivers/firmware/arm_scmi/clock.c @@ -6,6 +6,7 @@ */ =20 #include +#include #include =20 #include "protocols.h" @@ -128,12 +129,13 @@ static int scmi_clock_attributes_get(const struct scm= i_protocol_handle *ph, =20 ret =3D ph->xops->do_xfer(ph, t); if (!ret) { + u32 latency; attributes =3D le32_to_cpu(attr->attributes); strlcpy(clk->name, attr->name, SCMI_MAX_STR_SIZE); /* Is optional field clock_enable_latency provided ? */ if (t->rx.len =3D=3D sizeof(*attr)) - clk->enable_latency =3D - le32_to_cpu(attr->clock_enable_latency); + latency =3D le32_to_cpu(attr->clock_enable_latency); + clk->enable_latency =3D latency ? : U32_MAX; } =20 ph->xops->xfer_put(ph, t); --=20 2.36.0