From nobody Sun Sep 22 06:25:36 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7103EC433EF for ; Thu, 28 Apr 2022 11:56:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345846AbiD1MAL (ORCPT ); Thu, 28 Apr 2022 08:00:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345825AbiD1L7p (ORCPT ); Thu, 28 Apr 2022 07:59:45 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 46C1C887A6; Thu, 28 Apr 2022 04:56:30 -0700 (PDT) X-UUID: 2be2f4b9a9a448df9e57ff50c77e673c-20220428 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:7dfe9004-a985-4d08-bea0-e4066bddad12,OB:10,L OB:20,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,RULE:Release_Ham ,ACTION:release,TS:75 X-CID-INFO: VERSION:1.1.4,REQID:7dfe9004-a985-4d08-bea0-e4066bddad12,OB:10,LOB :20,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,RULE:Spam_GS981B3D ,ACTION:quarantine,TS:75 X-CID-META: VersionHash:faefae9,CLOUDID:d1590c2f-6199-437e-8ab4-9920b4bc5b76,C OID:18ab788ef88d,Recheck:0,SF:28|17|19|48,TC:nil,Content:0,EDM:-3,File:nil ,QS:0,BEC:nil X-UUID: 2be2f4b9a9a448df9e57ff50c77e673c-20220428 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 741375591; Thu, 28 Apr 2022 19:56:23 +0800 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Thu, 28 Apr 2022 19:56:22 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 28 Apr 2022 19:56:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 28 Apr 2022 19:56:21 +0800 From: Rex-BC Chen To: , , , , CC: , , , , , , , , , , , Rex-BC Chen Subject: [PATCH V5 02/16] clk: mediatek: reset: Fix written reset bit offset Date: Thu, 28 Apr 2022 19:56:05 +0800 Message-ID: <20220428115620.13512-3-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220428115620.13512-1-rex-bc.chen@mediatek.com> References: <20220428115620.13512-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Original assert/deassert bit is BIT(0), but it's more resonable to modify them to BIT(id % 32) which is based on id. This patch will not influence any previous driver because the reset is only used for thermal. The id (MT8183_INFRACFG_AO_THERM_SW_RST) is 0. Fixes: 64ebb57a3df6 ("clk: reset: Modify reset-controller driver") Signed-off-by: Rex-BC Chen Reviewed-by: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/reset.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/mediatek/reset.c b/drivers/clk/mediatek/reset.c index 9f3cb22aea1b..5191becb45dd 100644 --- a/drivers/clk/mediatek/reset.c +++ b/drivers/clk/mediatek/reset.c @@ -18,7 +18,7 @@ static int mtk_reset_assert_set_clr(struct reset_controll= er_dev *rcdev, struct mtk_reset *data =3D container_of(rcdev, struct mtk_reset, rcdev); unsigned int reg =3D data->regofs + ((id / 32) << 4); =20 - return regmap_write(data->regmap, reg, 1); + return regmap_write(data->regmap, reg, BIT(id % 32)); } =20 static int mtk_reset_deassert_set_clr(struct reset_controller_dev *rcdev, @@ -27,7 +27,7 @@ static int mtk_reset_deassert_set_clr(struct reset_contro= ller_dev *rcdev, struct mtk_reset *data =3D container_of(rcdev, struct mtk_reset, rcdev); unsigned int reg =3D data->regofs + ((id / 32) << 4) + 0x4; =20 - return regmap_write(data->regmap, reg, 1); + return regmap_write(data->regmap, reg, BIT(id % 32)); } =20 static int mtk_reset_assert(struct reset_controller_dev *rcdev, --=20 2.18.0