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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id fx3-20020a170906b74300b006daecedee44sm4386885ejb.220.2022.04.25.23.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Apr 2022 23:42:44 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Taniya Das , Ansuel Smith , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Rob Herring Subject: [PATCH v2] dt-bindings: clock: qcom,gcc-apq8064: Fix typo in compatible and split apq8084 Date: Tue, 26 Apr 2022 08:42:41 +0200 Message-Id: <20220426064241.6379-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The qcom,gcc-apq8064.yaml was meant to describe only APQ8064 and APQ8084 should have slightly different bindings (without Qualcomm thermal sensor device). Add new bindings for APQ8084. Fixes: a469bf89a009 ("dt-bindings: clock: simplify qcom,gcc-apq8064 Documen= tation") Reported-by: Rob Herring Signed-off-by: Krzysztof Kozlowski --- Changes since v1: 1. Correct Taniya's email. 2. Correct chipset name in description. 3. Extend commit msg. --- .../bindings/clock/qcom,gcc-apq8064.yaml | 4 +- ...gcc-apq8064.yaml =3D> qcom,gcc-apq8084.yaml} | 57 +++++-------------- 2 files changed, 16 insertions(+), 45 deletions(-) copy Documentation/devicetree/bindings/clock/{qcom,gcc-apq8064.yaml =3D> q= com,gcc-apq8084.yaml} (31%) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml = b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml index 97936411b6b4..9fafcb080069 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml @@ -20,12 +20,10 @@ description: | See also: - dt-bindings/clock/qcom,gcc-msm8960.h - dt-bindings/reset/qcom,gcc-msm8960.h - - dt-bindings/clock/qcom,gcc-apq8084.h - - dt-bindings/reset/qcom,gcc-apq8084.h =20 properties: compatible: - const: qcom,gcc-apq8084 + const: qcom,gcc-apq8064 =20 nvmem-cells: minItems: 1 diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml = b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml similarity index 31% copy from Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml copy to Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml index 97936411b6b4..397fb918e032 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml @@ -1,69 +1,42 @@ -# SPDX-License-Identifier: GPL-2.0-only +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# +$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: Qualcomm Global Clock & Reset Controller Binding for APQ8064 - -allOf: - - $ref: qcom,gcc.yaml# +title: Qualcomm Global Clock & Reset Controller Binding for APQ8084 =20 maintainers: - Stephen Boyd - - Taniya Das + - Taniya Das =20 description: | Qualcomm global clock control module which supports the clocks, resets a= nd - power domains on APQ8064. + power domains on APQ8084. =20 - See also: - - dt-bindings/clock/qcom,gcc-msm8960.h - - dt-bindings/reset/qcom,gcc-msm8960.h + See also:: - dt-bindings/clock/qcom,gcc-apq8084.h - dt-bindings/reset/qcom,gcc-apq8084.h =20 +allOf: + - $ref: qcom,gcc.yaml# + properties: compatible: const: qcom,gcc-apq8084 =20 - nvmem-cells: - minItems: 1 - maxItems: 2 - description: - Qualcomm TSENS (thermal sensor device) on some devices can - be part of GCC and hence the TSENS properties can also be part - of the GCC/clock-controller node. - For more details on the TSENS properties please refer - Documentation/devicetree/bindings/thermal/qcom-tsens.yaml - - nvmem-cell-names: - minItems: 1 - items: - - const: calib - - const: calib_backup - - '#thermal-sensor-cells': - const: 1 - required: - compatible - - nvmem-cells - - nvmem-cell-names - - '#thermal-sensor-cells' =20 unevaluatedProperties: false =20 examples: - | - clock-controller@900000 { - compatible =3D "qcom,gcc-apq8064"; - reg =3D <0x00900000 0x4000>; - nvmem-cells =3D <&tsens_calib>, <&tsens_backup>; - nvmem-cell-names =3D "calib", "calib_backup"; - #clock-cells =3D <1>; - #reset-cells =3D <1>; - #power-domain-cells =3D <1>; - #thermal-sensor-cells =3D <1>; + clock-controller@fc400000 { + compatible =3D "qcom,gcc-apq8084"; + reg =3D <0xfc400000 0x4000>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; }; ... --=20 2.32.0