From nobody Sun Sep 22 05:26:43 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4569C433F5 for ; Fri, 22 Apr 2022 05:57:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232895AbiDVGAT (ORCPT ); Fri, 22 Apr 2022 02:00:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40810 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232867AbiDVGAS (ORCPT ); Fri, 22 Apr 2022 02:00:18 -0400 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7657F4F9D3 for ; Thu, 21 Apr 2022 22:57:21 -0700 (PDT) X-UUID: a9986424912d4c1f949925f5bc60b0ea-20220422 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.4,REQID:e6c3c661-54aa-4302-901a-34cec739af94,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:-20,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,AC TION:release,TS:-20 X-CID-META: VersionHash:faefae9,CLOUDID:7ae4bcef-06b0-4305-bfbf-554bfc9d151a,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,File:nil,QS:0,BEC:nil X-UUID: a9986424912d4c1f949925f5bc60b0ea-20220422 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2032270726; Fri, 22 Apr 2022 13:57:16 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 22 Apr 2022 13:57:15 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 22 Apr 2022 13:57:15 +0800 From: Tinghan Shen To: Pierre-Louis Bossart , Liam Girdwood , Ranjani Sridharan , Kai Vehmanen , Daniel Baluta , Mark Brown , Jaroslav Kysela , Takashi Iwai , Matthias Brugger , YC Hung , Allen-KH Cheng , Tinghan Shen , =?UTF-8?q?P=C3=A9ter=20Ujfalusi?= , "Geert Uytterhoeven" CC: , , , , , Subject: [PATCH v1 2/4] ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp ops Date: Fri, 22 Apr 2022 13:56:57 +0800 Message-ID: <20220422055659.8738-3-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20220422055659.8738-1-tinghan.shen@mediatek.com> References: <20220422055659.8738-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add mt8186-loader module with ops callback to load and run firmware on mt8186 SoC. Signed-off-by: Allen-KH Cheng Signed-off-by: Tinghan Shen Reviewed-by: Ranjani Sridharan Reviewed-by: Yaochun Hung Reviewed-by: Pierre-Louis Bossart --- sound/soc/sof/mediatek/mt8186/Makefile | 2 +- sound/soc/sof/mediatek/mt8186/mt8186-loader.c | 53 +++++++++++++++++++ sound/soc/sof/mediatek/mt8186/mt8186.c | 18 +++++++ sound/soc/sof/mediatek/mt8186/mt8186.h | 3 ++ 4 files changed, 75 insertions(+), 1 deletion(-) create mode 100644 sound/soc/sof/mediatek/mt8186/mt8186-loader.c diff --git a/sound/soc/sof/mediatek/mt8186/Makefile b/sound/soc/sof/mediate= k/mt8186/Makefile index e0e971c17d5e..03a12f2096f9 100644 --- a/sound/soc/sof/mediatek/mt8186/Makefile +++ b/sound/soc/sof/mediatek/mt8186/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) -snd-sof-mt8186-objs :=3D mt8186.o +snd-sof-mt8186-objs :=3D mt8186.o mt8186-loader.o obj-$(CONFIG_SND_SOC_SOF_MT8186) +=3D snd-sof-mt8186.o =20 diff --git a/sound/soc/sof/mediatek/mt8186/mt8186-loader.c b/sound/soc/sof/= mediatek/mt8186/mt8186-loader.c new file mode 100644 index 000000000000..6ab4921b1010 --- /dev/null +++ b/sound/soc/sof/mediatek/mt8186/mt8186-loader.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) +// +// Copyright (c) 2022 Mediatek Corporation. All rights reserved. +// +// Author: Allen-KH Cheng +// Tinghan Shen +// +// Hardware interface for mt8186 DSP code loader + +#include +#include "mt8186.h" +#include "../../ops.h" + +void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr) +{ + /* set RUNSTALL to stop core */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, + RUNSTALL, RUNSTALL); + + /* set core boot address */ + snd_sof_dsp_write(sdev, DSP_SECREG_BAR, ADSP_ALTVEC_C0, boot_addr); + snd_sof_dsp_write(sdev, DSP_SECREG_BAR, ADSP_ALTVECSEL, ADSP_ALTVECSEL_C0= ); + + /* assert core reset */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, + SW_RSTN_C0 | SW_DBG_RSTN_C0, + SW_RSTN_C0 | SW_DBG_RSTN_C0); + + /* hardware requirement */ + udelay(1); + + /* release core reset */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, + SW_RSTN_C0 | SW_DBG_RSTN_C0, + 0); + + /* clear RUNSTALL (bit31) to start core */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, + RUNSTALL, 0); +} + +void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev) +{ + /* set RUNSTALL to stop core */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG, + RUNSTALL, RUNSTALL); + + /* assert core reset */ + snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_CFGREG_SW_RSTN, + SW_RSTN_C0 | SW_DBG_RSTN_C0, + SW_RSTN_C0 | SW_DBG_RSTN_C0); +} + diff --git a/sound/soc/sof/mediatek/mt8186/mt8186.c b/sound/soc/sof/mediate= k/mt8186/mt8186.c index 60021195e0b5..892cd7d79994 100644 --- a/sound/soc/sof/mediatek/mt8186/mt8186.c +++ b/sound/soc/sof/mediatek/mt8186/mt8186.c @@ -204,6 +204,17 @@ static int adsp_shared_base_ioremap(struct platform_de= vice *pdev, void *data) return 0; } =20 +static int mt8186_run(struct snd_sof_dev *sdev) +{ + u32 adsp_bootup_addr; + + adsp_bootup_addr =3D SRAM_PHYS_BASE_FROM_DSP_VIEW; + dev_dbg(sdev->dev, "HIFIxDSP boot from base : 0x%08X\n", adsp_bootup_addr= ); + sof_hifixdsp_boot_sequence(sdev, adsp_bootup_addr); + + return 0; +} + static int mt8186_dsp_probe(struct snd_sof_dev *sdev) { struct platform_device *pdev =3D container_of(sdev->dev, struct platform_= device, dev); @@ -272,6 +283,7 @@ static int mt8186_dsp_probe(struct snd_sof_dev *sdev) =20 static int mt8186_dsp_remove(struct snd_sof_dev *sdev) { + sof_hifixdsp_shutdown(sdev); adsp_sram_power_off(sdev); =20 return 0; @@ -289,6 +301,9 @@ static struct snd_sof_dsp_ops sof_mt8186_ops =3D { .probe =3D mt8186_dsp_probe, .remove =3D mt8186_dsp_remove, =20 + /* DSP core boot */ + .run =3D mt8186_run, + /* Block IO */ .block_read =3D sof_block_read, .block_write =3D sof_block_write, @@ -302,6 +317,9 @@ static struct snd_sof_dsp_ops sof_mt8186_ops =3D { /* misc */ .get_bar_index =3D mt8186_get_bar_index, =20 + /* firmware loading */ + .load_firmware =3D snd_sof_load_firmware_memcpy, + /* Firmware ops */ .dsp_arch_ops =3D &sof_xtensa_arch_ops, =20 diff --git a/sound/soc/sof/mediatek/mt8186/mt8186.h b/sound/soc/sof/mediate= k/mt8186/mt8186.h index 40ea7cb9295b..df52ae9659e4 100644 --- a/sound/soc/sof/mediatek/mt8186/mt8186.h +++ b/sound/soc/sof/mediatek/mt8186/mt8186.h @@ -10,6 +10,7 @@ #define __MT8186_H =20 struct mtk_adsp_chip_info; +struct snd_sof_dev; =20 #define DSP_REG_BAR 4 #define DSP_SECREG_BAR 5 @@ -74,4 +75,6 @@ struct mtk_adsp_chip_info; #define SIZE_SHARED_DRAM_UL 0x40000 /*Shared buffer for Uplink*/ #define TOTAL_SIZE_SHARED_DRAM_FROM_TAIL (SIZE_SHARED_DRAM_DL + SIZE_SHARE= D_DRAM_UL) =20 +void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr); +void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev); #endif --=20 2.18.0