From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9CCFEC433F5 for ; Thu, 21 Apr 2022 14:10:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389036AbiDUONg (ORCPT ); Thu, 21 Apr 2022 10:13:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389111AbiDUONI (ORCPT ); Thu, 21 Apr 2022 10:13:08 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84D003968F for ; Thu, 21 Apr 2022 07:10:18 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id j8-20020a17090a060800b001cd4fb60dccso5290088pjj.2 for ; Thu, 21 Apr 2022 07:10:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vhqdV4bppKv2NJnLqEsRygbCN8xm6iT8adOuIjwb7P4=; b=V96tI2wYuISOCbp1lDUZQBAMHT+LAjVjqnuxRitXqkXtuPpJY0DSTgsv4UZv7duHH2 JtoQcoh/Cz1vhiAoJF3ghX2h0j9Q9yM2J0qQpHhWaTTq+ZvEvMI+7YRTXvPkDlDDGfQw Qd1/yvUVZlkbGmFiT1suuTurm5A3PueJPKlqNGIY7eEwzYVvf61nrYPlqz4NUp0dSYPu deL1/H92jw7OFBC1Y/0yC+C55BWtz3v/8YtWrmIQRBBLVML/RTDVt7dg00EGha8eAxBb uHuAUtMVTY7qyEtcloQG+jt6LmVHPsMk6SriskmsKR+ZFa0Kob/d7cq4Tf4yGur0Ik+1 hCLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vhqdV4bppKv2NJnLqEsRygbCN8xm6iT8adOuIjwb7P4=; b=jtacY+NKkcPfOqANojcDItqIcRa1D7gJlSv1kAgs3iX4a1NboODfxQrsB5ZA+R9PPs Cvk2LiNnTizuMTPxvreOJF9bPc65weiXmTxVmg/GV0HKloKRVlp38n5n+WKFMv52Wb1z t63SUOAE83PcFWsgfzNc4aFTMQJHi8sr0Tjz6tHHqjglMFnCfS9odNIuQ00uuHSgyzYD CuD1jjRmxwO0rPvShCGxbnlbHE+Ibcu+g1AmM5C/VHFWbMGccg1gtBOou9emKn2YsPYU GhWlLq9yHfVU1wdEbJeX2LzTYzPrzWU+C2D3cVFvVTEBMR/a2xFfzCE7ybixSQMo1QIP oTwA== X-Gm-Message-State: AOAM530gV/isKkkkaPIshAByj5z3XyaQ3O1+vEMsZHs9c47n3w+d/IEk y5L9PQo3Hn5JVRheIDh2ahQBlYH/UB0= X-Google-Smtp-Source: ABdhPJzs7x0iUgxo54kX5jLiEBQ7imBeXRblDMU6hzS7hH3vxGJzrTfIg4iBybrw08BAhIE5lE8pUw== X-Received: by 2002:a17:902:f690:b0:158:d6ee:b1f9 with SMTP id l16-20020a170902f69000b00158d6eeb1f9mr25232846plg.80.1650550217898; Thu, 21 Apr 2022 07:10:17 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id a133-20020a621a8b000000b0050acaab7b29sm6288193pfa.31.2022.04.21.07.10.16 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:10:17 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" , "Kirill A. Shutemov" , Fenghua Yu , "Chang S. Bae" Subject: [PATCH V6 1/8] x86/traps: Move pt_regs only in fixup_bad_iret() Date: Thu, 21 Apr 2022 22:10:48 +0800 Message-Id: <20220421141055.316239-2-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan Always stash the address error_entry() is going to return to, in %r12 and get rid of the void *error_entry_ret; slot in struct bad_iret_stack which was supposed to account for it and pt_regs pushed on the stack. After this, both fixup_bad_iret() and sync_regs() can work on a struct pt_regs pointer directly. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 5 ++++- arch/x86/include/asm/traps.h | 2 +- arch/x86/kernel/traps.c | 18 ++++++------------ 3 files changed, 11 insertions(+), 14 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 73d958522b6a..ecbfca3cc18c 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -1061,9 +1061,12 @@ SYM_CODE_START_LOCAL(error_entry) * Pretend that the exception came from user mode: set up pt_regs * as if we faulted immediately after IRET. */ - mov %rsp, %rdi + popq %r12 /* save return addr in %12 */ + movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ call fixup_bad_iret mov %rax, %rsp + ENCODE_FRAME_POINTER + pushq %r12 jmp .Lerror_entry_from_usermode_after_swapgs SYM_CODE_END(error_entry) =20 diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 35317c5c551d..47ecfff2c83d 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h @@ -13,7 +13,7 @@ #ifdef CONFIG_X86_64 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *ere= gs); asmlinkage __visible notrace -struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s); +struct pt_regs *fixup_bad_iret(struct pt_regs *bad_regs); void __init trap_init(void); asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_r= egs *eregs); #endif diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index a4e2efde5d1f..111b18d57a54 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -898,13 +898,7 @@ asmlinkage __visible noinstr struct pt_regs *vc_switch= _off_ist(struct pt_regs *r } #endif =20 -struct bad_iret_stack { - void *error_entry_ret; - struct pt_regs regs; -}; - -asmlinkage __visible noinstr -struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) +asmlinkage __visible noinstr struct pt_regs *fixup_bad_iret(struct pt_regs= *bad_regs) { /* * This is called from entry_64.S early in handling a fault @@ -914,19 +908,19 @@ struct bad_iret_stack *fixup_bad_iret(struct bad_iret= _stack *s) * just below the IRET frame) and we want to pretend that the * exception came from the IRET target. */ - struct bad_iret_stack tmp, *new_stack =3D - (struct bad_iret_stack *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; + struct pt_regs tmp, *new_stack =3D + (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; =20 /* Copy the IRET target to the temporary storage. */ - __memcpy(&tmp.regs.ip, (void *)s->regs.sp, 5*8); + __memcpy(&tmp.ip, (void *)bad_regs->sp, 5*8); =20 /* Copy the remainder of the stack from the current stack. */ - __memcpy(&tmp, s, offsetof(struct bad_iret_stack, regs.ip)); + __memcpy(&tmp, bad_regs, offsetof(struct pt_regs, ip)); =20 /* Update the entry stack */ __memcpy(new_stack, &tmp, sizeof(tmp)); =20 - BUG_ON(!user_mode(&new_stack->regs)); + BUG_ON(!user_mode(new_stack)); return new_stack; } #endif --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8FC45C433EF for ; Thu, 21 Apr 2022 14:10:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389053AbiDUONj (ORCPT ); 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Thu, 21 Apr 2022 07:10:23 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V6 2/8] x86/entry: Switch the stack after error_entry() returns Date: Thu, 21 Apr 2022 22:10:49 +0800 Message-Id: <20220421141055.316239-3-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan error_entry() calls sync_regs(), and fixup_bad_iret() before sync_regs() if it is a fault from bad IRET, to copy the pt_regs to the kernel stack and switches the kernel stack directly after sync_regs(). But error_entry() itself is also a function call, so the code has to stash the address error_entry() is going to return to, in %r12 and makes the work complicated. Move the code of switching stack after error_entry() and get rid of the need to handle the return address. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index ecbfca3cc18c..ca3e99e08a44 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -326,6 +326,8 @@ SYM_CODE_END(ret_from_fork) .macro idtentry_body cfunc has_error_code:req =20 call error_entry + movq %rax, %rsp /* switch to the task stack if from userspace */ + ENCODE_FRAME_POINTER UNWIND_HINT_REGS =20 movq %rsp, %rdi /* pt_regs pointer into 1st argument*/ @@ -1002,14 +1004,10 @@ SYM_CODE_START_LOCAL(error_entry) /* We have user CR3. Change to kernel CR3. */ SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax =20 + leaq 8(%rsp), %rdi /* arg0 =3D pt_regs pointer */ .Lerror_entry_from_usermode_after_swapgs: /* Put us onto the real thread stack. */ - popq %r12 /* save return addr in %12 */ - movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ call sync_regs - movq %rax, %rsp /* switch stack */ - ENCODE_FRAME_POINTER - pushq %r12 RET =20 /* @@ -1041,6 +1039,7 @@ SYM_CODE_START_LOCAL(error_entry) */ .Lerror_entry_done_lfence: FENCE_SWAPGS_KERNEL_ENTRY + leaq 8(%rsp), %rax /* return pt_regs pointer */ RET =20 .Lbstep_iret: @@ -1061,12 +1060,9 @@ SYM_CODE_START_LOCAL(error_entry) * Pretend that the exception came from user mode: set up pt_regs * as if we faulted immediately after IRET. */ - popq %r12 /* save return addr in %12 */ - movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ + leaq 8(%rsp), %rdi /* arg0 =3D pt_regs pointer */ call fixup_bad_iret - mov %rax, %rsp - ENCODE_FRAME_POINTER - pushq %r12 + mov %rax, %rdi jmp .Lerror_entry_from_usermode_after_swapgs SYM_CODE_END(error_entry) =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 659A8C433EF for ; Thu, 21 Apr 2022 14:10:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1388997AbiDUONc (ORCPT ); Thu, 21 Apr 2022 10:13:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389159AbiDUONU (ORCPT ); Thu, 21 Apr 2022 10:13:20 -0400 Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F4B339801 for ; Thu, 21 Apr 2022 07:10:31 -0700 (PDT) Received: by mail-pj1-x1034.google.com with SMTP id z5-20020a17090a468500b001d2bc2743c4so5327629pjf.0 for ; Thu, 21 Apr 2022 07:10:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yX2Rm860a2FPnjvkxlraogE+1n6tD0A0599HJAgUvAg=; b=jsT0ubLxYr2PAs9MQccEF/bY8DOmorhOBKB14fD8aQWyoKeApKk6LINvqcZMdAwz9d nnxKCOmlmkloQeczjlFnH6NDffKoT6LAWZ26v5BnLd/b3APNUiG9XeGPo5xU9sj6i8HL 7nG3Oa1I61OQsHgJ+YKuoz0/WUh2S3a6PSoxSLvIfjCedec9vordx7W3y1gIQEds43pQ bWOcyvv982Wfq+HnaOkv/wy09E85kLwaJRIJVMuErfLU/7fCywmOa30MUf5Eg5LspkEu ea9bFfAKBI69Um2hyVLxE1pY3HZb9p5SGp6WKcJSSpz1r6v3SrlGu6K49GbAllDeUMop 4kZg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yX2Rm860a2FPnjvkxlraogE+1n6tD0A0599HJAgUvAg=; b=oC6VizmwNeNN7Hgq6leWR+IQ8ZGEScLqGAf68NgI7DGupIoo8whajccDIBzCYrTxn4 fsH+VauPWwKsJ8reeP5AE3OMb9HegHDPzIthOxIWpbxIj+e7NN9U3BfNbxMqBWBRvYUl YIufk0cBjn5c/ymUzz/JFA7SWbQ0dcqf8oRUHmzx10YW5zwIyjTvf2uKmD+b5wa0tiaI E1AJCIFA6Jfc18jwqTPauZU3Ut66gdQSvB5h4UNaT+Imy+ZIoIl4T19S8jEQ4F8Msp2S kcTMtyL//Cwa4M8+nqmzVX/bW7nrW2tNXhMCS7nS5tpKVlO/WdOzG7WR1YjRY8Oe26B6 BBfQ== X-Gm-Message-State: AOAM532sruqnq0HMw6P7JRYepK+KhsELwDDbeNxwECJnoK3JICmUAjR/ +dI2+RKs6zlnQBC1ytREMsWjO8V0JTc= X-Google-Smtp-Source: ABdhPJwfysNYrUkSwt0GfUQ2TixKQwWoHFBsUZM/qYLpobWdN/RLLTd6L2lItR6rceTlAxKof9hh7g== X-Received: by 2002:a17:90b:4c45:b0:1d2:acdc:71d4 with SMTP id np5-20020a17090b4c4500b001d2acdc71d4mr10685468pjb.39.1650550230497; Thu, 21 Apr 2022 07:10:30 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id 64-20020a17090a0fc600b001d5f22845bdsm2671853pjz.1.2022.04.21.07.10.29 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:10:30 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V6 3/8] x86/entry: Move PUSH_AND_CLEAR_REGS out of error_entry() Date: Thu, 21 Apr 2022 22:10:50 +0800 Message-Id: <20220421141055.316239-4-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan The macro idtentry calls error_entry() unconditionally even on XENPV. But the code XENPV needs in error_entry() is PUSH_AND_CLEAR_REGS only. And error_entry() also calls sync_regs() which has to deal with the case of XENPV via an extra branch so that it doesn't copy the pt_regs. And PUSH_AND_CLEAR_REGS in error_entry() makes the stack not return to its original place when the function returns, which means it is not possible to convert it to a C function. Move PUSH_AND_CLEAR_REGS out of error_entry(), add a function to wrap PUSH_AND_CLEAR_REGS and call it before error_entry(). The new function call adds two instructions (CALL and RET) for every interrupt or exception. It will allow for error_entry() to be not called on XENPV which allows for sync_regs() to reduce a branch. It will also allow for error_entry() to be converted to C code that can use inlined sync_regs() and save a function call again. Cc: Juergen Gross Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index ca3e99e08a44..b1cef3b0a7ab 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -318,6 +318,14 @@ SYM_CODE_END(ret_from_fork) #endif .endm =20 +/* Save all registers in pt_regs */ +SYM_CODE_START_LOCAL(push_and_clear_regs) + UNWIND_HINT_FUNC + PUSH_AND_CLEAR_REGS save_ret=3D1 + ENCODE_FRAME_POINTER 8 + RET +SYM_CODE_END(push_and_clear_regs) + /** * idtentry_body - Macro to emit code calling the C function * @cfunc: C function to be called @@ -325,6 +333,9 @@ SYM_CODE_END(ret_from_fork) */ .macro idtentry_body cfunc has_error_code:req =20 + call push_and_clear_regs + UNWIND_HINT_REGS + call error_entry movq %rax, %rsp /* switch to the task stack if from userspace */ ENCODE_FRAME_POINTER @@ -985,13 +996,11 @@ SYM_CODE_START_LOCAL(paranoid_exit) SYM_CODE_END(paranoid_exit) =20 /* - * Save all registers in pt_regs, and switch GS if needed. + * Switch GS and CR3 if needed. */ SYM_CODE_START_LOCAL(error_entry) UNWIND_HINT_FUNC cld - PUSH_AND_CLEAR_REGS save_ret=3D1 - ENCODE_FRAME_POINTER 8 testb $3, CS+8(%rsp) jz .Lerror_kernelspace =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DC128C433F5 for ; Thu, 21 Apr 2022 14:10:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354323AbiDUONq (ORCPT ); Thu, 21 Apr 2022 10:13:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1388989AbiDUONc (ORCPT ); Thu, 21 Apr 2022 10:13:32 -0400 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8DE3B39801 for ; Thu, 21 Apr 2022 07:10:37 -0700 (PDT) Received: by mail-pf1-x42d.google.com with SMTP id j17so5111469pfi.9 for ; Thu, 21 Apr 2022 07:10:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xotWSQoi2wlC3vMI8lQ8RpO96nR6JNjKt6GYA46wjrE=; b=pjNI1Q77AFi1u+2joRb0n9LSA4X44lF8YcvmFtsrruF/a/zCTo5TK5y5YqePbWVxmY YDSgkD0uIWOyy7ksc2kRKGtVYubOS13sQfyEuXJbnEK0YJDWcJoT+OmXPHMy98yL4j+x d4FoRqX/+hfZLxwgwm7E6TeDCZAeeMjiv7S1yhN2Jh+RD63jE/7FSBMKwGd2mXdDL1gV TIgcQOM12/b/8RA3t0DpMZG++C5r47qKmKNHTU5vPGvRX4G0tBUbGcF4dzP1ZgNLVph7 D+H9ZItAjMy7kOGJL+RueOqGvZIAiJCHxzxlgxK669spcxZYaRBf1zQwsrMdtwO/Q8Om 6hqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xotWSQoi2wlC3vMI8lQ8RpO96nR6JNjKt6GYA46wjrE=; b=t6d59nKsoP7NwUHExNMMFXNqNwqtRUYWAVjHZaUVzxE9A0cuO/SPlnr6Jh6bGba3LV b2AtsdTMeqLREEXsAdPoNgTvdAn84C3mYufUCoy8WhJhbD7FnF6SVS+ox7K8Flcx9Jxy MkfECstBaKDL33ZmIbWOhjP2iMw3UzNktc6OAvaZQ2twKjh8+Nm2M1p2/VJsxy+vBQ5o 7/mVSEwt4JMmTgNKpjMlO1hnjbDCsUiOOlqND6l4K+vxMspKvPYm9KdeqEJ8uTkTv8em cdy1Th48uKJkYViZh/aSVqxFktkacUoIxEkc+3K0Z7vrDSCZo8QwuNpbF3Owbx0QpFk6 PnGg== X-Gm-Message-State: AOAM530NHXdaozUefqrIrTQ+CDgCD8lB0opQotv2/bMpoiWoH79QSlX9 B4DGXDx1NRffJMD6fmPbFhCkb/X24F0= X-Google-Smtp-Source: ABdhPJw83mvSMViR2B7qB7NFwgKLwu8gRFDFTiq5fcykxX1b8HibPFkvTIxPGHXq7xlNZ+v659WgSg== X-Received: by 2002:a63:4945:0:b0:398:efe8:3b7a with SMTP id y5-20020a634945000000b00398efe83b7amr24313534pgk.106.1650550236962; Thu, 21 Apr 2022 07:10:36 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id i1-20020a17090a650100b001cd8e9ea22asm2908963pjj.52.2022.04.21.07.10.36 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:10:36 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V6 4/8] x86/entry: Move cld to the start of idtentry macro Date: Thu, 21 Apr 2022 22:10:51 +0800 Message-Id: <20220421141055.316239-5-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan Make it next to CLAC Suggested-by: Peter Zijlstra Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index b1cef3b0a7ab..ab6ab6d3dab5 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -371,6 +371,7 @@ SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS offset=3D\has_error_code*8 ENDBR ASM_CLAC + cld =20 .if \has_error_code =3D=3D 0 pushq $-1 /* ORIG_RAX: no syscall to restart */ @@ -439,6 +440,7 @@ SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS ENDBR ASM_CLAC + cld =20 pushq $-1 /* ORIG_RAX: no syscall to restart */ =20 @@ -495,6 +497,7 @@ SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS ENDBR ASM_CLAC + cld =20 /* * If the entry is from userspace, switch stacks and treat it as @@ -557,6 +560,7 @@ SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS offset=3D8 ENDBR ASM_CLAC + cld =20 /* paranoid_entry returns GS information for paranoid_exit in EBX. */ call paranoid_entry @@ -882,7 +886,6 @@ SYM_CODE_END(xen_failsafe_callback) */ SYM_CODE_START_LOCAL(paranoid_entry) UNWIND_HINT_FUNC - cld PUSH_AND_CLEAR_REGS save_ret=3D1 ENCODE_FRAME_POINTER 8 =20 @@ -1000,7 +1003,6 @@ SYM_CODE_END(paranoid_exit) */ SYM_CODE_START_LOCAL(error_entry) UNWIND_HINT_FUNC - cld testb $3, CS+8(%rsp) jz .Lerror_kernelspace =20 @@ -1134,6 +1136,7 @@ SYM_CODE_START(asm_exc_nmi) */ =20 ASM_CLAC + cld =20 /* Use %rdx as our temp variable throughout */ pushq %rdx @@ -1153,7 +1156,6 @@ SYM_CODE_START(asm_exc_nmi) */ =20 swapgs - cld FENCE_SWAPGS_USER_ENTRY SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rdx movq %rsp, %rdx --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C476C433EF for ; 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Thu, 21 Apr 2022 07:10:43 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V6 5/8] x86/entry: Don't call error_entry() for XENPV Date: Thu, 21 Apr 2022 22:10:52 +0800 Message-Id: <20220421141055.316239-6-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan When in XENPV, it is already in the task stack, and it can't fault for native_iret() nor native_load_gs_index() since XENPV uses its own pvops for IRET and load_gs_index(). And it doesn't need to switch the CR3. So there is no reason to call error_entry() in XENPV. Cc: Juergen Gross Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index ab6ab6d3dab5..062aa9d95961 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -336,8 +336,17 @@ SYM_CODE_END(push_and_clear_regs) call push_and_clear_regs UNWIND_HINT_REGS =20 - call error_entry - movq %rax, %rsp /* switch to the task stack if from userspace */ + /* + * Call error_entry() and switch to the task stack if from userspace. + * + * When in XENPV, it is already in the task stack, and it can't fault + * for native_iret() nor native_load_gs_index() since XENPV uses its + * own pvops for IRET and load_gs_index(). And it doesn't need to + * switch the CR3. So it can skip invoking error_entry(). + */ + ALTERNATIVE "call error_entry; movq %rax, %rsp", \ + "", X86_FEATURE_XENPV + ENCODE_FRAME_POINTER UNWIND_HINT_REGS =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A4C7C433EF for ; Thu, 21 Apr 2022 14:11:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389004AbiDUOOE (ORCPT ); Thu, 21 Apr 2022 10:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50866 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389093AbiDUOOB (ORCPT ); Thu, 21 Apr 2022 10:14:01 -0400 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C88A3BBD1 for ; Thu, 21 Apr 2022 07:10:51 -0700 (PDT) Received: by mail-pg1-x52a.google.com with SMTP id g9so4725900pgc.10 for ; Thu, 21 Apr 2022 07:10:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GvPI5O7bc6LGIykxFdqKLQ/TYyAeta3g92krnAeVAuA=; b=LGWfT3TK3DeviWkajBNJhZgzCGZRdpR9GaR5Ev83VxnJ1tfR2Qyz7mR7k5z2oc0zVa GnGuboKEr02q4LBg3uVHhR4DKUxzg3km6pQwsxSBVcXoSOtpWoBGX0t4UC9EVly3sq+H NYqHZjM2V7KYQNFZRRP0CWoMra3J89piNMsZycSpIB2SeQfMjw3iuI3Zl6Bhcdx0oeKn nEGg2LwDCA5hm2M9TP5hrgda7lIKs4nJtf1MGrXljvwg14l15ecRLG6Bw5GODjduKFAM 8I4a+J5e+Y6TkZuFOzJ0xEn1aVZzsS6fsVgEvrb2HdmSn9n2rXedntnihkB1cWsSYpOY nGfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GvPI5O7bc6LGIykxFdqKLQ/TYyAeta3g92krnAeVAuA=; b=QvfuuSrklimmbhIvvF4UcqayiH1LI41XxhEjByk3D0fH32jeBuaRwicDdBpKyPhytS QL92m3T2zMxZG27y+BXo5P47JnZ0+AKNjPs57LwVg1JbaRMy6aKxOq+bzvXhKN7KP3d9 P8cbNydkJm7zil5ETQuZ8YV2TDq3L9z+QVjDxsqIHHidETzoRT0+/G5QspUxshRYifL3 oZO7JESR9OV0VwsagC/gJGLFO5F0kizTE4euU1u1qkDGEODuZfCyQthDSHM+JX4ql/ZI CsD670pWBq9ut0+tTWAjRtwgTAqJMfiEqPqO6YGGhneIexZ7YrYsGPl2DPZyH0X94Nua YPpg== X-Gm-Message-State: AOAM531TXB61IqYUUzYZHlE6uLTiaka37CHiSxIPY5ZWt2g+AX4VNmtO z98qh8ess7vf/KaZHSovYqYSbQv/y4Q= X-Google-Smtp-Source: ABdhPJzG4wScVdh4bCGcVi1HfKVqMqladVHf9o0jjUXDi545xRY+BTS4LT+OQP8eymwuLM9hinXoCg== X-Received: by 2002:a63:2a45:0:b0:3a9:f71e:a63d with SMTP id q66-20020a632a45000000b003a9f71ea63dmr18379206pgq.69.1650550250943; Thu, 21 Apr 2022 07:10:50 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id h10-20020a056a001a4a00b004f7c76f29c3sm24462527pfv.24.2022.04.21.07.10.49 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:10:50 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" , "Kirill A. Shutemov" Subject: [PATCH V6 6/8] x86/entry: Convert SWAPGS to swapgs and remove the definition of SWAPGS Date: Thu, 21 Apr 2022 22:10:53 +0800 Message-Id: <20220421141055.316239-7-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan XENPV doesn't use swapgs_restore_regs_and_return_to_usermode(), error_entry() and entry_SYSENTER_compat(). Change the PV-compatible SWAPGS to the ASM instruction swapgs in these functions. Also remove the definition of SWAPGS since there is no user of the SWAPGS anymore. Reviewed-by: Juergen Gross Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 6 +++--- arch/x86/entry/entry_64_compat.S | 2 +- arch/x86/include/asm/irqflags.h | 8 -------- 3 files changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 062aa9d95961..312186612f4e 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -1019,7 +1019,7 @@ SYM_CODE_START_LOCAL(error_entry) * We entered from user mode or we're pretending to have entered * from user mode due to an IRET fault. */ - SWAPGS + swapgs FENCE_SWAPGS_USER_ENTRY /* We have user CR3. Change to kernel CR3. */ SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax @@ -1051,7 +1051,7 @@ SYM_CODE_START_LOCAL(error_entry) * gsbase and proceed. We'll fix up the exception and land in * .Lgs_change's error handler with kernel gsbase. */ - SWAPGS + swapgs =20 /* * Issue an LFENCE to prevent GS speculation, regardless of whether it is= a @@ -1072,7 +1072,7 @@ SYM_CODE_START_LOCAL(error_entry) * We came from an IRET to user mode, so we have user * gsbase and CR3. Switch to kernel gsbase and CR3: */ - SWAPGS + swapgs FENCE_SWAPGS_USER_ENTRY SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax =20 diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_com= pat.S index 4fdb007cddbd..c5aeb0819707 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -50,7 +50,7 @@ SYM_CODE_START(entry_SYSENTER_compat) UNWIND_HINT_EMPTY ENDBR /* Interrupts are off on entry. */ - SWAPGS + swapgs =20 pushq %rax SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflag= s.h index 111104d1c2cd..7793e52d6237 100644 --- a/arch/x86/include/asm/irqflags.h +++ b/arch/x86/include/asm/irqflags.h @@ -137,14 +137,6 @@ static __always_inline void arch_local_irq_restore(uns= igned long flags) if (!arch_irqs_disabled_flags(flags)) arch_local_irq_enable(); } -#else -#ifdef CONFIG_X86_64 -#ifdef CONFIG_XEN_PV -#define SWAPGS ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV -#else -#define SWAPGS swapgs -#endif -#endif #endif /* !__ASSEMBLY__ */ =20 #endif --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23B25C433EF for ; Thu, 21 Apr 2022 14:11:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389164AbiDUOOL (ORCPT ); Thu, 21 Apr 2022 10:14:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389110AbiDUOOD (ORCPT ); Thu, 21 Apr 2022 10:14:03 -0400 Received: from mail-pg1-x52b.google.com (mail-pg1-x52b.google.com [IPv6:2607:f8b0:4864:20::52b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA26F3D1E1 for ; Thu, 21 Apr 2022 07:10:58 -0700 (PDT) Received: by mail-pg1-x52b.google.com with SMTP id t4so4756586pgc.1 for ; Thu, 21 Apr 2022 07:10:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6blxNsELEnRAkwWYLfPIZgUHCJanS2RvmmJ1WGnDFCs=; b=J+zVHJDKjdxQ/xxA0WB6tiMqi0tXsnGC5ntOWTzPMeGvL25IG/guLuFwCRPtxytOn3 hJoqD0p5jmL/GW+F1vFlwd7OhojY67bScTldZKOPSgGi+XP6ywwxTJe4lXFfmqvppNrI DaxpAAlzr0MQPrYxRz0wcfqppHHB5g2nzbll69WYxHpM0xZeHPiqEP/lo9AvwL5K31HW ICPmB2NSiqTQfOYm4knZzr5Maq5hKCK34rWZnM7iPtE9JZNTU7VrQtsX5nzQEf6iDJDz 2nm9JfvfSrQ710ujDRt1Oiid3PrKTVNUBJ1+dTDANYk8NpQMEtr/WeK44pbj2hGF9x2f /hzw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6blxNsELEnRAkwWYLfPIZgUHCJanS2RvmmJ1WGnDFCs=; b=A/TXkH4j+tMf5MukPI+RYN4QXDd3W2vUVBaRW7HJfx1puQYpktOWt/mwuefM4tDPwW pthlcgq5KsgbQ0ojlf2vjqW4ZrnIGfg/Iz/bRMy0/SPzio/e1uQ1eu5oLxBzQjHbf4F/ Sm/uCYh3GT+zklLZVmaAprbW9xtq9kWH4DV//VdiQoPqRGt+vSRZib210y0gTXBa2RZC HqmuXNKHBjcgG1CnQT0Vpz+joQsNDqTVaqBuoD/5qA3KDHfpBLjnRUMPzqfI6Ff05okI ScXh/z9V/m+x6nQwCchVy4QHDeOZ1dGi8us3R5QHAUsOT8TiI5Wg4nmsc9Y/8kDecm05 Uong== X-Gm-Message-State: AOAM533Rrrqh+1iBSq6fi5Mrbyxhf08zfmKssfGowl1y+yrwLNSIk6jn WB54lWSyxBDIrKtOcIzi7/Vn5mtjzbU= X-Google-Smtp-Source: ABdhPJw9rGpjUnipO6AtBzqacOXuKQit2v4T7x9aeAOIaknO+8c4uvn5lDYudQWu3IkE5cE1fnJ4bA== X-Received: by 2002:a65:6657:0:b0:381:1b99:3f04 with SMTP id z23-20020a656657000000b003811b993f04mr23694252pgv.512.1650550258279; Thu, 21 Apr 2022 07:10:58 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id k13-20020a056a00134d00b0050a5867dd73sm20428483pfu.157.2022.04.21.07.10.57 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:10:58 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" , "Kirill A. Shutemov" , Fenghua Yu , "Chang S. Bae" Subject: [PATCH V6 7/8] x86/entry: Remove the branch in sync_regs() Date: Thu, 21 Apr 2022 22:10:54 +0800 Message-Id: <20220421141055.316239-8-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan In non-XENPV, the tss.sp0 is always the trampoline stack, and sync_regs() is called on non-XENPV only since error_entry() is not called on XENPV, so the stack must be the trampoline stack or one of the IST stack if it is from user mode or bad iret. Remove the check in sync_regs() and always copy the pt_regs from the stack in the cpu entry area to the task stack. Cc: Juergen Gross Signed-off-by: Lai Jiangshan --- arch/x86/kernel/traps.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 111b18d57a54..e1cb4c009d54 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -845,13 +845,13 @@ DEFINE_IDTENTRY_RAW(exc_int3) /* * Help handler running on a per-cpu (IST or entry trampoline) stack * to switch to the normal thread stack if the interrupted code was in - * user mode. The actual stack switch is done in entry_64.S + * user mode. The actual stack switch is done in entry_64.S. */ asmlinkage __visible noinstr struct pt_regs *sync_regs(struct pt_regs *ere= gs) { struct pt_regs *regs =3D (struct pt_regs *)this_cpu_read(cpu_current_top_= of_stack) - 1; - if (regs !=3D eregs) - *regs =3D *eregs; + + *regs =3D *eregs; return regs; } =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 16 01:25:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D4ADBC433EF for ; Thu, 21 Apr 2022 14:11:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1389039AbiDUOOo (ORCPT ); Thu, 21 Apr 2022 10:14:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51384 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1389212AbiDUOOF (ORCPT ); Thu, 21 Apr 2022 10:14:05 -0400 Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C0963EBA9 for ; Thu, 21 Apr 2022 07:11:08 -0700 (PDT) Received: by mail-pl1-x62f.google.com with SMTP id u15so1591458ple.4 for ; Thu, 21 Apr 2022 07:11:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DVT4NECZaBEyFLjp9p66xD5Y1Fcie61kWtMgCTa876U=; b=ARiQRJDX9hfyXi7Q1abH2PQJb5EsDAUnhIfMR0UK31lEOZ2mKIWSV0jNcFqleh0/WQ EdiTrxBZlz3wuN+ohpXx2L/NmcXVkswz37LfSdqKGJN4zoECz7lnXFC2/6KIdiFWkFup toGG3HcGOL4kCNMxpdIk5aQYb0INpI4beDRHKm7L0f5S2cSysXyrawR9+brp7zFVRXZT Pu329wI8U/VK13HO2eox20buCGDQZzeYO6u/G/VrfV7VQxW3bHCHqmlxczuKuuz5IM28 +G9oDW3FBIIRLnCi+wp4KT31iM9nEjVotv7hPxzDpmkOcy0TTm5s/EXa4GSTe11w9RB2 llrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DVT4NECZaBEyFLjp9p66xD5Y1Fcie61kWtMgCTa876U=; b=Vm2yPqWM2YUCy+bqB+akgfW7Jj2+JigB/M9EzkOPgwW3XJfLusRzaoiBUUWJ2rHTf+ YFyJcdMJD9jLoUllUM9WbqapJMjuzTdOKUHVQ5M9XxKNbNEKo/1CxvHvv061Xtj51QZP 1C2EMrqAz62PjwQqEfoX7vmlAQ8QXleWOk/8J9mXKk62hO5eHpRZS3lBeo3qPQacmWF3 KzIRmHqcAhollc4PbYFu6DRDdAkGevMolZDnil+UQ9U+GuvV/rYKgJg+zpfSj4Dx9yEu 9gf4iOzmidVL+CjLy2uhJ6D2VcXYBbXGIHu4z8ByilMby/BB5PNxEWC0l5svpMvA2cUm HK/g== X-Gm-Message-State: AOAM533Og3qaIuUHKjr4wSvH4GDQP7GT3yFrRcp2pGAHfLrIrcwhByv3 fVH44xFuEvKQ/0ywUALv3eUArV76mhw= X-Google-Smtp-Source: ABdhPJwXTlw4BVGjQOH6dVklKbgX2phmCqoKqC2wCUr9zfr574jUXuizNsZOEY+3BGeTChwhNSWaJQ== X-Received: by 2002:a17:902:a413:b0:156:15b:524a with SMTP id p19-20020a170902a41300b00156015b524amr25616102plq.106.1650550267515; Thu, 21 Apr 2022 07:11:07 -0700 (PDT) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id p11-20020a65490b000000b003aa7791f3afsm4555494pgs.84.2022.04.21.07.11.05 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 21 Apr 2022 07:11:07 -0700 (PDT) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: Borislav Petkov , Peter Zijlstra , Josh Poimboeuf , Andy Lutomirski , Thomas Gleixner , Juergen Gross , x86@kernel.org, Lai Jiangshan , Ingo Molnar , Dave Hansen , "H. Peter Anvin" , Joerg Roedel , "Kirill A. Shutemov" , "Chang S. Bae" , Kees Cook Subject: [PATCH V6 8/8] x86/entry: Use idtentry macro for entry_INT80_compat() Date: Thu, 21 Apr 2022 22:10:55 +0800 Message-Id: <20220421141055.316239-9-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220421141055.316239-1-jiangshanlai@gmail.com> References: <20220421141055.316239-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan entry_INT80_compat() is identical to idtentry macro except a special handling for %rax in the prolog. Add the prolog to idtentry and use idtentry for entry_INT80_compat(). Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 18 ++++++ arch/x86/entry/entry_64_compat.S | 103 ------------------------------- arch/x86/include/asm/idtentry.h | 47 ++++++++++++++ arch/x86/include/asm/proto.h | 4 -- 4 files changed, 65 insertions(+), 107 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 312186612f4e..2bbecde5b228 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -386,6 +386,24 @@ SYM_CODE_START(\asmsym) pushq $-1 /* ORIG_RAX: no syscall to restart */ .endif =20 + .if \vector =3D=3D IA32_SYSCALL_VECTOR + /* + * User tracing code (ptrace or signal handlers) might assume + * that the saved RAX contains a 32-bit number when we're + * invoking a 32-bit syscall. Just in case the high bits are + * nonzero, zero-extend the syscall number. (This could almost + * certainly be deleted with no ill effects.) + */ + movl %eax, %eax + + /* + * do_int80_syscall_32() expects regs->orig_ax to be user ax, + * and regs->ax to be $-ENOSYS. + */ + movq %rax, (%rsp) + movq $-ENOSYS, %rax + .endif + .if \vector =3D=3D X86_TRAP_BP /* * If coming from kernel space, create a 6-word gap to allow the diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_com= pat.S index c5aeb0819707..6866151bbef3 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -315,106 +315,3 @@ sysret32_from_system_call: swapgs sysretl SYM_CODE_END(entry_SYSCALL_compat) - -/* - * 32-bit legacy system call entry. - * - * 32-bit x86 Linux system calls traditionally used the INT $0x80 - * instruction. INT $0x80 lands here. - * - * This entry point can be used by 32-bit and 64-bit programs to perform - * 32-bit system calls. Instances of INT $0x80 can be found inline in - * various programs and libraries. It is also used by the vDSO's - * __kernel_vsyscall fallback for hardware that doesn't support a faster - * entry method. Restarted 32-bit system calls also fall back to INT - * $0x80 regardless of what instruction was originally used to do the - * system call. - * - * This is considered a slow path. It is not used by most libc - * implementations on modern hardware except during process startup. - * - * Arguments: - * eax system call number - * ebx arg1 - * ecx arg2 - * edx arg3 - * esi arg4 - * edi arg5 - * ebp arg6 - */ -SYM_CODE_START(entry_INT80_compat) - UNWIND_HINT_EMPTY - ENDBR - /* - * Interrupts are off on entry. - */ - ASM_CLAC /* Do this early to minimize exposure */ - SWAPGS - - /* - * User tracing code (ptrace or signal handlers) might assume that - * the saved RAX contains a 32-bit number when we're invoking a 32-bit - * syscall. Just in case the high bits are nonzero, zero-extend - * the syscall number. (This could almost certainly be deleted - * with no ill effects.) - */ - movl %eax, %eax - - /* switch to thread stack expects orig_ax and rdi to be pushed */ - pushq %rax /* pt_regs->orig_ax */ - pushq %rdi /* pt_regs->di */ - - /* Need to switch before accessing the thread stack. */ - SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rdi - - /* In the Xen PV case we already run on the thread stack. */ - ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV - - movq %rsp, %rdi - movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp - - pushq 6*8(%rdi) /* regs->ss */ - pushq 5*8(%rdi) /* regs->rsp */ - pushq 4*8(%rdi) /* regs->eflags */ - pushq 3*8(%rdi) /* regs->cs */ - pushq 2*8(%rdi) /* regs->ip */ - pushq 1*8(%rdi) /* regs->orig_ax */ - pushq (%rdi) /* pt_regs->di */ -.Lint80_keep_stack: - - pushq %rsi /* pt_regs->si */ - xorl %esi, %esi /* nospec si */ - pushq %rdx /* pt_regs->dx */ - xorl %edx, %edx /* nospec dx */ - pushq %rcx /* pt_regs->cx */ - xorl %ecx, %ecx /* nospec cx */ - pushq $-ENOSYS /* pt_regs->ax */ - pushq %r8 /* pt_regs->r8 */ - xorl %r8d, %r8d /* nospec r8 */ - pushq %r9 /* pt_regs->r9 */ - xorl %r9d, %r9d /* nospec r9 */ - pushq %r10 /* pt_regs->r10*/ - xorl %r10d, %r10d /* nospec r10 */ - pushq %r11 /* pt_regs->r11 */ - xorl %r11d, %r11d /* nospec r11 */ - pushq %rbx /* pt_regs->rbx */ - xorl %ebx, %ebx /* nospec rbx */ - pushq %rbp /* pt_regs->rbp */ - xorl %ebp, %ebp /* nospec rbp */ - pushq %r12 /* pt_regs->r12 */ - xorl %r12d, %r12d /* nospec r12 */ - pushq %r13 /* pt_regs->r13 */ - xorl %r13d, %r13d /* nospec r13 */ - pushq %r14 /* pt_regs->r14 */ - xorl %r14d, %r14d /* nospec r14 */ - pushq %r15 /* pt_regs->r15 */ - xorl %r15d, %r15d /* nospec r15 */ - - UNWIND_HINT_REGS - - cld - - movq %rsp, %rdi - call do_int80_syscall_32 - jmp swapgs_restore_regs_and_return_to_usermode -SYM_CODE_END(entry_INT80_compat) diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentr= y.h index 72184b0b2219..5bf8a01d31f3 100644 --- a/arch/x86/include/asm/idtentry.h +++ b/arch/x86/include/asm/idtentry.h @@ -206,6 +206,20 @@ __visible noinstr void func(struct pt_regs *regs, \ \ static noinline void __##func(struct pt_regs *regs, u32 vector) =20 +/** + * DECLARE_IDTENTRY_IA32_EMULATION - Declare functions for int80 + * @vector: Vector number (ignored for C) + * @asm_func: Function name of the entry point + * @cfunc: The C handler called from the ASM entry point (ignored for C) + * + * Declares two functions: + * - The ASM entry point: asm_func + * - The XEN PV trap entry point: xen_##asm_func (maybe unused) + */ +#define DECLARE_IDTENTRY_IA32_EMULATION(vector, asm_func, cfunc) \ + asmlinkage void asm_func(void); \ + asmlinkage void xen_##asm_func(void) + /** * DECLARE_IDTENTRY_SYSVEC - Declare functions for system vector entry poi= nts * @vector: Vector number (ignored for C) @@ -432,6 +446,35 @@ __visible noinstr void func(struct pt_regs *regs, \ #define DECLARE_IDTENTRY_ERRORCODE(vector, func) \ idtentry vector asm_##func func has_error_code=3D1 =20 +/* + * 32-bit legacy system call entry. + * + * 32-bit x86 Linux system calls traditionally used the INT $0x80 + * instruction. INT $0x80 lands here. + * + * This entry point can be used by 32-bit and 64-bit programs to perform + * 32-bit system calls. Instances of INT $0x80 can be found inline in + * various programs and libraries. It is also used by the vDSO's + * __kernel_vsyscall fallback for hardware that doesn't support a faster + * entry method. Restarted 32-bit system calls also fall back to INT + * $0x80 regardless of what instruction was originally used to do the + * system call. + * + * This is considered a slow path. It is not used by most libc + * implementations on modern hardware except during process startup. + * + * Arguments: + * eax system call number + * ebx arg1 + * ecx arg2 + * edx arg3 + * esi arg4 + * edi arg5 + * ebp arg6 + */ +#define DECLARE_IDTENTRY_IA32_EMULATION(vector, asm_func, cfunc) \ + idtentry vector asm_func cfunc has_error_code=3D0 + /* Special case for 32bit IRET 'trap'. Do not emit ASM code */ #define DECLARE_IDTENTRY_SW(vector, func) =20 @@ -642,6 +685,10 @@ DECLARE_IDTENTRY_IRQ(X86_TRAP_OTHER, common_interrupt); DECLARE_IDTENTRY_IRQ(X86_TRAP_OTHER, spurious_interrupt); #endif =20 +#ifdef CONFIG_IA32_EMULATION +DECLARE_IDTENTRY_IA32_EMULATION(IA32_SYSCALL_VECTOR, entry_INT80_compat, d= o_int80_syscall_32); +#endif + /* System vector entry points */ #ifdef CONFIG_X86_LOCAL_APIC DECLARE_IDTENTRY_SYSVEC(ERROR_APIC_VECTOR, sysvec_error_interrupt); diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h index 0f899c8d7a4e..4700d1650410 100644 --- a/arch/x86/include/asm/proto.h +++ b/arch/x86/include/asm/proto.h @@ -28,10 +28,6 @@ void entry_SYSENTER_compat(void); void __end_entry_SYSENTER_compat(void); void entry_SYSCALL_compat(void); void entry_SYSCALL_compat_safe_stack(void); -void entry_INT80_compat(void); -#ifdef CONFIG_XEN_PV -void xen_entry_INT80_compat(void); -#endif #endif =20 void x86_configure_nx(void); --=20 2.19.1.6.gb485710b