From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C8F49C433EF for ; Mon, 11 Apr 2022 15:23:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347903AbiDKPZU (ORCPT ); Mon, 11 Apr 2022 11:25:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347861AbiDKPZE (ORCPT ); Mon, 11 Apr 2022 11:25:04 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 017D43BBE4; Mon, 11 Apr 2022 08:22:50 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id h126-20020a1c2184000000b0038eb17fb7d6so3751454wmh.2; Mon, 11 Apr 2022 08:22:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rJAJib2gJSjDFpJZLEr0WrYni5c/odHFzzzrK2oaLMs=; b=qotKL6IwNlpMly192A7eHkVzVYvutYGSQcgUdjMNV/97YsLxHmix4aUzvDrXDgMBXa hKddXJzfXtSH7HIs8Ge2u7bXMe6OjV2U6po97fO8sJOmXUMaDFAU0XwtMzFFR23BP1/x WeDhWdBfNl8jF1Z18jGeoW06lS2JW9xYiW9Vn4cAh6lAd8Teb0kz2c35mT3VLnx6V/hd vW1i2ndwMRdO1NqXhArld84EmC9k8FrXleg6kZGB6vFfSbW3N0EBlRJcZCfkaS4fiw4L +1ICG2zwbsxeYPOD8lqgtzSHN+PiuqEY6dLzvYKzFCJn6tCVCd+8xvnKUApl/nHWe9w+ DQ4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rJAJib2gJSjDFpJZLEr0WrYni5c/odHFzzzrK2oaLMs=; b=jVmN5ujLYv9ewE/QR6kyIVl7sgwAD3BRNC87hQ6FYYt7WjaEh2w6bexveS3I9Sb6nE /s9VM+U9x3iZ4VGVU7pOrkTgLLeHd2RWofet0U/fSm8/EJLS/PvQ+NGDSyD42tb6zzFw i2j8GfyDX0bKgtIGqCxZaIuB59a50pXZkAGt+3bj4IT/GQmB0EPnZ30HQbMa3A139oWz ZQQFURHU47Ha8zmslQUSATbpwqs7e1+WedsYStXM8gZT64z8ek6IiJheIXlcviWHOjFu CgMfRewPaEFdxJsLpOIapmiIrzAxYd5SrhDRaQEipZTqG43Z+nts+cWiP4f8OkItL4G0 KU1w== X-Gm-Message-State: AOAM530mpKYLH7woJbV2ZL62c1zEw5Yqjc1IcV20v1Yng7LHJwna+bcj IDw9HXDB9pax6uVKNMA6yOI= X-Google-Smtp-Source: ABdhPJxsCe87T5NI+JgIiJE/qfCIQTcZi/H4ZY84pU191xklSL3JJ6mrYDzYZWFd0iknWdI1IEiIIA== X-Received: by 2002:a05:600c:4f87:b0:38c:adde:1d99 with SMTP id n7-20020a05600c4f8700b0038cadde1d99mr29149033wmq.16.1649690568265; Mon, 11 Apr 2022 08:22:48 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:47 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Rob Herring , Alexander Stein , Christoph Niedermaier , Fabio Estevam , Krzysztof Kozlowski , Li Yang , Lucas Stach , Marcel Ziswiler , Matthias Schiffer , Oleksij Rempel , Rob Herring , Sebastian Reichel , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings Date: Mon, 11 Apr 2022 17:22:21 +0200 Message-Id: <20220411152234.12678-2-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The dedicated device tree for V1.1 modules has been dropped. Remove its bindings too. Acked-by: Rob Herring Signed-off-by: Max Krummenacher --- Changes in v2: - Added Rob's Ack Documentation/devicetree/bindings/arm/fsl.yaml | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 08bdd30e511c..cf97171506ca 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -411,7 +411,6 @@ properties: - technologic,imx6dl-ts4900 - technologic,imx6dl-ts7970 - toradex,colibri_imx6dl # Colibri iMX6 Modules - - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 V1.1 Modules - udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board - vdl,lanmcu # Van der Laan LANMCU board - wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board @@ -492,13 +491,6 @@ properties: - const: toradex,colibri_imx6dl # Colibri iMX6DL/S Mod= ule - const: fsl,imx6dl =20 - - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S V1.1 Mod= ules - items: - - enum: - - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6DL/S V1.= 1 M. on Colibri Evaluation Board V3 - - const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6DL/S V1.= 1 Module - - const: fsl,imx6dl - - description: i.MX6S DHCOM DRC02 Board items: - const: dh,imx6s-dhcom-drc02 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67A55C433F5 for ; Mon, 11 Apr 2022 15:23:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236988AbiDKPZ2 (ORCPT ); Mon, 11 Apr 2022 11:25:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347862AbiDKPZG (ORCPT ); Mon, 11 Apr 2022 11:25:06 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1761C3BBFC; Mon, 11 Apr 2022 08:22:51 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id i20so10441359wrb.13; Mon, 11 Apr 2022 08:22:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=98+3Jf2K+lmlSYcf3ZsTlyGvLJddS6p5aEwgVTSRiyI=; b=qoYhO9y5TGkppGOwhVpfSntyUfR1NJuqvhMVLa1hK6imOHPuTjYku+IMM33/j/YNEK OD/re5RFObqBDPTVHYwMpLXmFMW0BMAc1XjmUcBlKWpWQWwWKTgkDvJyISTj/4M9ONz3 9Mp+vmQPfFQNSGwmGW9GSTBv+gkcWrpIe/iegwx2mrWQBFlfcs1En1EEvb7N9ouCHN06 FBuZnwQuDYz6S9WPXU29yMroKX8ksVd+m2fzHZxvSh0FNSOCobJvi76cBA0F77g6POA1 QieVpyAmg02KT+abROjkMbNFJtgTT5zVEl17eNjTUKlmCwFECSG/VODPmnrFKngCtex3 AIjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=98+3Jf2K+lmlSYcf3ZsTlyGvLJddS6p5aEwgVTSRiyI=; b=fhk1LZ+VsZoe4k5hC3HaFbFKV3HKfVGJlfkG5mbkn6vq3Yt8Nl6tvNTP2p+i8riXmS ftoUiNi4HL+RyvHjmgUSezeWX08BG1S1uMt06qEMu+Ozz69YoOqpHeg2/4VvMmAAxm5v iMFtYvW5/9njcnvBRCQwl4DQJmqLqUiTUicVdZpwF/DiernmTEhDHGYWjEEHZwL5Xghw VgGbiUq90G9fNMPD2ZCCg12n5uB5/0jbD2AgoEbb7MF7MVslKdQsjj/fnyLFihUcPhmj icd8lUvJKo9O7kBpWEbw9O7V3AbMigC1y8AcUlXSDUsVDdUN2FX50wK3HqgpIxxKM86k JNbg== X-Gm-Message-State: AOAM533MzcgLPSosytBHGLF/3+lpZE7Pjd0dJDvHr2jW+pih3KQMsOJW It4YQn59s6BmiDeq+2Wl/wc= X-Google-Smtp-Source: ABdhPJxHWoBHrbANz5Osu0lavpckNM1zlutikUlIMHjC+atykoAiJKYZOm0NXbcD7yl3o3pyUHHS5A== X-Received: by 2002:a5d:5955:0:b0:207:8444:203b with SMTP id e21-20020a5d5955000000b002078444203bmr17881793wri.433.1649690569370; Mon, 11 Apr 2022 08:22:49 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:48 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Rob Herring , Alexander Stein , Christoph Niedermaier , Fabio Estevam , Krzysztof Kozlowski , Li Yang , Lucas Stach , Marcel Ziswiler , Matthias Schiffer , Rob Herring , Sebastian Reichel , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl Date: Mon, 11 Apr 2022 17:22:22 +0200 Message-Id: <20220411152234.12678-3-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Add bindings for Aster, Iris and Iris V2 carrier boards our Colibri iMX6S/DL may be mated with. Acked-by: Rob Herring Signed-off-by: Max Krummenacher --- Changes in v2: - Added Rob's Ack Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index cf97171506ca..5c365e738b05 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -487,7 +487,10 @@ properties: - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S Modules items: - enum: + - toradex,colibri_imx6dl-aster # Colibri iMX6DL/S Mod= ule on Aster Board - toradex,colibri_imx6dl-eval-v3 # Colibri iMX6DL/S Mod= ule on Colibri Evaluation Board V3 + - toradex,colibri_imx6dl-iris # Colibri iMX6DL/S Mod= ule on Iris Board + - toradex,colibri_imx6dl-iris-v2 # Colibri iMX6DL/S Mod= ule on Iris Board V2 - const: toradex,colibri_imx6dl # Colibri iMX6DL/S Mod= ule - const: fsl,imx6dl =20 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5F62C433F5 for ; Mon, 11 Apr 2022 15:23:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347889AbiDKPZk (ORCPT ); Mon, 11 Apr 2022 11:25:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243212AbiDKPZK (ORCPT ); Mon, 11 Apr 2022 11:25:10 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D3AD73BBE4; Mon, 11 Apr 2022 08:22:51 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id c190-20020a1c35c7000000b0038e37907b5bso12403988wma.0; Mon, 11 Apr 2022 08:22:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dHT+2Pz3E8Ryq2hYcOXh5PKgBGdNhWwwwHyntc5u2ik=; b=DCN5hYPL3TOIgfntIt6LQldg0+mkVhN0+mCa0V4Fhv+OcBoOEMYfBtG0YwnZjfoATA wWRLHFHCTjfDBr0OnDfZ2HPXG4i+nIDYnez6smujxBAV7dlV9idjXDOhD968gTJT+3iT XvGhLDzE7ORk6MQH+jZHJ/6hC24m5IlOkQv31JfIMg4pvHL8DrIurgBhkVg2Uw42uHSy TdBIkFcn801Sy8s8rJ5qkpTg7yh0WimGR64xku1qRwNLRkk1KmJSO5v6OxBp34jB5BJL hzrXYc8fOkoKkMc/RXLSBYBMTIeSuo4SzofByFCZxFs83TkmFe6no1ejsvEo4lVxDzEk 0FGg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dHT+2Pz3E8Ryq2hYcOXh5PKgBGdNhWwwwHyntc5u2ik=; b=5UxngN0orS04JAYBSHETlH4XNWgxb+R1c7QxTJJzONhEM9fOrD/uLj+TJ+0X7b4mKf VB1SRTcPIaTY3KIREi6xLGpz8alEpZp9xSxq1dVyTuAnEIcvvhNXq9fXqkqE6f/foGff FX2StmZy45xb3HPM85M1zAFeQcUL8axGb9IKCTWtzkuJjpIXVbf6OFdvK6DLWpf7zkmE F1HT6Y1Tvyt7yrnFquIrLlHU//l6vS7uBETcWopTrA/Ms2Nu9yq06zlr1Nm5UPCLjkpL GKtJ2LRbysfTIO9VRxVAQnyo3G3tmmUjx6VkDVD5yJl4vk1N6sYGcE9LBxejXHVnbz+y 6eiQ== X-Gm-Message-State: AOAM531GcyHi652XZofSJ2qbmHCtGcGn0HJySWUedpoUki2w8b36Djb5 lmsXYLoPYCSEEv2I3R2Cq+Y= X-Google-Smtp-Source: ABdhPJy3nFu/hwIUXPeYBaVcqnuDaTm9nXde1AMXsLOvZJqJUi3Omd9v8Hxwiw16sg/xo8I6cXM1Dw== X-Received: by 2002:a05:600c:1f0b:b0:38c:b121:c65f with SMTP id bd11-20020a05600c1f0b00b0038cb121c65fmr28833299wmb.124.1649690570416; Mon, 11 Apr 2022 08:22:50 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:50 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v2 03/14] ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree Date: Mon, 11 Apr 2022 17:22:23 +0200 Message-Id: <20220411152234.12678-4-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Drop Colibri V1.1 device tree, this is just a duplicate of Colibri V1.0 with the possibility to use SD cards in UHS mode if the carrier board does not have 3.3V pull up resistor. The dedicated device tree kept the feature switched of by setting the no-1-8-v property and thus does not offer anything different than what the regular device tree does. Thus drop the dedicated device tree and merge the preparation to allow enabling the feature should a carrier without pull ups be used into the regular device tree. Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/Makefile | 1 - .../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 ------------- .../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 ------------------- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 29 +++++++++++- 4 files changed, 27 insertions(+), 78 deletions(-) delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 252353fb4e3b..ae3cac8e653b 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -459,7 +459,6 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ imx6dl-colibri-eval-v3.dtb \ - imx6dl-colibri-v1_1-eval-v3.dtb \ imx6dl-cubox-i.dtb \ imx6dl-cubox-i-emmc-som-v15.dtb \ imx6dl-cubox-i-som-v15.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts b/arch/arm/b= oot/dts/imx6dl-colibri-v1_1-eval-v3.dts deleted file mode 100644 index 223275f028f1..000000000000 --- a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -/dts-v1/; - -#include "imx6dl-colibri-eval-v3.dts" -#include "imx6qdl-colibri-v1_1-uhs.dtsi" - -/ { - model =3D "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation Board V3"; - compatible =3D "toradex,colibri_imx6dl-v1_1-eval-v3", - "toradex,colibri_imx6dl-v1_1", - "toradex,colibri_imx6dl-eval-v3", - "toradex,colibri_imx6dl", - "fsl,imx6dl"; -}; - -/* Colibri MMC */ -&usdhc1 { - status =3D "okay"; - /* - * Please make sure your carrier board does not pull-up any of - * the MMC/SD signals to 3.3 volt before attempting to activate - * UHS-I support. - * To let signaling voltage be changed to 1.8V, please - * delete no-1-8-v property (example below): - * /delete-property/no-1-8-v; - */ -}; diff --git a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi b/arch/arm/boo= t/dts/imx6qdl-colibri-v1_1-uhs.dtsi deleted file mode 100644 index 7672fbfc29be..000000000000 --- a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi +++ /dev/null @@ -1,44 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -&iomuxc { - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins =3D < - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins =3D < - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1 - >; - }; -}; - -/* Colibri MMC */ -&usdhc1 { - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; - pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; - pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; - pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; - vmmc-supply =3D <®_module_3v3>; - vqmmc-supply =3D <&vgen3_reg>; - wakeup-source; - keep-power-in-suspend; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; -}; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 4e2a309c93fa..16d38bc78b2a 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -370,11 +370,14 @@ =20 /* Colibri MMC */ &usdhc1 { - pinctrl-names =3D "default"; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ disable-wp; - vqmmc-supply =3D <®_module_3v3>; + vmmc-supply =3D <®_module_3v3>; + vqmmc-supply =3D <&vgen3_reg>; bus-width =3D <4>; no-1-8-v; status =3D "disabled"; @@ -692,6 +695,28 @@ >; }; =20 + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 49F0BC433EF for ; Mon, 11 Apr 2022 15:23:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344351AbiDKPZp (ORCPT ); Mon, 11 Apr 2022 11:25:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46118 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347879AbiDKPZL (ORCPT ); Mon, 11 Apr 2022 11:25:11 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD66B3BF97; Mon, 11 Apr 2022 08:22:52 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id m33-20020a05600c3b2100b0038ec0218103so1084973wms.3; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:50 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Philippe Schenker , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/14] ARM: dts: imx6dl-colibri: Fix I2C pinmuxing Date: Mon, 11 Apr 2022 17:22:24 +0200 Message-Id: <20220411152234.12678-5-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Fix names of extra pingroup node and property for gpio bus recovery. Without the change i2c2 is not functional. Fixes: 56f0df6b6b58 ("ARM: dts: imx*(colibri|apalis): add missing recovery modes to i2c") Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6qdl-colibri.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 16d38bc78b2a..c6112b1bffd4 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -132,7 +132,7 @@ clock-frequency =3D <100000>; pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c2>; - pinctrl-0 =3D <&pinctrl_i2c2_gpio>; + pinctrl-1 =3D <&pinctrl_i2c2_gpio>; scl-gpios =3D <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios =3D <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; @@ -491,7 +491,7 @@ >; }; =20 - pinctrl_i2c2_gpio: i2c2grp { + pinctrl_i2c2_gpio: i2c2gpiogrp { fsl,pins =3D < MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BECB6C433EF for ; Mon, 11 Apr 2022 15:23:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347646AbiDKP0C (ORCPT ); Mon, 11 Apr 2022 11:26:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347884AbiDKPZL (ORCPT ); Mon, 11 Apr 2022 11:25:11 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BAA233BFA4; Mon, 11 Apr 2022 08:22:53 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id i7-20020a1c3b07000000b0038eb92fa965so782603wma.4; Mon, 11 Apr 2022 08:22:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=wJPCXAKMSBI9bB7dpXYU1TNs7HyHYJtWYzm6jjkJbH8=; b=oK9V8fvQp7WnwWL4hDuqJlLxWSoYGgWJziVaXbcsEjuaUkugBO6Lw00ibA+xEXAJDD E+Z0TheQTN04J1cTHeZ1KW7cGsOO8jqMEYH/yscI7sxrlYjn889LrUODVE17+jnBfqST rh5X/qW4g8ZDL5lfHU+267IYyj0Cfka9c0o+D3+Tt42Ge5QiJWFmLtRLWc6BK66TGMW/ LirraLuyx30zpdCxlnW6lurtOQ0xlHuNfjgCwOxjhFXWSXVwLpk4UnBP6SA1io1LWvZC vwSOGhyMTxHZ2uRn1zGAZ2oEhNugTx2QnuRb0YYiJZetqq4UtDtWpWp5uS2sonH1gbV2 22ug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=wJPCXAKMSBI9bB7dpXYU1TNs7HyHYJtWYzm6jjkJbH8=; b=FWx5JkdLN7cYQ/bhisGcp00H70MnTucUIBIcT+ScEMxBV4sUNuFE8IB3uDkQnPYexV oqGS0W6JhgnbBX3wBIac6rcUZwdwIlWdyxiZTljp7X5Wy70OaeF4CvpbrP9FZmC/kNF5 MTNQ+RQfnfZjVevGmPsZCwE9TC82YJxlqLLQCqbTe4bXpZb2WiZCJ6R322JWL/7ElS7e rjMFZVegmvedDHydzJXBulxYYRwWrFbsLyQDs4Xasef2zjtmM6pBKqVfEo8aPe0NYbnU dQrXcvYHXp+btmnfOmtkwHRD4WU/wUyTGageMEYmNM+929z2B3h6kMubPU7ihHt53ELm fr/w== X-Gm-Message-State: AOAM530rj5OI6LaWXBXpcJFc86ixomMpbU4/sVOCbnwD6JM9M0ZUUEqJ LS4X1QncJ/edj+d5YyAH+gA= X-Google-Smtp-Source: ABdhPJzwUS+inNWZQxQfoRNGcraCOObrjnH562CDpAkYLOMfrWrdBRKgIXBZB4Qp/zuz15Y8Z3Zdxw== X-Received: by 2002:a05:600c:4f46:b0:38c:d4cd:ee31 with SMTP id m6-20020a05600c4f4600b0038cd4cdee31mr29567542wmq.16.1649690572210; Mon, 11 Apr 2022 08:22:52 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:51 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Oleksandr Suvorov , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/14] ARM: dts: imx6dl-colibri: Add gpio-line-names Date: Mon, 11 Apr 2022 17:22:25 +0200 Message-Id: <20220411152234.12678-6-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Oleksandr Suvorov Add GPIO line names on module level. Those are all GPIOs which a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board level device tree. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6qdl-colibri.dtsi | 218 +++++++++++++++++++++++++ 1 file changed, 218 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index c6112b1bffd4..c92887f6af61 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -118,6 +118,224 @@ }; }; =20 +&gpio1 { + gpio-line-names =3D "", + "SODIMM_67", + "SODIMM_180", + "SODIMM_196", + "SODIMM_174", + "SODIMM_176", + "SODIMM_194", + "SODIMM_55", + "SODIMM_63", + "SODIMM_28", + "SODIMM_93", + "SODIMM_69", + "SODIMM_99", + "SODIMM_130", + "SODIMM_106", + "SODIMM_98", + "SODIMM_192", + "SODIMM_49", + "SODIMM_190", + "SODIMM_51", + "SODIMM_47", + "SODIMM_53", + "", + "SODIMM_22"; +}; + +&gpio2 { + gpio-line-names =3D "SODIMM_132", + "SODIMM_134", + "SODIMM_135", + "SODIMM_133", + "SODIMM_102", + "SODIMM_43", + "SODIMM_127", + "SODIMM_37", + "SODIMM_104", + "SODIMM_59", + "SODIMM_30", + "SODIMM_100", + "SODIMM_38", + "SODIMM_34", + "SODIMM_32", + "SODIMM_36", + "SODIMM_59", + "SODIMM_67", + "SODIMM_97", + "SODIMM_79", + "SODIMM_103", + "SODIMM_101", + "SODIMM_45", + "SODIMM_105", + "SODIMM_107", + "SODIMM_91", + "SODIMM_89", + "SODIMM_150", + "SODIMM_126", + "SODIMM_128", + "", + "SODIMM_94"; +}; + +&gpio3 { + gpio-line-names =3D "SODIMM_111", + "SODIMM_113", + "SODIMM_115", + "SODIMM_117", + "SODIMM_119", + "SODIMM_121", + "SODIMM_123", + "SODIMM_125", + "SODIMM_110", + "SODIMM_112", + "SODIMM_114", + "SODIMM_116", + "SODIMM_118", + "SODIMM_120", + "SODIMM_122", + "SODIMM_124", + "", + "SODIMM_96", + "SODIMM_77", + "SODIMM_25", + "SODIMM_27", + "SODIMM_88", + "SODIMM_90", + "SODIMM_31", + "SODIMM_23", + "SODIMM_29", + "SODIMM_71", + "SODIMM_73", + "SODIMM_92", + "SODIMM_81", + "SODIMM_131", + "SODIMM_129"; +}; + +&gpio4 { + gpio-line-names =3D "", + "", + "", + "", + "", + "SODIMM_168", + "", + "", + "", + "", + "SODIMM_184", + "SODIMM_186", + "HDMI_15", + "HDMI_16", + "SODIMM_178", + "SODIMM_188", + "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "SODIMM_24", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74"; +}; + +&gpio5 { + gpio-line-names =3D "SODIMM_95", + "", + "SODIMM_86", + "", + "SODIMM_65", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_136", + "SODIMM_138", + "SODIMM_140", + "SODIMM_142", + "SODIMM_144", + "SODIMM_146", + "SODIMM_172", + "SODIMM_170", + "SODIMM_149", + "SODIMM_151", + "SODIMM_153", + "SODIMM_155", + "SODIMM_157", + "SODIMM_159", + "SODIMM_161", + "SODIMM_163", + "SODIMM_33", + "SODIMM_35", + "SODIMM_165", + "SODIMM_167"; +}; + +&gpio6 { + gpio-line-names =3D "SODIMM_169", + "SODIMM_171", + "SODIMM_173", + "SODIMM_175", + "SODIMM_177", + "SODIMM_179", + "SODIMM_85", + "SODIMM_166", + "SODIMM_160", + "SODIMM_162", + "SODIMM_158", + "SODIMM_164", + "", + "", + "SODIMM_156", + "SODIMM_75", + "SODIMM_154", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_152"; +}; + +&gpio7 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_19", + "SODIMM_21", + "", + "SODIMM_137"; +}; + &hdmi { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_hdmi_ddc>; --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C1ADC433F5 for ; Mon, 11 Apr 2022 15:23:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347946AbiDKPZw (ORCPT ); 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:52 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/14] ARM: dts: imx6dl-colibri: Disable add-on accessories Date: Mon, 11 Apr 2022 17:22:26 +0200 Message-Id: <20220411152234.12678-7-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The Toradex Colibri family is composed of SoM that can be plugged in various carrier board, with carrier boards allowing multiple optional add-on (e.g. display, camera, ...). Keep all the SoM specific part into the module .dtsi, disabling everything that is not self-contained on the board. The carrier board dts can reuse/enable anything that is defined in the module dtsi. Additional device tree overlays can be used for any accessories that are plugged in the carrier board. Disable parallel RGB: The parallel RGB interface (lcd_display) and all related nodes can be enabled in an overlay if used. Keep all nodes disabled in the module-level device tree. Rename display interface node to match imx6qdl-apalis to make it easier to use overlays. The pwm-backlight binding now requires the power-supply property, add it. Disable stmpe touchscreen: The touchscreen can be enabled in an overlay if used. Add labels to the stmpe sub nodes. Disable hdmi interface: HDMI can be enabled in an overlay if used. Update SPDX-License spelling to latest convention. Update Copyright year. Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 59 +------------------- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 57 ++++++++++++++++++- 2 files changed, 56 insertions(+), 60 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index 7da74e6f46d9..535b5c156229 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -58,53 +58,6 @@ wakeup-source; }; }; - - lcd_display: disp0 { - compatible =3D "fsl,imx-parallel-display"; - #address-cells =3D <1>; - #size-cells =3D <0>; - interface-pix-fmt =3D "bgr666"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ipu1_lcdif>; - status =3D "okay"; - - port@0 { - reg =3D <0>; - - lcd_display_in: endpoint { - remote-endpoint =3D <&ipu1_di0_disp0>; - }; - }; - - port@1 { - reg =3D <1>; - - lcd_display_out: endpoint { - remote-endpoint =3D <&lcd_panel_in>; - }; - }; - }; - - panel: panel { - /* - * edt,et057090dhu: EDT 5.7" LCD TFT - * edt,et070080dh6: EDT 7.0" LCD TFT - */ - compatible =3D "edt,et057090dhu"; - backlight =3D <&backlight>; - - port { - lcd_panel_in: endpoint { - remote-endpoint =3D <&lcd_display_out>; - }; - }; - }; -}; - -&backlight { - brightness-levels =3D <0 127 191 223 239 247 251 255>; - default-brightness-level =3D <1>; - status =3D "okay"; }; =20 /* Colibri SSP */ @@ -122,10 +75,6 @@ }; }; =20 -&hdmi { - status =3D "okay"; -}; - /* * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */ @@ -178,10 +127,6 @@ }; }; =20 -&ipu1_di0_disp0 { - remote-endpoint =3D <&lcd_display_in>; -}; - &pwm1 { status =3D "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index c92887f6af61..f6243762e918 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -13,13 +13,59 @@ =20 backlight: backlight { compatible =3D "pwm-backlight"; + brightness-levels =3D <0 127 191 223 239 247 251 255>; + default-brightness-level =3D <1>; + enable-gpios =3D <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio_bl_on>; + power-supply =3D <®_module_3v3>; pwms =3D <&pwm3 0 5000000>; - enable-gpios =3D <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ status =3D "disabled"; }; =20 + lcd_display: disp0 { + compatible =3D "fsl,imx-parallel-display"; + interface-pix-fmt =3D "bgr666"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ipu1_lcdif>; + status =3D "disabled"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + lcd_display_in: endpoint { + remote-endpoint =3D <&ipu1_di0_disp0>; + }; + }; + + port@1 { + reg =3D <1>; + + lcd_display_out: endpoint { + remote-endpoint =3D <&lcd_panel_in>; + }; + }; + }; + + panel_dpi: panel-dpi { + /* + * edt,et057090dhu: EDT 5.7" LCD TFT + * edt,et070080dh6: EDT 7.0" LCD TFT + */ + compatible =3D "edt,et057090dhu"; + backlight =3D <&backlight>; + status =3D "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint =3D <&lcd_display_out>; + }; + }; + }; + reg_module_3v3: regulator-module-3v3 { compatible =3D "regulator-fixed"; regulator-name =3D "+V3.3"; @@ -476,7 +522,7 @@ /* ADC converstion time: 80 clocks */ st,sample-time =3D <4>; =20 - stmpe_touchscreen { + stmpe_ts: stmpe_touchscreen { compatible =3D "st,stmpe-ts"; /* 8 sample average control */ st,ave-ctrl =3D <3>; @@ -491,9 +537,10 @@ st,settling =3D <3>; /* 5 ms touch detect interrupt delay */ st,touch-det-delay =3D <5>; + status =3D "disabled"; }; =20 - stmpe_adc { + stmpe_adc: stmpe_adc { compatible =3D "st,stmpe-adc"; /* forbid to use ADC channels 3-0 (touch) */ st,norequest-mask =3D <0x0F>; @@ -514,6 +561,10 @@ status =3D "disabled"; }; =20 +&ipu1_di0_disp0 { + remote-endpoint =3D <&lcd_display_in>; +}; + /* Colibri PWM */ &pwm1 { pinctrl-names =3D "default"; --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99255C433F5 for ; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:53 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/14] ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff Date: Mon, 11 Apr 2022 17:22:27 +0200 Message-Id: <20220411152234.12678-8-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC into a low power mode in poweroff. Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6qdl-colibri.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index f6243762e918..da52a71bb6e7 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -138,6 +138,10 @@ status =3D "disabled"; }; =20 +&clks { + fsl,pmic-stby-poweroff; +}; + /* Colibri SSP */ &ecspi4 { cs-gpios =3D <&gpio5 2 GPIO_ACTIVE_LOW>; @@ -403,6 +407,7 @@ =20 pmic: pfuze100@8 { compatible =3D "fsl,pfuze100"; + fsl,pmic-stby-poweroff; reg =3D <0x08>; =20 regulators { --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63EA7C433F5 for ; Mon, 11 Apr 2022 15:24:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239098AbiDKP0Y (ORCPT ); Mon, 11 Apr 2022 11:26:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347908AbiDKPZW (ORCPT ); Mon, 11 Apr 2022 11:25:22 -0400 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AA5323C487; Mon, 11 Apr 2022 08:22:56 -0700 (PDT) Received: by mail-wr1-x42e.google.com with SMTP id b19so23517703wrh.11; Mon, 11 Apr 2022 08:22:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=W70bMf1Ky2O8ngTc5hq7tyZ3VFa4hjG98xIoYgkJB40=; b=kkOto/2thn4dB/SOAQnrjLL2oePLHVjQgqP2iD6e4ZUfo6mF+PE380kKmq2+6nAM0H AYWnEcZ1D94GCV011vy4BXLxVv1Zxi8982SBuXoY5C7l1QEtV5uqrT1ONCKhWmnVnuIc ODxPh5lY+OGyOHEy0fdhgU0TdVNmIaEDaCx3Bnj7kEOs3JVv+VzV3YkdpHUW2O46+PvU YWsu6J0cf8pLjbVwtlYOi6HSFJ50WRO3UB7qyaeajK3FvYMEY59hvlvuYynHEa1pN0qI hA7kDSdFd9grzI+nZZk6av/ZGrEfkx+78TrATdk9Exh+zxfOPUFudwwUUkBpccmEpUwc t6pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=W70bMf1Ky2O8ngTc5hq7tyZ3VFa4hjG98xIoYgkJB40=; b=GWktGq0dkiR41LBq6e+UsCV8BYH9mBu4XUneAebJlEGAtNOz5Bg9xzKfRE9oAe6KzG vV8e1Mhgqhu3lYSlHTXtyxo3L56XCefw2gtETjhQz+K8qAM+5IAmvoTcmbK2X3IgtpPv tFQy217Ou9A+DzREgJalSSOIBsS2ROdTN5XwkvMC20nhSvX18IhFmUvIbNDnEBbwEoLw RE0CaJdEVU3EbHE2Go7qcbyzuw8Dj3GN8+KqK/qfA+UY4GhIPoRGJq3PaMtmB3dhNqoF eHRx/e4sK1r6FLAMI6vXv3VgIHnsjydzlKOTeduSf+B3+4jgfWa8mY0bTolPVgIFROPy bk6g== X-Gm-Message-State: AOAM530+kgm0XywvCxan4p4BtDW8KrnMB8CFE3hVfFw8PFyyiruExGkb Swnl/JrJ8HGILZyfJodkXys= X-Google-Smtp-Source: ABdhPJxD0md7ffzoBIiNS+vnYzG4eW9I7TLKF3hDG9tPy7dBiZzYf1OcMru1OIuaaHx8DvuZXzYtXw== X-Received: by 2002:a5d:64e5:0:b0:205:9cf8:b552 with SMTP id g5-20020a5d64e5000000b002059cf8b552mr24007147wri.52.1649690575304; Mon, 11 Apr 2022 08:22:55 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:54 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/14] ARM: dts: imx6dl-colibri: Add additional pingroups Date: Mon, 11 Apr 2022 17:22:28 +0200 Message-Id: <20220411152234.12678-9-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The Toradex board Iris V2 has an LVDS transceiver which is configured with 4 signals. Add corresponding pins into the separate pingroup to be able to manage the transceiver. Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6qdl-colibri.dtsi | 52 ++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index da52a71bb6e7..3459bfb5c60b 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -700,6 +700,30 @@ >; }; =20 + /* CSI pins used as GPIOs */ + pinctrl_csi_gpio_1: csigpio1grp { + fsl,pins =3D < + MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0 + MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 + MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0 + MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x1b0b0 + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + + pinctrl_csi_gpio_2: csigpio2grp { + fsl,pins =3D < + MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0 + >; + }; + pinctrl_ecspi4: ecspi4grp { fsl,pins =3D < MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 @@ -739,6 +763,25 @@ >; }; =20 + pinctrl_gpio_1: gpio1grp { + fsl,pins =3D < + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; + pinctrl_gpio_2: gpio2grp { + fsl,pins =3D < + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 + >; + }; + pinctrl_gpio_bl_on: gpioblon { fsl,pins =3D < MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 @@ -832,6 +875,15 @@ >; }; =20 + pinctrl_lvds_transceiver: lvdstxgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x03030 /* SODIMM 95 */ + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b030 /* SODIMM 55 */ + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x03030 /* SODIMM 63 */ + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x03030 /* SODIMM 99 */ + >; + }; + pinctrl_mic_gnd: gpiomicgnd { fsl,pins =3D < /* Controls Mic GND, PU or '1' pull Mic GND to GND */ --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7A5EC433EF for ; Mon, 11 Apr 2022 15:23:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244478AbiDKP0F (ORCPT ); Mon, 11 Apr 2022 11:26:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347914AbiDKPZX (ORCPT ); Mon, 11 Apr 2022 11:25:23 -0400 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A002D3C70F; Mon, 11 Apr 2022 08:22:57 -0700 (PDT) Received: by mail-wm1-x335.google.com with SMTP id i7-20020a1c3b07000000b0038eb92fa965so782756wma.4; Mon, 11 Apr 2022 08:22:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OzbWjh8sKV/ROSexmDdz4skMJ4dtzVR35i5rogX6hBA=; b=f2Hvmt9PMiv6gaKXCm7yk/XPQRNqZqAtiF5G6lNwBgLFryXkKVt+sQEpdFg1N2Xwpi AsYw+Yxtegv7+3ardT+lu+B17otLqWylzchTt360a9LPmuUpVOP2y+fUIDRor1+Ge6qs Pm2f+Do9pnRs4aTs78WsC5Eg89Wjcsxlaa0lRG1Zd3N4KBoCNtNePfT00k/pQBLUfErx mozkJQl+abVVUmhSDGt1wQBAPQi0/5QxEcZE6exVoMLkEAhaJ0VAw6dENqBg+iPlla87 DRe8fx1TYnGTHP9GgUfO+yDpPrbcP0GwO723TT40CFy1j0RK3kMJt1ZWb33k/W44mCSO Ueeg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OzbWjh8sKV/ROSexmDdz4skMJ4dtzVR35i5rogX6hBA=; b=vaPxsI999Fgz5IPDsOPlyaQ7O+QzcpEzhlnB36EKNT54tFBoXlNHTb7e6nsTjKYrWz 6qbVWxMY0dUKl0Vzbk46XwOBp6VmWmCeUPMu4MmsqxcltGszmlMz+m1A2iwN9kzSgkH8 LNSYE9gt7qS3DcbYSYpVEjT2xo2aF4Bn4rT+6VcNTeGD/vIRbdxWUgydYkrLu9e3poyQ l+lPdvgUn9vy97ajfwgHGU1Znf+/SMSIiyuV7vBoV6Jn7iP+ZJ/cf+v1+lMsji63CPHg kzNW6GG6Z6kRr/DxH/HQOGYgvxSRkuM0FW79gk1JTsPWpA2mnU7O1IdAU75N09MWgCcO ge2w== X-Gm-Message-State: AOAM530jqykFidX2M20hfxVXhUA9Tp7BmN5jB0MjX14P4UHR4fWm37V4 F7Kk4L0zk7QI6WMVJftfsRU= X-Google-Smtp-Source: ABdhPJwqmQ6enx856HE3pcJUbewHjC+52+2/gNX0rAbEdAfaCpeGf0hb2lNVVv7wA8VdB2p2Y9QnRQ== X-Received: by 2002:a7b:ce99:0:b0:38e:b72a:382c with SMTP id q25-20020a7bce99000000b0038eb72a382cmr8092362wmj.128.1649690576192; Mon, 11 Apr 2022 08:22:56 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:55 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/14] ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi Date: Mon, 11 Apr 2022 17:22:29 +0200 Message-Id: <20220411152234.12678-10-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The following two nodes define module level functionality, move them from the carrier board dts file to the SoM file. While at it, reorder the properties in the gpio-keys node alphabetical. - gpio-keys defining the wakeup pin - memory node The atmel touchscreen node can be used on any carrier board. Move it from the carrier board to the module-level device tree and keep it disabled. Set the default pinmuxing to the dedicated connector available on newer carrier boards and rename the pinctrl labels specifying the INT/Reset signal to a common pattern. pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 49 ------------------ arch/arm/boot/dts/imx6qdl-colibri.dtsi | 53 ++++++++++++++++++++ 2 files changed, 53 insertions(+), 49 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index 535b5c156229..dff2d35e693b 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -17,12 +17,6 @@ compatible =3D "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl", "fsl,imx6dl"; =20 - /* Will be filled by the bootloader */ - memory@10000000 { - device_type =3D "memory"; - reg =3D <0x10000000 0>; - }; - aliases { i2c0 =3D &i2c2; i2c1 =3D &i2c3; @@ -44,20 +38,6 @@ clock-frequency =3D <16000000>; clock-output-names =3D "clk16m"; }; - - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_gpio_keys>; - - wakeup { - label =3D "Wake-Up"; - gpios =3D <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ - linux,code =3D ; - debounce-interval =3D <10>; - wakeup-source; - }; - }; }; =20 /* Colibri SSP */ @@ -81,21 +61,6 @@ &i2c3 { status =3D "okay"; =20 - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible =3D "atmel,maxtouch"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_pcap_1>; - reg =3D <0x4a>; - interrupt-parent =3D <&gpio1>; - interrupts =3D <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ - reset-gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ - status =3D "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible =3D "st,m41t0"; @@ -111,20 +76,6 @@ &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6 &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1 >; - - pinctrl_pcap_1: pcap1grp { - fsl,pins =3D < - MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */ - MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */ - >; - }; - - pinctrl_mxt_ts: mxttsgrp { - fsl,pins =3D < - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */ - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */ - >; - }; }; =20 &pwm1 { diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 3459bfb5c60b..1c49fd3e6286 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -23,6 +23,20 @@ status =3D "disabled"; }; =20 + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_keys>; + + wakeup { + debounce-interval =3D <10>; + gpios =3D <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + label =3D "Wake-Up"; + linux,code =3D ; + wakeup-source; + }; + }; + lcd_display: disp0 { compatible =3D "fsl,imx-parallel-display"; interface-pix-fmt =3D "bgr666"; @@ -50,6 +64,12 @@ }; }; =20 + /* Will be filled by the bootloader */ + memory@10000000 { + device_type =3D "memory"; + reg =3D <0x10000000 0>; + }; + panel_dpi: panel-dpi { /* * edt,et057090dhu: EDT 5.7" LCD TFT @@ -564,6 +584,17 @@ scl-gpios =3D <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios =3D <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "disabled"; + + atmel_mxt_ts: touchscreen@4a { + compatible =3D "atmel,maxtouch"; + interrupt-parent =3D <&gpio2>; + interrupts =3D <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_atmel_conn>; + reg =3D <0x4a>; + reset-gpios =3D <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */ + status =3D "disabled"; + }; }; =20 &ipu1_di0_disp0 { @@ -682,6 +713,28 @@ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usbh_oc_1>; =20 + /* Atmel MXT touchsceen + Capacitive Touch Adapter */ + /* NOTE: This pin group conflicts with pin groups + * pinctrl_pwm1/pinctrl_pwm4. Don't use them simultaneously. + */ + pinctrl_atmel_adap: atmeladaptergrp { + fsl,pins =3D < + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb0b1 /* SODIMM 28 */ + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0xb0b1 /* SODIMM 30 */ + >; + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector= */ + /* NOTE: This pin group conflicts with pin groups pinctrl_weim_cs1 and + * pinctrl_weim_cs2. Don't use them simultaneously. + */ + pinctrl_atmel_conn: atmelconnectorgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0xb0b1 /* SODIMM_107 */ + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0xb0b1 /* SODIMM_106 */ + >; + }; + pinctrl_audmux: audmuxgrp { fsl,pins =3D < MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AFD1C433F5 for ; Mon, 11 Apr 2022 15:24:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347958AbiDKP0L (ORCPT ); Mon, 11 Apr 2022 11:26:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47022 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347931AbiDKPZX (ORCPT ); Mon, 11 Apr 2022 11:25:23 -0400 Received: from mail-wr1-x42a.google.com (mail-wr1-x42a.google.com [IPv6:2a00:1450:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D16343BF94; Mon, 11 Apr 2022 08:22:58 -0700 (PDT) Received: by mail-wr1-x42a.google.com with SMTP id s28so7631799wrb.5; Mon, 11 Apr 2022 08:22:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=CZsi69FltIyPUraeseWE4UFes31YusQplCC4NibVevo=; b=Mp1uYvE0LL2thk5K2+ACHRiO9gxQchPX5/KcLlLno4wyHdUFZn39p1cED1L0rBt1t5 MXOH2sCMjFl3TceWo+fp8iGJMW5lywjExmoI4W59ZK4VfcNy0L7YZFkLRvyc+mB4m3mK +M89cbi1BPAN9TDW549XlFz5+W+uipXixA5bVVcX7T0RvNpOI87VOE5t8IO8TJk6kEz+ sNgGElDTMFWatfnLhh9ZneudkbOKJZPjH8oluh+Vo9At0Wp5xttNIcUj4uxRqodNTsRN ljvfU3v8ImIpLq2zZc70D7w3Od8Qmrt0YE4W6CS07K4IPvY8Lp5RKTvhlPUKYjeQ7oV+ K53Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=CZsi69FltIyPUraeseWE4UFes31YusQplCC4NibVevo=; b=LFhqUArAyLR3CgSIyPhRbUbowVZYQsHSikno0gQV0DywEg9Ea611xNFts7IYpex2JF XFfLh7OFj4RWxjQjTD3fwaKetVDJP66gxYrG4gAyNZjO+9T5AzW6ThhJq0jjg1Uh7fcp QiFg4htsS3aUOH8E/ZIsscZLjGdCQ0WoREB3IA+ZEn4LA0KMFAtCJFsOzVgz+BYAEd0m khPSJNvXEcX9f7xY4bbZb9QNURIwDd5ZMJHo8A3i+mTJQel56gIZNmLff7qBRBHRZm9x fzYuyQfBMDL2FQx09eoalRD+5v4v9z0zlUsiurbihzNlXTBsi+feeFbW6TMCfNrfBzaS aN1Q== X-Gm-Message-State: AOAM533TYH+oqac6rV5TpNGcj+SSQN3EAjKdbJZVBhegxLF5xzT1jaUE nzv2zxifA4VWHzNK4dWYWeOONbhq9n8= X-Google-Smtp-Source: ABdhPJzBbHbd9/9Bau29KM9MQifjpjMo1Chsgipo6j58GbqbM+QOnaOIVCnkqIbMM1NhZvNRcTW8EA== X-Received: by 2002:adf:8066:0:b0:206:1563:8b2b with SMTP id 93-20020adf8066000000b0020615638b2bmr25705535wrk.582.1649690577099; Mon, 11 Apr 2022 08:22:57 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:56 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/14] ARM: dts: imx6dl-colibri: Cleanup Date: Mon, 11 Apr 2022 17:22:30 +0200 Message-Id: <20220411152234.12678-11-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher - Sort pinctrl nodes alphabetically - End all pinctrl node names in grp and avoid using dashes - Change pinctrl_usbc_id_1's node name to not use underscores - Change the pmic's node name to pmic@8 per binding requirement - Add sound-dai-cells to the codec node per binding requirement Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 340 ++++++++++--------- 2 files changed, 172 insertions(+), 170 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index dff2d35e693b..7272edd85a49 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -46,10 +46,10 @@ =20 mcp251x0: mcp251x@0 { compatible =3D "microchip,mcp2515"; - reg =3D <0>; clocks =3D <&clk16m>; interrupt-parent =3D <&gpio3>; interrupts =3D <27 0x2>; + reg =3D <0>; spi-max-frequency =3D <10000000>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 1c49fd3e6286..1c3c34bbfe98 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -104,36 +104,36 @@ =20 reg_usb_host_vbus: regulator-usb-host-vbus { compatible =3D "regulator-fixed"; + gpio =3D <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_regulator_usbh_pwr>; - regulator-name =3D "usb_host_vbus"; - regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; - gpio =3D <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */ + regulator-min-microvolt =3D <5000000>; + regulator-name =3D "usb_host_vbus"; status =3D "disabled"; }; =20 sound { compatible =3D "fsl,imx-audio-sgtl5000"; - model =3D "imx6dl-colibri-sgtl5000"; - ssi-controller =3D <&ssi1>; audio-codec =3D <&codec>; audio-routing =3D "Headphone Jack", "HP_OUT", "LINE_IN", "Line In Jack", "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias"; + model =3D "imx6dl-colibri-sgtl5000"; mux-int-port =3D <1>; mux-ext-port =3D <5>; + ssi-controller =3D <&ssi1>; }; =20 /* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */ sound_spdif: sound-spdif { compatible =3D "fsl,imx-audio-spdif"; - model =3D "imx-spdif"; spdif-controller =3D <&spdif>; spdif-in; spdif-out; + model =3D "imx-spdif"; status =3D "disabled"; }; }; @@ -171,10 +171,10 @@ }; =20 &fec { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_enet>; phy-mode =3D "rmii"; phy-handle =3D <ðphy>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enet>; status =3D "okay"; =20 mdio { @@ -425,61 +425,61 @@ sda-gpios =3D <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; =20 - pmic: pfuze100@8 { + pmic: pmic@8 { compatible =3D "fsl,pfuze100"; fsl,pmic-stby-poweroff; reg =3D <0x08>; =20 regulators { sw1a_reg: sw1ab { - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1875000>; + regulator-min-microvolt =3D <300000>; regulator-ramp-delay =3D <6250>; }; =20 sw1c_reg: sw1c { - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1875000>; + regulator-min-microvolt =3D <300000>; regulator-ramp-delay =3D <6250>; }; =20 sw3a_reg: sw3a { - regulator-min-microvolt =3D <400000>; - regulator-max-microvolt =3D <1975000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1975000>; + regulator-min-microvolt =3D <400000>; }; =20 swbst_reg: swbst { - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5150000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <5150000>; + regulator-min-microvolt =3D <5000000>; }; =20 snvs_reg: vsnvs { - regulator-min-microvolt =3D <1000000>; - regulator-max-microvolt =3D <3000000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3000000>; + regulator-min-microvolt =3D <1000000>; }; =20 vref_reg: vrefddr { - regulator-boot-on; regulator-always-on; + regulator-boot-on; }; =20 /* vgen1: unused */ =20 vgen2_reg: vgen2 { - regulator-min-microvolt =3D <800000>; - regulator-max-microvolt =3D <1550000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1550000>; + regulator-min-microvolt =3D <800000>; }; =20 /* @@ -487,57 +487,58 @@ * the i.MX 6 NVCC_SD1. */ vgen3_reg: vgen3 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen4_reg: vgen4 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen5_reg: vgen5 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen6_reg: vgen6 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; }; }; =20 codec: sgtl5000@a { compatible =3D "fsl,sgtl5000"; - reg =3D <0x0a>; clocks =3D <&clks IMX6QDL_CLK_CKO>; + lrclk-strength =3D <3>; + reg =3D <0x0a>; + #sound-dai-cells =3D <0>; VDDA-supply =3D <®_module_3v3_audio>; VDDIO-supply =3D <®_module_3v3>; VDDD-supply =3D <&vgen4_reg>; - lrclk-strength =3D <3>; }; =20 /* STMPE811 touch screen controller */ stmpe811@41 { compatible =3D "st,stmpe811"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_touch_int>; - reg =3D <0x41>; + blocks =3D <0x5>; interrupts =3D <20 IRQ_TYPE_LEVEL_LOW>; interrupt-parent =3D <&gpio6>; interrupt-controller; id =3D <0>; - blocks =3D <0x5>; irq-trigger =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_touch_int>; + reg =3D <0x41>; /* 3.25 MHz ADC clock speed */ st,adc-freq =3D <1>; /* 12-bit ADC */ @@ -643,27 +644,27 @@ =20 /* Colibri UART_A */ &uart1 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; - fsl,dte-mode; uart-has-rtscts; status =3D "disabled"; }; =20 /* Colibri UART_B */ &uart2 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2_dte>; - fsl,dte-mode; uart-has-rtscts; status =3D "disabled"; }; =20 /* Colibri UART_C */ &uart3 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3_dte>; - fsl,dte-mode; status =3D "disabled"; }; =20 @@ -675,27 +676,27 @@ =20 /* Colibri MMC */ &usdhc1 { + cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ + bus-width =3D <4>; + no-1-8-v; + disable-wp; pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; - cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ - disable-wp; vmmc-supply =3D <®_module_3v3>; vqmmc-supply =3D <&vgen3_reg>; - bus-width =3D <4>; - no-1-8-v; status =3D "disabled"; }; =20 /* eMMC */ &usdhc3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_usdhc3>; - vqmmc-supply =3D <®_module_3v3>; bus-width =3D <8>; no-1-8-v; non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc3>; + vqmmc-supply =3D <®_module_3v3>; status =3D "okay"; }; =20 @@ -737,12 +738,12 @@ =20 pinctrl_audmux: audmuxgrp { fsl,pins =3D < + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0 - /* SGTL5000 sys_mclk */ - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 >; }; =20 @@ -779,26 +780,26 @@ =20 pinctrl_ecspi4: ecspi4grp { fsl,pins =3D < + /* SPI CS */ + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 - /* SPI CS */ - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 >; }; =20 pinctrl_enet: enetgrp { fsl,pins =3D < + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) + MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) >; }; =20 @@ -835,13 +836,13 @@ >; }; =20 - pinctrl_gpio_bl_on: gpioblon { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins =3D < MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 >; }; =20 - pinctrl_gpio_keys: gpiokeys { + pinctrl_gpio_keys: gpiokeysgrp { fsl,pins =3D < MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0 >; @@ -856,15 +857,15 @@ =20 pinctrl_i2c2: i2c2grp { fsl,pins =3D < - MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 >; }; =20 pinctrl_i2c2_gpio: i2c2gpiogrp { fsl,pins =3D < - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1 + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 >; }; =20 @@ -896,8 +897,8 @@ MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1 MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1 /* Disable PWM pins on camera interface */ - MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40 + MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40 >; }; =20 @@ -937,14 +938,14 @@ >; }; =20 - pinctrl_mic_gnd: gpiomicgnd { + pinctrl_mic_gnd: micgndgrp { fsl,pins =3D < /* Controls Mic GND, PU or '1' pull Mic GND to GND */ MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0 >; }; =20 - pinctrl_mmc_cd: gpiommccd { + pinctrl_mmc_cd: mmccdgrp { fsl,pins =3D < MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1 >; @@ -958,15 +959,15 @@ =20 pinctrl_pwm2: pwm2grp { fsl,pins =3D < - MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040 + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 >; }; =20 pinctrl_pwm3: pwm3grp { fsl,pins =3D < - MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 >; }; =20 @@ -983,13 +984,6 @@ >; }; =20 - pinctrl_usbh_oc_1: usbhoc1grp { - fsl,pins =3D < - /* USBH_OC */ - MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 - >; - }; - pinctrl_spdif: spdifgrp { fsl,pins =3D < MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 @@ -1032,9 +1026,9 @@ pinctrl_uart2_dte: uart2dtegrp { fsl,pins =3D < MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 >; }; =20 @@ -1049,20 +1043,27 @@ fsl,pins =3D < /* USBC_DET */ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 - /* USBC_DET_EN */ - MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058 /* USBC_DET_OVERWRITE */ MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058 + /* USBC_DET_EN */ + MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058 >; }; =20 - pinctrl_usbc_id_1: usbc_id-1 { + pinctrl_usbc_id_1: usbcid1grp { fsl,pins =3D < /* USBC_ID */ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 >; }; =20 + pinctrl_usbh_oc_1: usbhoc1grp { + fsl,pins =3D < + /* USBH_OC */ + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 @@ -1074,7 +1075,7 @@ >; }; =20 - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 @@ -1085,7 +1086,7 @@ >; }; =20 - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 @@ -1134,135 +1135,136 @@ >; }; =20 - pinctrl_weim_sram: weimsramgrp { - fsl,pins =3D < - MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 - MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 - /* Data */ - MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0 - MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0 - MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0 - MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0 - MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0 - MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0 - MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0 - MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0 - MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0 - MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0 - MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0 - MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0 - MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0 - MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0 - MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0 - MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0 - /* Address */ - MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 - MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 - MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 - MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 - MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 - MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 - MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 - MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 - MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 - MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 - MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 - MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 - MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 - MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 - MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 - MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 - >; - }; - - pinctrl_weim_rdnwr: weimrdnwr { - fsl,pins =3D < - MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040 - MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0 - >; - }; - - pinctrl_weim_npwe: weimnpwe { - fsl,pins =3D < - MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040 - MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0 - >; - }; - /* ADDRESS[16:18] [25] used as GPIO */ - pinctrl_weim_gpio_1: weimgpio-1 { + pinctrl_weim_gpio_1: weimgpio1grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 - MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 >; }; =20 /* ADDRESS[19:24] used as GPIO */ - pinctrl_weim_gpio_2: weimgpio-2 { + pinctrl_weim_gpio_2: weimgpio2grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 - MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 - MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 - MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 - MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 - MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0 + MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 + MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 + MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 + MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 >; }; =20 /* DATA[16:31] used as GPIO */ - pinctrl_weim_gpio_3: weimgpio-3 { + pinctrl_weim_gpio_3: weimgpio3grp { fsl,pins =3D < + MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 - MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 - MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0 - MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 - MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 - MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0 - MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 >; }; =20 /* DQM[0:3] used as GPIO */ - pinctrl_weim_gpio_4: weimgpio-4 { + pinctrl_weim_gpio_4: weimgpio4grp { fsl,pins =3D < MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0 - MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 + MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0 >; }; =20 /* RDY used as GPIO */ - pinctrl_weim_gpio_5: weimgpio-5 { + pinctrl_weim_gpio_5: weimgpio5grp { fsl,pins =3D < MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0 >; }; =20 /* ADDRESS[16] DATA[30] used as GPIO */ - pinctrl_weim_gpio_6: weimgpio-6 { + pinctrl_weim_gpio_6: weimgpio6grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + >; + }; + + pinctrl_weim_npwe: weimnpwegrp { + fsl,pins =3D < + MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040 + >; + }; + + pinctrl_weim_sram: weimsramgrp { + fsl,pins =3D < + /* Data */ + MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0 + MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0 + MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0 + MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0 + MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0 + MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0 + MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0 + /* Address */ + MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 + MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 + MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 + MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 + MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 + MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 + MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 + MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 + MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 + MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 + MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 + MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 + MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 + MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 + MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 + MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 + /* Ctrl */ + MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 + MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 + >; + }; + + pinctrl_weim_rdnwr: weimrdnwrgrp { + fsl,pins =3D < + MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0 + MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040 >; }; }; --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D7296C433F5 for ; Mon, 11 Apr 2022 15:24:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347963AbiDKP0Q (ORCPT ); Mon, 11 Apr 2022 11:26:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347923AbiDKPZX (ORCPT ); Mon, 11 Apr 2022 11:25:23 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 986943C73F; Mon, 11 Apr 2022 08:22:59 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id k22so4998538wrd.2; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:57 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/14] ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration Date: Mon, 11 Apr 2022 17:22:31 +0200 Message-Id: <20220411152234.12678-12-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The Toradex board Iris V2 has a SD-card slot with switchable power. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/imx6qdl-colibri.dtsi | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 1c3c34bbfe98..c383e0e4110c 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -680,10 +680,11 @@ bus-width =3D <4>; no-1-8-v; disable-wp; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; + pinctrl-3 =3D <&pinctrl_usdhc1_sleep &pinctrl_mmc_cd_sleep>; vmmc-supply =3D <®_module_3v3>; vqmmc-supply =3D <&vgen3_reg>; status =3D "disabled"; @@ -951,6 +952,12 @@ >; }; =20 + pinctrl_mmc_cd_sleep: mmccdslpgrp { + fsl,pins =3D < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins =3D < MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 @@ -1097,6 +1104,18 @@ >; }; =20 + /* avoid backfeeding with removed card power */ + pinctrl_usdhc1_sleep: usdhc1sleepgrp { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA90DC433EF for ; Mon, 11 Apr 2022 15:24:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235933AbiDKP0r (ORCPT ); Mon, 11 Apr 2022 11:26:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347936AbiDKPZ2 (ORCPT ); Mon, 11 Apr 2022 11:25:28 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA0D33CA52; Mon, 11 Apr 2022 08:23:00 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id i7-20020a1c3b07000000b0038eb92fa965so782876wma.4; Mon, 11 Apr 2022 08:23:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fG802aYqjZQsNd2LU8/4lQJsCL20w0snxQCWOmggROM=; b=kXUGhXo5i53QIYrBX8V5hTkrA4GemC0gIItbzNmM/wYPTT3ze5TtPs5jXXpTC877gz 1vaMGG62L8I+dSy/42WX6fj9/+sJwK8lXGZ6eA5XMP6TFnBgxR3LtisHl7LExG7LPgaF 2v0cnCDEnEiPLTYqzeLz8PaK3FN0UK1sGCceM31oP7i4RUyVdglzqrVYgINAaToNSXEp ajk1diOE2CGPh1e6MR0FJus2iAjOKhH1ADNIQ/nK2II2pqmZFbUOmUogJL9oUCiuXD2m pcSxMI0Ku6R4Q5PUhq4P9olV/a6OR13v2O1W85Gyzmr+MgP4oPvQKg3a3TS94Xca1WW9 7l2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fG802aYqjZQsNd2LU8/4lQJsCL20w0snxQCWOmggROM=; b=Zl4f2UWgRt6JqidA7ht1lDMZN5yyt06ly/lltfYVWH8N7PzwTI6SciW5L8ib4Lngfc SVm6fFn3oL0v6DMIyJJqi7w1U0G82P5BHmLTH93zvHoewKYg9ww7cPtBObGv3GfiZAmc AUbf3uQfeadUz3U44zRl0Ggsi+3AIrprQcTH5ZR0UUWcOdb88EOByAQb4mfOfSUqjJZe l0H6gQtE2nH/uo3I6fJAJRzu4S82hCNVzd1gQksIMdWXkMEyHMvXrVr/5UYlDPeKmevj uATRTbE/S6ijERhHYE6Fy1DF5QWKWSJ+xGRqp5lLK2ZDDGVcpm2Mju9bmhOY1dmw4Kzo nOgg== X-Gm-Message-State: AOAM530pwsYsPGX7BHQER92OfHlNW+sfWyB5eVIZaLlpjXdJbViqIag2 ux+kEDKcPpp9lE+EU3TDxWU= X-Google-Smtp-Source: ABdhPJzxSIjR3A8dQJu/+p52Fco5Zpa+wrJeYWcIdW831NGRIoLm9U3brnqmQbkF2OjZsfEggZAndw== X-Received: by 2002:a1c:202:0:b0:38e:ab4b:ce72 with SMTP id 2-20020a1c0202000000b0038eab4bce72mr13477180wmc.152.1649690579179; Mon, 11 Apr 2022 08:22:59 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:58 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v2 12/14] ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards Date: Mon, 11 Apr 2022 17:22:32 +0200 Message-Id: <20220411152234.12678-13-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++++++ arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 +++++++++++++++++++ 3 files changed, 200 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ae3cac8e653b..cb4cf5453a9f 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -459,6 +459,8 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ imx6dl-colibri-eval-v3.dtb \ + imx6dl-colibri-iris.dtb \ + imx6dl-colibri-iris-v2.dtb \ imx6dl-cubox-i.dtb \ imx6dl-cubox-i-emmc-som-v15.dtb \ imx6dl-cubox-i-som-v15.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts b/arch/arm/boot/d= ts/imx6dl-colibri-iris-v2.dts new file mode 100644 index 000000000000..3a6d3889760d --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6dl-colibri-iris.dts" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board"; + compatible =3D "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enable_3v3_vmmc>; + regulator-name =3D "3v3_vmmc"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio2 11 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <100>; + enable-active-high; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>; + + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins =3D < + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; +}; + +/* Colibri MMC */ +&usdhc1 { + cap-power-off-card; + /* uncomment the following to enable SD card UHS mode if you have a V1.1 = module */ + /* /delete-property/ no-1-8-v; */ + vmmc-supply =3D <®_3v3_vmmc>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/= imx6dl-colibri-iris.dts new file mode 100644 index 000000000000..cf77d894f6d7 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include +#include +#include "imx6dl.dtsi" +#include "imx6qdl-colibri.dtsi" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Iris Board"; + compatible =3D "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + aliases { + i2c0 =3D &i2c2; + i2c1 =3D &i2c3; + }; + + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &snvs_rtc; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; +}; + +/* Colibri SSP */ +&ecspi4 { + status =3D "okay"; +}; + +&gpio2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>; + + /* + * uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one + * wants to turn the transceiver off, that property has to be deleted + * and the gpio handled in userspace. + * The same applies to uart-b-c-on-x14-enable where the UART_B and + * UART_C transceiver is turned on. + */ + uart-a-on-x13-enable-hog { + gpio-hog; + gpios =3D <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; + + uart-b-c-on-x14-enable-hog { + gpio-hog; + gpios =3D <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +/* + * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) + */ +&i2c3 { + status =3D "okay"; + + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D < + &pinctrl_gpio_iris + &pinctrl_usbh_oc_1 + &pinctrl_usbc_id_1 + >; + + pinctrl_gpio_iris: gpioirisgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 + MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + + pinctrl_uart1_forceoff: uart1forceoffgrp { + fsl,pins =3D < + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 + >; + }; + + pinctrl_uart23_forceoff: uart23forceoffgrp { + fsl,pins =3D < + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + >; + }; +}; + +&pwm1 { + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +&pwm3 { + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +®_usb_host_vbus { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart3 { + status =3D "okay"; +}; + +&usbh1 { + vbus-supply =3D <®_usb_host_vbus>; + status =3D "okay"; +}; + +&usbotg { + status =3D "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + status =3D "okay"; +}; --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 66668C433EF for ; Mon, 11 Apr 2022 15:24:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345015AbiDKP0g (ORCPT ); Mon, 11 Apr 2022 11:26:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347937AbiDKPZ2 (ORCPT ); Mon, 11 Apr 2022 11:25:28 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9A9B83CA57; Mon, 11 Apr 2022 08:23:01 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id t1so5848500wra.4; Mon, 11 Apr 2022 08:23:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ekfMytrXwLVzydWFQD06PuCm7n67RUjTXkiwu4FLXvs=; b=aPxWMdR75gd/4D6Lsy6bAdNv0SFjCryWfPLl0w8KOOFtNAf6s1SZSqbCXAVbLWd+pJ 2tTqjN3kozCFtNuc/PN8hFZqutlTtsh/gHPGftDNhxG4JPtbZST4fWvNiuo+T7gD7RQl KzfBE/DA1IKlP/reHOiDpH6HeD4XrFZgxm6ac22fWqoXeEOMZTRosDaETGcLRg3unKWL nPJPPc9qkiYLpcE8KqrfdhRDPcvA0xdrlinX/RGxfnIhohqNJhhXaIosDMuDTcIrZmff cnE6kGmOQ/AqZcsskhOq8ko0TJ0mREy2BZKs/dkcFGqKYi22PK4Jy2ayKpnUdP+CNRy0 cSDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ekfMytrXwLVzydWFQD06PuCm7n67RUjTXkiwu4FLXvs=; b=390Nc54jA22Pr3FC2wvTTDR+XOwAVNgM5Zdg261Sy9zuJ/5e5iyyG7h5wCCYPtsc44 HYarHlA02kTOCEimcPrEnsIEb+swwsf7gNq5C8vDh50lPjkh0t9ofHI1Uox0B7geoHRY BVDyQ4SkEmutINrKGZH54bmazINu6O0u1lrqrpyCq22M3RbWAK/xY/tIT7msar3Vv+oW gfTzk+Jh9MZgy2fxnagG0hMM8UuJzFnDwKIBpRiG8P4sxJlQYb2clKbsWyHtK/DqXtYN 3InLYSjfP1FJhmwqp8MX9G3c2TnZ6NU73LSeQc3hdAhyLk1BAj74ujRFiqFpdoQu5Wg1 xoLA== X-Gm-Message-State: AOAM531B/5JgOprIaDDnX1TASxNj0Lwga+0szJFu7M59EG1WzjHHF7Jw RpYFiYHgmYKVo3MOQbDUkLA= X-Google-Smtp-Source: ABdhPJw5in+mLmhkhW+3PfyFB6K3625bOXc51YWBV1OlklZNsIStdVNwB/LtUZwhDul2D2AeAHJ4vQ== X-Received: by 2002:a05:6000:18ae:b0:204:62a:20f4 with SMTP id b14-20020a05600018ae00b00204062a20f4mr26767163wri.640.1649690580241; Mon, 11 Apr 2022 08:23:00 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.22.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:22:59 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , Krzysztof Kozlowski , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v2 13/14] ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board Date: Mon, 11 Apr 2022 17:22:33 +0200 Message-Id: <20220411152234.12678-14-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher Add support for Toradex Aster, small form-factor with header compatible with Arduino Uno and Raspberry Pi (RPi) maker boards. Additional detail available at https://www.toradex.com/products/carrier-boards/aster-carrier-board Signed-off-by: Max Krummenacher --- (no changes since v1) arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index cb4cf5453a9f..f0e5fc7e5274 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -458,6 +458,7 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos_7.dtb \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ + imx6dl-colibri-aster.dtb \ imx6dl-colibri-eval-v3.dtb \ imx6dl-colibri-iris.dtb \ imx6dl-colibri-iris-v2.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts= /imx6dl-colibri-aster.dts new file mode 100644 index 000000000000..74e8a6cd8bed --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include +#include +#include "imx6dl.dtsi" +#include "imx6qdl-colibri.dtsi" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Aster Board"; + compatible =3D "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + aliases { + i2c0 =3D &i2c2; + i2c1 =3D &i2c3; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; +}; + +/* Colibri SSP */ +&ecspi4 { + cs-gpios =3D < + &gpio5 2 GPIO_ACTIVE_HIGH + &gpio5 4 GPIO_ACTIVE_HIGH + >; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>; + status =3D "okay"; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c3 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D < + &pinctrl_csi_gpio_1 + &pinctrl_gpio_2 + &pinctrl_gpio_aster + &pinctrl_usbh_oc_1 + &pinctrl_usbc_id_1 + &pinctrl_weim_gpio_5 + >; + + pinctrl_gpio_aster: gpioaster { + fsl,pins =3D < + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; +}; + +&pwm1 { + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +&pwm3 { + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +®_usb_host_vbus { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart3 { + status =3D "okay"; +}; + +&usbh1 { + vbus-supply =3D <®_usb_host_vbus>; + status =3D "okay"; +}; + +&usbotg { + status =3D "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + status =3D "okay"; +}; --=20 2.20.1 From nobody Tue Jun 9 21:27:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67325C433F5 for ; Mon, 11 Apr 2022 15:24:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344310AbiDKP0x (ORCPT ); Mon, 11 Apr 2022 11:26:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347950AbiDKPZ3 (ORCPT ); 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id a9-20020a7bc1c9000000b0038eb67e966esm5209374wmj.29.2022.04.11.08.23.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Apr 2022 08:23:00 -0700 (PDT) From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Alistair Francis , Douglas Anderson , Fabio Estevam , Marcel Ziswiler , NXP Linux Team , Otavio Salvador , Pascal Zimmermann , Pengutronix Kernel Team , Russell King , Sam Ravnborg , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 14/14] ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD Date: Mon, 11 Apr 2022 17:22:34 +0200 Message-Id: <20220411152234.12678-15-max.oss.09@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220411152234.12678-1-max.oss.09@gmail.com> References: <20220411152234.12678-1-max.oss.09@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Max Krummenacher The SoM Apalis/Colibri iMX6 use the ADC of a STMPE 811. Enable its driver. Signed-off-by: Max Krummenacher --- Changes in v2: - Addressed 'From' address as reported by checkpatch / Shawn's feedback. - Added Rob's Ack to the 'dt-bindings' patches. arch/arm/configs/imx_v6_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6= _v7_defconfig index f7498df08dfe..88a3602c4e58 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -402,6 +402,7 @@ CONFIG_IIO=3Dy CONFIG_MMA8452=3Dy CONFIG_IMX7D_ADC=3Dy CONFIG_RN5T618_ADC=3Dy +CONFIG_STMPE_ADC=3Dy CONFIG_VF610_ADC=3Dy CONFIG_SENSORS_ISL29018=3Dy CONFIG_MAG3110=3Dy --=20 2.20.1