From nobody Mon May 11 08:31:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2A3FFC433EF for ; Mon, 11 Apr 2022 04:46:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244301AbiDKEs7 (ORCPT ); Mon, 11 Apr 2022 00:48:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48952 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241741AbiDKEsw (ORCPT ); Mon, 11 Apr 2022 00:48:52 -0400 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F28AC1FA55; Sun, 10 Apr 2022 21:46:39 -0700 (PDT) Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailout.west.internal (Postfix) with ESMTP id 99FF13200EAD; Mon, 11 Apr 2022 00:46:38 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Mon, 11 Apr 2022 00:46:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sholland.org; h= cc:cc:content-transfer-encoding:date:date:from:from:in-reply-to :in-reply-to:message-id:mime-version:references:reply-to:sender :subject:subject:to:to; s=fm2; t=1649652398; x=1649738798; bh=gL LJXvPow1EyaPPDjH9fdOoNOR+1/wWYRGyiSoUxs+o=; b=uWTJmjUG7vENZM/afU 2cf4iOilAoGPRqbcBRu9ALpyB+eHsRT3ogDmEs8uFt7BDGU2xC47oUSztbuatPOD +3lP+SeSp/iJAiE3dHlBMRNuNdj3K3ZXRZ+D6ziSx4m0zqmjrCzzZYT1PG/ukEg4 CxAIJSq8RqRih8ookNt1kSdZHZxzmWQi+nFKgDIIW3uMBhBHfTsvVXsaRpxLo/SZ MASlC3srIL7d7P0T/CxW6cfKJwJ6D1hR75FHx3K+TeKBlmhgsKXb1hDzh1eSTAaZ bK2JH6v0RUETxf3phCNA3D9JaJLPcFBy8TCvIh7fk+qooACm3UcqTCAoizfX+cNq G8iQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding:date:date :from:from:in-reply-to:in-reply-to:message-id:mime-version :references:reply-to:sender:subject:subject:to:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; t= 1649652398; x=1649738798; bh=gLLJXvPow1EyaPPDjH9fdOoNOR+1/wWYRGy iSoUxs+o=; b=TOgUOZFimHb6KQFyoo1Lux1Vg5FMdsusJtXa0PUvaUs2Zx5xwXx wme4enkIaFsIM2ytdb1D1SliqBw8yhx76ryP3rnSvY1VTwYi6hZsnAsR+iWrywQ4 CBKP486DUZV9xE8P+wTF4DtAAXPmaTQ9q7VHltEczNQw5XMJqJlOgvqDyEqa2IIM Nfz0aoAbAOO0hCDx5WKQ2Vt+k4TyjXe+70mzEtovRHP18PThRO2XXjzq7Da85Te3 prXbvlh/AaGmRU246Z9Ns3GgKE6twHKthNNRnHZgLFVuap281okkC/cU1E3fKde0 XVbohtlgj1m3qjhK9rdurYHKejLtUNAUUUw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvvddrudekhedgkeduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvufffkffojghfggfgsedtkeertdertddtnecuhfhrohhmpefurghmuhgv lhcujfholhhlrghnugcuoehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhgqeenucggtf frrghtthgvrhhnpeduhfejfedvhffgfeehtefghfeiiefgfeehgfdvvdevfeegjeehjedv gfejheeuieenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhroh hmpehsrghmuhgvlhesshhhohhllhgrnhgurdhorhhg X-ME-Proxy: Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 11 Apr 2022 00:46:37 -0400 (EDT) From: Samuel Holland To: Vinod Koul , dmaengine@vger.kernel.org Cc: Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Maxime Ripard , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Rob Herring , Maxime Ripard Subject: [PATCH v2 1/4] dt-bindings: dma: sun50i-a64: Add compatible for D1 Date: Sun, 10 Apr 2022 23:46:29 -0500 Message-Id: <20220411044633.39014-2-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411044633.39014-1-samuel@sholland.org> References: <20220411044633.39014-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" D1 has a DMA controller similar to the one in other Allwinner SoCs. Add its compatible, and include it in the list of variants with a separate MBUS clock gate. Acked-by: Rob Herring Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- (no changes since v1) .../bindings/dma/allwinner,sun50i-a64-dma.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma= .yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml index b6e1ebfaf366..ff0a5c58d78c 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -20,9 +20,11 @@ properties: =20 compatible: oneOf: - - const: allwinner,sun50i-a64-dma - - const: allwinner,sun50i-a100-dma - - const: allwinner,sun50i-h6-dma + - enum: + - allwinner,sun20i-d1-dma + - allwinner,sun50i-a64-dma + - allwinner,sun50i-a100-dma + - allwinner,sun50i-h6-dma - items: - const: allwinner,sun8i-r40-dma - const: allwinner,sun50i-a64-dma @@ -58,6 +60,7 @@ if: properties: compatible: enum: + - allwinner,sun20i-d1-dma - allwinner,sun50i-a100-dma - allwinner,sun50i-h6-dma =20 --=20 2.35.1 From nobody Mon May 11 08:31:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC284C433F5 for ; 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Mon, 11 Apr 2022 00:46:40 -0400 (EDT) From: Samuel Holland To: Vinod Koul , dmaengine@vger.kernel.org Cc: Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Maxime Ripard , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Maxime Ripard Subject: [PATCH v2 2/4] dmaengine: sun6i: Do not use virt_to_phys Date: Sun, 10 Apr 2022 23:46:30 -0500 Message-Id: <20220411044633.39014-3-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411044633.39014-1-samuel@sholland.org> References: <20220411044633.39014-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This breaks on RISC-V, because dma_pool_alloc returns addresses which are not in the linear map. Instead, plumb through the physical address which is already known anyway. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland Reported-by: kernel test robot --- (no changes since v1) drivers/dma/sun6i-dma.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index 5cadd4d2b824..a9334f969b28 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -241,9 +241,7 @@ static inline void sun6i_dma_dump_com_regs(struct sun6i= _dma_dev *sdev) static inline void sun6i_dma_dump_chan_regs(struct sun6i_dma_dev *sdev, struct sun6i_pchan *pchan) { - phys_addr_t reg =3D virt_to_phys(pchan->base); - - dev_dbg(sdev->slave.dev, "Chan %d reg: %pa\n" + dev_dbg(sdev->slave.dev, "Chan %d reg: 0x%lx\n" "\t___en(%04x): \t0x%08x\n" "\tpause(%04x): \t0x%08x\n" "\tstart(%04x): \t0x%08x\n" @@ -252,7 +250,7 @@ static inline void sun6i_dma_dump_chan_regs(struct sun6= i_dma_dev *sdev, "\t__dst(%04x): \t0x%08x\n" "\tcount(%04x): \t0x%08x\n" "\t_para(%04x): \t0x%08x\n\n", - pchan->idx, ®, + pchan->idx, pchan->base - sdev->base, DMA_CHAN_ENABLE, readl(pchan->base + DMA_CHAN_ENABLE), DMA_CHAN_PAUSE, @@ -385,17 +383,16 @@ static void *sun6i_dma_lli_add(struct sun6i_dma_lli *= prev, } =20 static inline void sun6i_dma_dump_lli(struct sun6i_vchan *vchan, - struct sun6i_dma_lli *lli) + struct sun6i_dma_lli *v_lli, + dma_addr_t p_lli) { - phys_addr_t p_lli =3D virt_to_phys(lli); - dev_dbg(chan2dev(&vchan->vc.chan), - "\n\tdesc: p - %pa v - 0x%p\n" + "\n\tdesc:\tp - %pad v - 0x%p\n" "\t\tc - 0x%08x s - 0x%08x d - 0x%08x\n" "\t\tl - 0x%08x p - 0x%08x n - 0x%08x\n", - &p_lli, lli, - lli->cfg, lli->src, lli->dst, - lli->len, lli->para, lli->p_lli_next); + &p_lli, v_lli, + v_lli->cfg, v_lli->src, v_lli->dst, + v_lli->len, v_lli->para, v_lli->p_lli_next); } =20 static void sun6i_dma_free_desc(struct virt_dma_desc *vd) @@ -445,7 +442,7 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vch= an) pchan->desc =3D to_sun6i_desc(&desc->tx); pchan->done =3D NULL; =20 - sun6i_dma_dump_lli(vchan, pchan->desc->v_lli); + sun6i_dma_dump_lli(vchan, pchan->desc->v_lli, pchan->desc->p_lli); =20 irq_reg =3D pchan->idx / DMA_IRQ_CHAN_NR; irq_offset =3D pchan->idx % DMA_IRQ_CHAN_NR; @@ -670,7 +667,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_d= ma_memcpy( =20 sun6i_dma_lli_add(NULL, v_lli, p_lli, txd); =20 - sun6i_dma_dump_lli(vchan, v_lli); + sun6i_dma_dump_lli(vchan, v_lli, p_lli); =20 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); =20 @@ -746,14 +743,16 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep= _slave_sg( } =20 dev_dbg(chan2dev(chan), "First: %pad\n", &txd->p_lli); - for (prev =3D txd->v_lli; prev; prev =3D prev->v_lli_next) - sun6i_dma_dump_lli(vchan, prev); + for (p_lli =3D txd->p_lli, v_lli =3D txd->v_lli; v_lli; + p_lli =3D v_lli->p_lli_next, v_lli =3D v_lli->v_lli_next) + sun6i_dma_dump_lli(vchan, v_lli, p_lli); =20 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); =20 err_lli_free: - for (prev =3D txd->v_lli; prev; prev =3D prev->v_lli_next) - dma_pool_free(sdev->pool, prev, virt_to_phys(prev)); + for (p_lli =3D txd->p_lli, v_lli =3D txd->v_lli; v_lli; + p_lli =3D v_lli->p_lli_next, v_lli =3D v_lli->v_lli_next) + dma_pool_free(sdev->pool, v_lli, p_lli); kfree(txd); return NULL; } @@ -820,8 +819,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_d= ma_cyclic( return vchan_tx_prep(&vchan->vc, &txd->vd, flags); =20 err_lli_free: - for (prev =3D txd->v_lli; prev; prev =3D prev->v_lli_next) - dma_pool_free(sdev->pool, prev, virt_to_phys(prev)); + for (p_lli =3D txd->p_lli, v_lli =3D txd->v_lli; v_lli; + p_lli =3D v_lli->p_lli_next, v_lli =3D v_lli->v_lli_next) + dma_pool_free(sdev->pool, v_lli, p_lli); kfree(txd); return NULL; } --=20 2.35.1 From nobody Mon May 11 08:31:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E6720C4332F for ; Mon, 11 Apr 2022 04:47:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232402AbiDKEtL (ORCPT ); Mon, 11 Apr 2022 00:49:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242260AbiDKEs7 (ORCPT ); Mon, 11 Apr 2022 00:48:59 -0400 Received: from wout1-smtp.messagingengine.com (wout1-smtp.messagingengine.com [64.147.123.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 15FBA35DCD; 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Mon, 11 Apr 2022 00:46:43 -0400 (EDT) From: Samuel Holland To: Vinod Koul , dmaengine@vger.kernel.org Cc: Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Maxime Ripard , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Maxime Ripard Subject: [PATCH v2 3/4] dmaengine: sun6i: Add support for 34-bit physical addresses Date: Sun, 10 Apr 2022 23:46:31 -0500 Message-Id: <20220411044633.39014-4-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411044633.39014-1-samuel@sholland.org> References: <20220411044633.39014-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Recent Allwinner SoCs support >4 GiB of DRAM, so those variants of the DMA engine support >32 bit physical addresses. This is accomplished by placing the high bits in the "para" word in the DMA descriptor. DMA descriptors themselves can be located at >32 bit addresses by putting the high bits in the LSBs of the descriptor address register, taking advantage of the required DMA descriptor alignment. However, support for this is not really necessary, so we can avoid the complication by allocating them from the DMA_32 zone. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland Reported-by: kernel test robot --- Changes in v2: - Fix `checkpatch.pl --strict` style issues (missing spaces) drivers/dma/sun6i-dma.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index a9334f969b28..bd5958185ed1 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -90,6 +90,14 @@ =20 #define DMA_CHAN_CUR_PARA 0x1c =20 +/* + * LLI address mangling + * + * The LLI link physical address is also mangled, but we avoid dealing + * with that by allocating LLIs from the DMA32 zone. + */ +#define SET_SRC_HIGH_ADDR(x) ((((x) >> 32) & 0x3U) << 16) +#define SET_DST_HIGH_ADDR(x) ((((x) >> 32) & 0x3U) << 18) =20 /* * Various hardware related defines @@ -132,6 +140,7 @@ struct sun6i_dma_config { u32 dst_burst_lengths; u32 src_addr_widths; u32 dst_addr_widths; + bool has_high_addr; bool has_mbus_clk; }; =20 @@ -223,6 +232,12 @@ to_sun6i_desc(struct dma_async_tx_descriptor *tx) return container_of(tx, struct sun6i_desc, vd.tx); } =20 +static inline bool sun6i_dma_has_high_addr(struct sun6i_dma_dev *sdev) +{ + return IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && + sdev->cfg->has_high_addr; +} + static inline void sun6i_dma_dump_com_regs(struct sun6i_dma_dev *sdev) { dev_dbg(sdev->slave.dev, "Common register:\n" @@ -645,7 +660,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_d= ma_memcpy( if (!txd) return NULL; =20 - v_lli =3D dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); + v_lli =3D dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); if (!v_lli) { dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); goto err_txd_free; @@ -655,6 +670,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_d= ma_memcpy( v_lli->dst =3D dest; v_lli->len =3D len; v_lli->para =3D NORMAL_WAIT; + if (sun6i_dma_has_high_addr(sdev)) + v_lli->para |=3D SET_SRC_HIGH_ADDR(src) | + SET_DST_HIGH_ADDR(dest); =20 burst =3D convert_burst(8); width =3D convert_buswidth(DMA_SLAVE_BUSWIDTH_4_BYTES); @@ -705,7 +723,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_s= lave_sg( return NULL; =20 for_each_sg(sgl, sg, sg_len, i) { - v_lli =3D dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); + v_lli =3D dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); if (!v_lli) goto err_lli_free; =20 @@ -715,6 +733,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_s= lave_sg( if (dir =3D=3D DMA_MEM_TO_DEV) { v_lli->src =3D sg_dma_address(sg); v_lli->dst =3D sconfig->dst_addr; + if (sun6i_dma_has_high_addr(sdev)) + v_lli->para |=3D SET_SRC_HIGH_ADDR(sg_dma_address(sg)) | + SET_DST_HIGH_ADDR(sconfig->dst_addr); v_lli->cfg =3D lli_cfg; sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); @@ -728,6 +749,9 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_s= lave_sg( } else { v_lli->src =3D sconfig->src_addr; v_lli->dst =3D sg_dma_address(sg); + if (sun6i_dma_has_high_addr(sdev)) + v_lli->para |=3D SET_SRC_HIGH_ADDR(sconfig->src_addr) | + SET_DST_HIGH_ADDR(sg_dma_address(sg)); v_lli->cfg =3D lli_cfg; sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); @@ -786,7 +810,7 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep_d= ma_cyclic( return NULL; =20 for (i =3D 0; i < periods; i++) { - v_lli =3D dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); + v_lli =3D dma_pool_alloc(sdev->pool, GFP_DMA32 | GFP_NOWAIT, &p_lli); if (!v_lli) { dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); goto err_lli_free; @@ -798,12 +822,18 @@ static struct dma_async_tx_descriptor *sun6i_dma_prep= _dma_cyclic( if (dir =3D=3D DMA_MEM_TO_DEV) { v_lli->src =3D buf_addr + period_len * i; v_lli->dst =3D sconfig->dst_addr; + if (sun6i_dma_has_high_addr(sdev)) + v_lli->para |=3D SET_SRC_HIGH_ADDR(buf_addr + period_len * i) | + SET_DST_HIGH_ADDR(sconfig->dst_addr); v_lli->cfg =3D lli_cfg; sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); } else { v_lli->src =3D sconfig->src_addr; v_lli->dst =3D buf_addr + period_len * i; + if (sun6i_dma_has_high_addr(sdev)) + v_lli->para |=3D SET_SRC_HIGH_ADDR(sconfig->src_addr) | + SET_DST_HIGH_ADDR(buf_addr + period_len * i); v_lli->cfg =3D lli_cfg; sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); @@ -1174,8 +1204,6 @@ static struct sun6i_dma_config sun50i_a64_dma_cfg =3D= { }; =20 /* - * TODO: Add support for more than 4g physical addressing. - * * The A100 binding uses the number of dma channels from the * device tree node. */ @@ -1194,6 +1222,7 @@ static struct sun6i_dma_config sun50i_a100_dma_cfg = =3D { BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_4_BYTES) | BIT(DMA_SLAVE_BUSWIDTH_8_BYTES), + .has_high_addr =3D true, .has_mbus_clk =3D true, }; =20 --=20 2.35.1 From nobody Mon May 11 08:31:46 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA772C433F5 for ; Mon, 11 Apr 2022 04:47:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244678AbiDKEtT (ORCPT ); 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Mon, 11 Apr 2022 00:46:46 -0400 (EDT) From: Samuel Holland To: Vinod Koul , dmaengine@vger.kernel.org Cc: Samuel Holland , Chen-Yu Tsai , Jernej Skrabec , Krzysztof Kozlowski , Maxime Ripard , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev, Maxime Ripard Subject: [PATCH v2 4/4] dmaengine: sun6i: Add support for the D1 variant Date: Sun, 10 Apr 2022 23:46:32 -0500 Message-Id: <20220411044633.39014-5-samuel@sholland.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220411044633.39014-1-samuel@sholland.org> References: <20220411044633.39014-1-samuel@sholland.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" So far it appears to match the configuration of the A100 variant. Since D1 is a RISC-V chip, it does not meet any of the existing dependencies for this driver, so relax the dependency somewhat. Acked-by: Maxime Ripard Signed-off-by: Samuel Holland --- (no changes since v1) drivers/dma/Kconfig | 2 +- drivers/dma/sun6i-dma.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index d5de3f77d3aa..b6845303cf7e 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -163,7 +163,7 @@ config DMA_SUN4I =20 config DMA_SUN6I tristate "Allwinner A31 SoCs DMA support" - depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_T= EST + depends on ARCH_SUNXI || COMPILE_TEST depends on RESET_CONTROLLER select DMA_ENGINE select DMA_VIRTUAL_CHANNELS diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c index bd5958185ed1..1b95e93c14ee 100644 --- a/drivers/dma/sun6i-dma.c +++ b/drivers/dma/sun6i-dma.c @@ -1277,6 +1277,7 @@ static const struct of_device_id sun6i_dma_match[] = =3D { { .compatible =3D "allwinner,sun8i-a83t-dma", .data =3D &sun8i_a83t_dma_c= fg }, { .compatible =3D "allwinner,sun8i-h3-dma", .data =3D &sun8i_h3_dma_cfg }, { .compatible =3D "allwinner,sun8i-v3s-dma", .data =3D &sun8i_v3s_dma_cfg= }, + { .compatible =3D "allwinner,sun20i-d1-dma", .data =3D &sun50i_a100_dma_c= fg }, { .compatible =3D "allwinner,sun50i-a64-dma", .data =3D &sun50i_a64_dma_c= fg }, { .compatible =3D "allwinner,sun50i-a100-dma", .data =3D &sun50i_a100_dma= _cfg }, { .compatible =3D "allwinner,sun50i-h6-dma", .data =3D &sun50i_h6_dma_cfg= }, --=20 2.35.1