From nobody Sun Sep 22 07:37:39 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AA91FC433EF for ; Fri, 8 Apr 2022 05:00:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234636AbiDHFCS (ORCPT ); Fri, 8 Apr 2022 01:02:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38968 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234476AbiDHFBa (ORCPT ); Fri, 8 Apr 2022 01:01:30 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 45D2F19FF51; Thu, 7 Apr 2022 21:59:25 -0700 (PDT) X-UUID: 1410479cdc07460b85b179191d2d917e-20220408 X-UUID: 1410479cdc07460b85b179191d2d917e-20220408 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 259517897; Fri, 08 Apr 2022 12:59:14 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 12:59:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 12:59:12 +0800 From: Rex-BC Chen To: , , , CC: , , , , , , , , , Subject: [PATCH V2 11/15] cpufreq: mediatek: Update logic of voltage_tracking() Date: Fri, 8 Apr 2022 12:59:04 +0800 Message-ID: <20220408045908.21671-12-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220408045908.21671-1-rex-bc.chen@mediatek.com> References: <20220408045908.21671-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Jia-Wei Chang - Remove VOLT_TOL because CCI may share the same sram and vproc regulators with CPU. Therefore, set the max voltage in regulator_set_voltage() to the proc{sram}_max_volt. - Move comparison of new and old voltages to mtk_cpufreq_voltage_tracking(). Signed-off-by: Jia-Wei Chang --- drivers/cpufreq/mediatek-cpufreq.c | 130 ++++++++--------------------- 1 file changed, 34 insertions(+), 96 deletions(-) diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-= cpufreq.c index 8f688d47e64b..e69b16a6541e 100644 --- a/drivers/cpufreq/mediatek-cpufreq.c +++ b/drivers/cpufreq/mediatek-cpufreq.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -15,8 +16,6 @@ #include #include =20 -#define VOLT_TOL (10000) - struct mtk_cpufreq_platform_data { int min_volt_shift; int max_volt_shift; @@ -93,91 +92,44 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_= dvfs_info *info, pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc); return old_vproc; } - /* Vsram should not exceed the maximum allowed voltage of SoC. */ - new_vsram =3D min(new_vproc + soc_data->min_volt_shift, - soc_data->sram_max_volt); - - if (old_vproc < new_vproc) { - /* - * When scaling up voltages, Vsram and Vproc scale up step - * by step. At each step, set Vsram to (Vproc + 200mV) first, - * then set Vproc to (Vsram - 100mV). - * Keep doing it until Vsram and Vproc hit target voltages. - */ - do { - old_vsram =3D regulator_get_voltage(sram_reg); - if (old_vsram < 0) { - pr_err("%s: invalid Vsram value: %d\n", - __func__, old_vsram); - return old_vsram; - } - old_vproc =3D regulator_get_voltage(proc_reg); - if (old_vproc < 0) { - pr_err("%s: invalid Vproc value: %d\n", - __func__, old_vproc); - return old_vproc; - } =20 - vsram =3D min(new_vsram, - old_vproc + soc_data->min_volt_shift); - - if (vsram + VOLT_TOL >=3D soc_data->sram_max_volt) { - vsram =3D soc_data->sram_max_volt; + old_vsram =3D regulator_get_voltage(sram_reg); + if (old_vsram < 0) { + pr_err("%s: invalid Vsram value: %d\n", __func__, old_vsram); + return old_vsram; + } =20 - /* - * If the target Vsram hits the maximum voltage, - * try to set the exact voltage value first. - */ - ret =3D regulator_set_voltage(sram_reg, vsram, - vsram); - if (ret) - ret =3D regulator_set_voltage(sram_reg, - vsram - VOLT_TOL, - vsram); + new_vsram =3D clamp(new_vproc + soc_data->min_volt_shift, + soc_data->sram_min_volt, soc_data->sram_max_volt); =20 - vproc =3D new_vproc; - } else { - ret =3D regulator_set_voltage(sram_reg, vsram, - vsram + VOLT_TOL); + do { + if (old_vproc <=3D new_vproc) { + vsram =3D clamp(old_vproc + soc_data->max_volt_shift, + soc_data->sram_min_volt, new_vsram); + ret =3D regulator_set_voltage(sram_reg, vsram, + soc_data->sram_max_volt); =20 - vproc =3D vsram - soc_data->min_volt_shift; - } if (ret) return ret; =20 + if (vsram =3D=3D soc_data->sram_max_volt || + new_vsram =3D=3D soc_data->sram_min_volt) + vproc =3D new_vproc; + else + vproc =3D vsram - soc_data->min_volt_shift; + ret =3D regulator_set_voltage(proc_reg, vproc, - vproc + VOLT_TOL); + soc_data->proc_max_volt); if (ret) { regulator_set_voltage(sram_reg, old_vsram, - old_vsram); + soc_data->sram_max_volt); return ret; } - } while (vproc < new_vproc || vsram < new_vsram); - } else if (old_vproc > new_vproc) { - /* - * When scaling down voltages, Vsram and Vproc scale down step - * by step. At each step, set Vproc to (Vsram - 200mV) first, - * then set Vproc to (Vproc + 100mV). - * Keep doing it until Vsram and Vproc hit target voltages. - */ - do { - old_vproc =3D regulator_get_voltage(proc_reg); - if (old_vproc < 0) { - pr_err("%s: invalid Vproc value: %d\n", - __func__, old_vproc); - return old_vproc; - } - old_vsram =3D regulator_get_voltage(sram_reg); - if (old_vsram < 0) { - pr_err("%s: invalid Vsram value: %d\n", - __func__, old_vsram); - return old_vsram; - } - + } else if (old_vproc > new_vproc) { vproc =3D max(new_vproc, old_vsram - soc_data->max_volt_shift); ret =3D regulator_set_voltage(proc_reg, vproc, - vproc + VOLT_TOL); + soc_data->proc_max_volt); if (ret) return ret; =20 @@ -187,32 +139,18 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cp= u_dvfs_info *info, vsram =3D max(new_vsram, vproc + soc_data->min_volt_shift); =20 - if (vsram + VOLT_TOL >=3D soc_data->sram_max_volt) { - vsram =3D soc_data->sram_max_volt; - - /* - * If the target Vsram hits the maximum voltage, - * try to set the exact voltage value first. - */ - ret =3D regulator_set_voltage(sram_reg, vsram, - vsram); - if (ret) - ret =3D regulator_set_voltage(sram_reg, - vsram - VOLT_TOL, - vsram); - } else { - ret =3D regulator_set_voltage(sram_reg, vsram, - vsram + VOLT_TOL); - } - + ret =3D regulator_set_voltage(sram_reg, vsram, + soc_data->sram_max_volt); if (ret) { regulator_set_voltage(proc_reg, old_vproc, - old_vproc); + soc_data->proc_max_volt); return ret; } - } while (vproc > new_vproc + VOLT_TOL || - vsram > new_vsram + VOLT_TOL); - } + } + + old_vproc =3D vproc; + old_vsram =3D vsram; + } while (vproc !=3D new_vproc || vsram !=3D new_vsram); =20 return 0; } @@ -272,8 +210,8 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy= *policy, * If the new voltage or the intermediate voltage is higher than the * current voltage, scale up voltage first. */ - target_vproc =3D (inter_vproc > vproc) ? inter_vproc : vproc; - if (old_vproc < target_vproc) { + target_vproc =3D max(inter_vproc, vproc); + if (old_vproc <=3D target_vproc) { ret =3D mtk_cpufreq_set_voltage(info, target_vproc); if (ret) { pr_err("cpu%d: failed to scale up voltage!\n", --=20 2.18.0