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[188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:26 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 1/4] dt-bindings: clock: qcom,gcc-sdm845: add parent power domain Date: Fri, 1 Apr 2022 16:58:17 +0200 Message-Id: <20220401145820.1003826-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Allow Qualcomm GCC to register its parent power domain (e.g. RPMHPD) to properly pass performance state from children. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b= /Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml index d902f137ab17..5fe1b2c42d5a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml @@ -43,6 +43,9 @@ properties: '#reset-cells': const: 1 =20 + powert-domains: + maxItems: 1 + '#power-domain-cells': const: 1 =20 --=20 2.32.0 From nobody Fri Jun 19 16:08:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91398C4707E for ; Fri, 1 Apr 2022 15:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1355887AbiDAPpu (ORCPT ); Fri, 1 Apr 2022 11:45:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1348967AbiDAPQ4 (ORCPT ); Fri, 1 Apr 2022 11:16:56 -0400 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B3B956C23 for ; Fri, 1 Apr 2022 07:58:29 -0700 (PDT) Received: by mail-wm1-x32f.google.com with SMTP id l9-20020a05600c4f0900b0038ccd1b8642so3605315wmq.0 for ; Fri, 01 Apr 2022 07:58:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yqbLlrGI5hQozEiXWqvYHfniIQNP30Oy/0VrdHfx3iM=; b=V6jnvv6r9YfrqJxCPQR1XE4lXQoRmZhPDn4dIIIzVBExn/Frnd7K88FyQ3Azz/4YCe pb5ofMYAupzvIsopvutp/5h8LqWvqPHviJGWrqON/KjZwQmjwY58XoYOLeIxJMd1daXd igXzQKXqdMtUL5UCNndmU7iBMC2SnoJdqy//ej5rcFNMasoLMR598HrXFn3iMJVjb5fU +76H9dZ62+a6XeB2CAVqEmKGjMiFbpgFyhg9dzu3FM5ETYFde6rBqPxj5/Z5TCFleIqI xeHbP/8+XCwa/zzfdo2rc4NsHQw62BC0VFBMESrd65qg1ichA7hFg7AnStI/h0dbf8El Lg/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yqbLlrGI5hQozEiXWqvYHfniIQNP30Oy/0VrdHfx3iM=; b=OA5nLugXVvOqgQjZRiJ3Rh9RG3LcXzYc7DQPYTMs++NbjbAI1MrNCWMwkfKE7fs+KW XddPXh+/pTx9pDbBgg71DBoFPHNq8gK47dxOvSJSFUWkIYOFkemgw7XYg5cvY2ppENH2 bmpXjxtiS1UcIFo+374yt/YY50iNtkavhNbHjYoKtvdFA0rplCnMesGAVxyeJa/RGzuQ CIsAIb6wA2s5TFrfXa/V1/DtI29Zo7MhSzoNdhgCWmHXIxDqhs8V5wkbnm/d9lyZB4FS 7Yg+UNTkczfe5LVo54/wO7Lk5Zp6JJw/v4486HaW4ivE+4DeXrZi3C92UGMqZD0i1oHX v/1g== X-Gm-Message-State: AOAM530ax7REtuFIa+PiOhkRJ+FXMe1zrK06SOEhmBrs+cUxDjFD921L oHDLIhZ3LzuaL83ELDVlIygKRA== X-Google-Smtp-Source: ABdhPJxoCjSfUmJbbPFgP2qiKOG3R/tDXS/3ENLP1/9vqNzDjL9anir03X+Nj40T0FEdFVBXe1N2dA== X-Received: by 2002:a1c:f418:0:b0:38e:579a:da73 with SMTP id z24-20020a1cf418000000b0038e579ada73mr2955585wma.197.1648825107790; Fri, 01 Apr 2022 07:58:27 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:27 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 2/4] dt-bindings: ufs: common: allow OPP table Date: Fri, 1 Apr 2022 16:58:18 +0200 Message-Id: <20220401145820.1003826-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Except scaling UFS and bus clocks, it's necessary to scale also the voltages of regulators or power domain performance state levels. Adding Operating Performance Points table allows to adjust power domain performance state, depending on the UFS clock speed. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/ufs/ufs-common.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Docume= ntation/devicetree/bindings/ufs/ufs-common.yaml index 47a4e9e1a775..ce767bfbf05a 100644 --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml @@ -26,6 +26,9 @@ properties: array is "0" then it is assumed that the frequency is set by the par= ent clock or a fixed rate clock source. =20 + operating-points-v2: true + opp-table: true + interrupts: maxItems: 1 =20 @@ -75,6 +78,7 @@ properties: =20 dependencies: freq-table-hz: [ 'clocks' ] + operating-points-v2: [ 'freq-table-hz' ] =20 required: - interrupts --=20 2.32.0 From nobody Fri Jun 19 16:08:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3BFEC433EF for ; Fri, 1 Apr 2022 15:44:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358302AbiDAPqZ (ORCPT ); Fri, 1 Apr 2022 11:46:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350104AbiDAPRF (ORCPT ); Fri, 1 Apr 2022 11:17:05 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D3F759A44 for ; Fri, 1 Apr 2022 07:58:30 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id l7-20020a05600c1d0700b0038c99618859so3691684wms.2 for ; Fri, 01 Apr 2022 07:58:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=K8iJL2q3As3zzwdz8529fEEZQXinzEbA6iVffO5JCw4=; b=gAw9uKXxBpP0+l/FsExGrFZKGlfbBOnEzDF2KtQgPGeonCt5ot3PcKIvm+oUPMtT8n y5ZqXPaqAarqpi8xfYYLJvu5tzPW9wT70R3am9D7xFITmMFwt4vsYIVqX/n8dhCnsH85 Ai6a5VeuNV4ZTtZBlcot20j4htC0DD/R4/mPB19BrA5i1HyplNnU9mSSOc0QsDhZ44x4 aZfaQ07vN4E/mgE4B1qqbokUKXCPJpaI0z7l5Y7d4Z9vF2GgZScHNyfiIVXhDS4W1IOu mowELakVMDfvVYVilPSjq6nwCjV6Zv1fbAqINaNJAy8z4f/Gw2HMoMgFBEYqlSiY/QWc Go5g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=K8iJL2q3As3zzwdz8529fEEZQXinzEbA6iVffO5JCw4=; b=7Q60ikVWSTPGn19ewCGS/3C+Uh5t+NGn7kc2eigiVBXxvPiPrtMBVFxgG2SC6bu/5K FypdZHltUaZ/x2UXfVBBFSujm2RnXMPH2YadsZKOtJDLWqcX0KQA9lnWiG+9IZbeYVwJ 1wIhtkcenvzcnnqCh91sASl7XwyZBj0ICyOOOS38ccwDVMO9ztUXvV5uG2d8cUl5XNk3 x0GGl9FrM0POpw3XWCuqc+ENWVEpLr7puvupbFdYXsxU76tLMa9DvbfBy/VKR8MGBLLP TXrP1HYhRUeKvc5QU0l8PALach4ts/OGT5RcvhiNVGpYKAFhpHTaasMajvx1rdxKe880 +bVQ== X-Gm-Message-State: AOAM533x4+/2lZFIYqWI9w4LdiQ9hTtm//CZ6aPm/P9y/hgcpcvcAjLI vob3s9I6JpXpGwReL3UdGWKbrg== X-Google-Smtp-Source: ABdhPJzRdJIaIzMFeeJvk97VMkntf14Z4PyRXAxrDx3BRlFhHFG2iJWpnqp97DFOyl9gYTo2sakUJA== X-Received: by 2002:a1c:7308:0:b0:38c:7b63:e385 with SMTP id d8-20020a1c7308000000b0038c7b63e385mr9094276wmb.116.1648825108956; Fri, 01 Apr 2022 07:58:28 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:28 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 3/4] arm64: dts: qcom: sdm845: control RPMHPD performance states with UFS Date: Fri, 1 Apr 2022 16:58:19 +0200 Message-Id: <20220401145820.1003826-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" UFS, when scaling gears, should choose appropriate performance state of RPMHPD power domain controller. Since UFS belongs to UFS_PHY_GDSC power domain, add necessary parent power domain to GCC. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qco= m/sdm845.dtsi index b31bf62e8680..c999b41c2605 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1078,6 +1078,7 @@ gcc: clock-controller@100000 { #clock-cells =3D <1>; #reset-cells =3D <1>; #power-domain-cells =3D <1>; + power-domains =3D <&rpmhpd SDM845_CX>; }; =20 qfprom@784000 { @@ -2336,8 +2337,22 @@ ufs_mem_hc: ufshc@1d84000 { <0 0>, <0 0>, <0 300000000>; - + operating-points-v2 =3D <&ufs_opp_table>; status =3D "disabled"; + + ufs_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-50000000 { + opp-hz =3D /bits/ 64 <50000000>; + required-opps =3D <&rpmhpd_opp_svs>; + }; + + opp-200000000 { + opp-hz =3D /bits/ 64 <200000000>; + required-opps =3D <&rpmhpd_opp_nom>; + }; + }; }; =20 ufs_mem_phy: phy@1d87000 { --=20 2.32.0 From nobody Fri Jun 19 16:08:56 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F114C3527D for ; Fri, 1 Apr 2022 15:44:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1356361AbiDAPqB (ORCPT ); Fri, 1 Apr 2022 11:46:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235756AbiDAPRM (ORCPT ); Fri, 1 Apr 2022 11:17:12 -0400 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDEBF16E7DC for ; Fri, 1 Apr 2022 07:58:31 -0700 (PDT) Received: by mail-wm1-x32b.google.com with SMTP id f6-20020a1c3806000000b0038e4a0fc5easo1618961wma.3 for ; Fri, 01 Apr 2022 07:58:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gtC9x4ytC3JDkJusbSvfvwpkttX0Il5swFlaQVUSd6c=; b=kK1jfQ/KvmctsoV8Tq0dqinBZV+u8tXoMPNhe3nJx+b+MoKfJNH5DCOS/7mnV7dRhk q7YGYC7vI4tS09qSlHHi5vYpf2gJQgGEn/kEG8zveAPRv31NwjTAvHxO35H7LqmbArFn 2hZ4i1umE/adcAO/idQ50Om0Yl8lWDwl6IfGWmEWrB5IpwJig/nA7gDhEV9VDy8qdtou gEVysoaVnaGHsMfJKA0Tx3mTsavQEGHggt9MOxnUCdhgp+07onYLi/unPjqxGQcnQKKM g7d6FKvax+/9q50tUz1Vz8qjUxPUmkMoS5QxH8Jc31ELRcrr3z16cjH14w6SFy+e55eX tS8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gtC9x4ytC3JDkJusbSvfvwpkttX0Il5swFlaQVUSd6c=; b=U4RiqM+7Q6e/jRmb8KM22pwZv0ha0Il+0O25N5hxfCRu6nU+s3uAsCeXdpruBMzTK0 EA502NQ5FRJJbS6w1MLKjFoOyFeTStqX3H5nwqnGGlqzJUezlR3VbstM0ZK5ddrCoUMe TJ9+g5nx1FQ4rL9o9WfGe6rO0YZGIN5j1QI38n+ICKV+9KzmwIV0qDGBX73JiwpXgFuk MgGba6gPF+5eMm05X0H7L35UaZSsnnKq8aZWmoppwIyITa1z7NKBcIfgxtLz5NndyTI+ 4bYCkrLmDWrc/Qm0qluisIj9xYAT2MNN4yAqGgsfBcbF47WJ0ntJobxHlt7s5HhtnBA/ ok4A== X-Gm-Message-State: AOAM531gbvCDDBR7saLKNV5BGT6pTzCyhU+XKop9UWHFHVNmeN1V9Rca kw/EQ943z0MO/Y6urUidJlhE5vrxepzjpOSw X-Google-Smtp-Source: ABdhPJwtaWcw36Blxc0IzRLdygI31LgDSHd4FsVTGI0QR6xX+M9Y0j+RkfQerB0BG0DZ9gy7GpF2HA== X-Received: by 2002:a05:600c:34ce:b0:38c:a579:944a with SMTP id d14-20020a05600c34ce00b0038ca579944amr9037672wmq.113.1648825110300; Fri, 01 Apr 2022 07:58:30 -0700 (PDT) Received: from localhost.localdomain (xdsl-188-155-201-27.adslplus.ch. [188.155.201.27]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c404800b0038cc9c7670bsm8530722wmm.3.2022.04.01.07.58.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 Apr 2022 07:58:29 -0700 (PDT) From: Krzysztof Kozlowski To: Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Alim Akhtar , Avri Altman , "James E.J. Bottomley" , "Martin K. Petersen" , Bean Huo , Bart Van Assche , Srinivas Kandagatla , Taniya Das , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [RFC PATCH 4/4] ufs: set power domain performance state when scaling gears Date: Fri, 1 Apr 2022 16:58:20 +0200 Message-Id: <20220401145820.1003826-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> References: <20220401145820.1003826-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Scaling gears requires not only scaling clocks, but also voltage levels, e.g. via performance states. USe the provided OPP table, to set proper OPP frequency which through required-opps will trigger performance state change. Signed-off-by: Krzysztof Kozlowski --- drivers/scsi/ufs/ufshcd-pltfrm.c | 6 +++++ drivers/scsi/ufs/ufshcd.c | 42 +++++++++++++++++++++++++------- drivers/scsi/ufs/ufshcd.h | 3 +++ 3 files changed, 42 insertions(+), 9 deletions(-) diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-plt= frm.c index cca4b2181a81..c8f19b54be92 100644 --- a/drivers/scsi/ufs/ufshcd-pltfrm.c +++ b/drivers/scsi/ufs/ufshcd-pltfrm.c @@ -360,6 +360,12 @@ int ufshcd_pltfrm_init(struct platform_device *pdev, goto dealloc_host; } =20 + if (devm_pm_opp_of_add_table(dev)) + dev_dbg(dev, "no OPP table (%d), no performance state control\n", + err); + else + hba->use_pm_opp =3D true; + ufshcd_init_lanes_per_dir(hba); =20 err =3D ufshcd_init(hba, mmio_base, irq); diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 3f9caafa91bf..84912db86da8 100644 --- a/drivers/scsi/ufs/ufshcd.c +++ b/drivers/scsi/ufs/ufshcd.c @@ -1164,11 +1164,16 @@ static int ufshcd_wait_for_doorbell_clr(struct ufs_= hba *hba, static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up) { int ret =3D 0; + struct ufs_clk_info *clki; + unsigned long pm_opp_target_rate; struct ufs_pa_layer_attr new_pwr_info; =20 + clki =3D list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list); + if (scale_up) { memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info, sizeof(struct ufs_pa_layer_attr)); + pm_opp_target_rate =3D clki->max_freq; } else { memcpy(&new_pwr_info, &hba->pwr_info, sizeof(struct ufs_pa_layer_attr)); @@ -1184,6 +1189,13 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bo= ol scale_up) new_pwr_info.gear_tx =3D hba->clk_scaling.min_gear; new_pwr_info.gear_rx =3D hba->clk_scaling.min_gear; } + pm_opp_target_rate =3D clki->min_freq; + } + + if (hba->use_pm_opp && scale_up) { + ret =3D dev_pm_opp_set_rate(hba->dev, pm_opp_target_rate); + if (ret) + return ret; } =20 /* check if the power mode needs to be changed or not? */ @@ -1194,6 +1206,11 @@ static int ufshcd_scale_gear(struct ufs_hba *hba, bo= ol scale_up) hba->pwr_info.gear_tx, hba->pwr_info.gear_rx, new_pwr_info.gear_tx, new_pwr_info.gear_rx); =20 + if (ret && hba->use_pm_opp && scale_up) + dev_pm_opp_set_rate(hba->dev, hba->devfreq->previous_freq); + else if (hba->use_pm_opp && !scale_up) + ret =3D dev_pm_opp_set_rate(hba->dev, pm_opp_target_rate); + return ret; } =20 @@ -1435,9 +1452,11 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) if (list_empty(clk_list)) return 0; =20 - clki =3D list_first_entry(clk_list, struct ufs_clk_info, list); - dev_pm_opp_add(hba->dev, clki->min_freq, 0); - dev_pm_opp_add(hba->dev, clki->max_freq, 0); + if (!hba->use_pm_opp) { + clki =3D list_first_entry(clk_list, struct ufs_clk_info, list); + dev_pm_opp_add(hba->dev, clki->min_freq, 0); + dev_pm_opp_add(hba->dev, clki->max_freq, 0); + } =20 ufshcd_vops_config_scaling_param(hba, &hba->vps->devfreq_profile, &hba->vps->ondemand_data); @@ -1449,8 +1468,10 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) ret =3D PTR_ERR(devfreq); dev_err(hba->dev, "Unable to register with devfreq %d\n", ret); =20 - dev_pm_opp_remove(hba->dev, clki->min_freq); - dev_pm_opp_remove(hba->dev, clki->max_freq); + if (!hba->use_pm_opp) { + dev_pm_opp_remove(hba->dev, clki->min_freq); + dev_pm_opp_remove(hba->dev, clki->max_freq); + } return ret; } =20 @@ -1462,7 +1483,6 @@ static int ufshcd_devfreq_init(struct ufs_hba *hba) static void ufshcd_devfreq_remove(struct ufs_hba *hba) { struct list_head *clk_list =3D &hba->clk_list_head; - struct ufs_clk_info *clki; =20 if (!hba->devfreq) return; @@ -1470,9 +1490,13 @@ static void ufshcd_devfreq_remove(struct ufs_hba *hb= a) devfreq_remove_device(hba->devfreq); hba->devfreq =3D NULL; =20 - clki =3D list_first_entry(clk_list, struct ufs_clk_info, list); - dev_pm_opp_remove(hba->dev, clki->min_freq); - dev_pm_opp_remove(hba->dev, clki->max_freq); + if (!hba->use_pm_opp) { + struct ufs_clk_info *clki; + + clki =3D list_first_entry(clk_list, struct ufs_clk_info, list); + dev_pm_opp_remove(hba->dev, clki->min_freq); + dev_pm_opp_remove(hba->dev, clki->max_freq); + } } =20 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba) diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 88c20f3608c2..3bd02095897f 100644 --- a/drivers/scsi/ufs/ufshcd.h +++ b/drivers/scsi/ufs/ufshcd.h @@ -776,6 +776,8 @@ struct ufs_hba_monitor { * @auto_bkops_enabled: to track whether bkops is enabled in device * @vreg_info: UFS device voltage regulator information * @clk_list_head: UFS host controller clocks list node head + * @use_pm_opp: whether OPP table is provided and scaling gears should tri= gger + * setting OPP * @pwr_info: holds current power mode * @max_pwr_info: keeps the device max valid pwm * @clk_scaling_lock: used to serialize device commands and clock scaling @@ -894,6 +896,7 @@ struct ufs_hba { bool auto_bkops_enabled; struct ufs_vreg_info vreg_info; struct list_head clk_list_head; + bool use_pm_opp; =20 /* Number of requests aborts */ int req_abort_count; --=20 2.32.0