From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EAC93C43217 for ; Fri, 1 Apr 2022 10:36:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344924AbiDAKi2 (ORCPT ); Fri, 1 Apr 2022 06:38:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41808 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344193AbiDAKhm (ORCPT ); Fri, 1 Apr 2022 06:37:42 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A1D9266B63; Fri, 1 Apr 2022 03:35:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809353; x=1680345353; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Mokh5NeYfH0tCFWB5WUbjJ/CRT9R2RJiXuGQoGrRwY8=; b=Y5UP3UscXnqJ9cAOY2KFREYj4nwuQauPKFNPHVDotZ95ovCXBTwZLU27 QCgrAqTzfgwjSi3dahZPAkSCJiBIdUa4U8/Oy5zuKx8YrvKkRcrawZAWo p93AVjauYVAJ3Fn6imwdRzrO999kKjYoIPNtdTWt7u55jvCtk4AN8DcZq C2pDh0sPMu5A27G697rFFrB4Js0e8c2VJ2s/+RRdm/Gr3ENxAShgT68uk sfvdb95GbNQlqnW6DATSYIcDETB3eCbC8kN7yh0zvd3p7NFBOAzFerCJJ iTvQ7UeFGI4BD7fTARJ+ZcxxzTSoyixkXDuVVMRKbfTfG+aKgHNHhsxfz A==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="285029795" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="285029795" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:35:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="522726475" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 01 Apr 2022 03:35:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 9A77681; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 01/13] gpiolib: Introduce for_each_gpiochip_node() loop helper Date: Fri, 1 Apr 2022 13:35:52 +0300 Message-Id: <20220401103604.8705-2-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Introduce for_each_gpiochip_node() loop helper which iterates over the GPIO controller child nodes of a given device. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Bartosz Golaszewski --- include/linux/gpio/driver.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 98c93510640e..bfc91f122d5f 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -3,13 +3,14 @@ #define __LINUX_GPIO_DRIVER_H =20 #include -#include #include #include #include #include #include #include +#include +#include =20 struct gpio_desc; struct of_phandle_args; @@ -750,4 +751,8 @@ static inline void gpiochip_unlock_as_irq(struct gpio_c= hip *gc, } #endif /* CONFIG_GPIOLIB */ =20 +#define for_each_gpiochip_node(dev, child) \ + device_for_each_child_node(dev, child) \ + if (!fwnode_property_present(child, "gpio-controller")) {} else + #endif /* __LINUX_GPIO_DRIVER_H */ --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 38382C433FE for ; Fri, 1 Apr 2022 10:36:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344480AbiDAKhs (ORCPT ); Fri, 1 Apr 2022 06:37:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41774 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344165AbiDAKhm (ORCPT ); Fri, 1 Apr 2022 06:37:42 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2DAF266B6C; Fri, 1 Apr 2022 03:35:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809353; x=1680345353; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=LT/CSy5JpaWUNE3hS0zZPYlM1WwfMM5j7JNnfmfMtD8=; b=lJQOpEmrYk8WMGEd9C2rfI2ezkCErCFVF3+fNgh3Z/NoxOIBqgQdpud7 c4Hb4NyTv5CETsMAJbCHlWwnmQvlObWTG3x8KkPzKEIiW9yv7DjsIC1Wg 3AhroRZzqgr1osD5FjZbtbWU9KDxJ8PSkYXHaCYhJqPieXCU0Y4jkygnE hr1Q7RimpWG54sgBfuc0dSYOq3dwmi3C6GJW9SgJdFDMAzm39SdVMZsWb QBr/Go5Ag4kd7afGmwqEjGIXlmdj79CnkhLF7sCA9TucvswBoSx7qTzVs j1pm7uVtdabmXW48ebieJREw/erW7LtnQUD2YdJiJIaSZC46Qo86IuW38 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="257680701" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="257680701" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:35:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="843133146" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga005.fm.intel.com with ESMTP; 01 Apr 2022 03:35:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id AC82A1C3; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 02/13] gpiolib: Introduce gpiochip_node_count() helper Date: Fri, 1 Apr 2022 13:35:53 +0300 Message-Id: <20220401103604.8705-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The gpiochip_node_count() helper iterates over the device child nodes that have the "gpio-controller" property set. It returns the number of such nodes under a given device. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Bartosz Golaszewski --- include/linux/gpio/driver.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index bfc91f122d5f..12de0b22b4ef 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -755,4 +755,15 @@ static inline void gpiochip_unlock_as_irq(struct gpio_= chip *gc, device_for_each_child_node(dev, child) \ if (!fwnode_property_present(child, "gpio-controller")) {} else =20 +static inline unsigned int gpiochip_node_count(struct device *dev) +{ + struct fwnode_handle *child; + unsigned int count =3D 0; + + for_each_gpiochip_node(dev, child) + count++; + + return count; +} + #endif /* __LINUX_GPIO_DRIVER_H */ --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17546C433F5 for ; Fri, 1 Apr 2022 10:36:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344363AbiDAKhp (ORCPT ); Fri, 1 Apr 2022 06:37:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343860AbiDAKhl (ORCPT ); Fri, 1 Apr 2022 06:37:41 -0400 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 09A0A266B65; Fri, 1 Apr 2022 03:35:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809352; x=1680345352; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i+XLNp2iVCE62baGP2Gp0lU65sQmnL0penjqJcUdxuU=; b=anDGpF0vGE2DDhr35PRETPt7MzUcA88a/qmb4MQq8U0Uj6w/+NfOug3+ KsV++fdQLIq1mgPme3G3xaNil8fqrDKKBqiAPKB67wBGLCxAPrHMNpDj8 rnbspdjsTODrlKLkNkW9ghgldJnU8FH0XPWDktdZelhDWMg0AMvEcmpYT Nf919w0jnN2V/CRYStLGc+xAOlLCldceoR3oGjG2ThEua0yNHU18ewtts eGbx6unJ5wgHjZG9TP6USA8MXzq7JcKw+qKGHOBQZjSDC1UX4vLeU1gqe NgKdLACa/yAccmmC7Io9BYcpNjR6miZmOhv2lyhMWTn8uv1zlJW0Z+Omq g==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="240692251" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="240692251" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:35:51 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="695847010" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 01 Apr 2022 03:35:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id B7C6A1F5; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 03/13] pinctrl: stm32: Replace custom code by gpiochip_node_count() call Date: Fri, 1 Apr 2022 13:35:54 +0300 Message-Id: <20220401103604.8705-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Fabien Dessenne --- drivers/pinctrl/stm32/pinctrl-stm32.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/= pinctrl-stm32.c index 9ed764731570..91b9a64b649e 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -1423,7 +1423,8 @@ int stm32_pctl_probe(struct platform_device *pdev) struct device *dev =3D &pdev->dev; struct stm32_pinctrl *pctl; struct pinctrl_pin_desc *pins; - int i, ret, hwlock_id, banks =3D 0; + int i, ret, hwlock_id; + unsigned int banks; =20 if (!np) return -EINVAL; @@ -1513,10 +1514,7 @@ int stm32_pctl_probe(struct platform_device *pdev) return PTR_ERR(pctl->pctl_dev); } =20 - for_each_available_child_of_node(np, child) - if (of_property_read_bool(child, "gpio-controller")) - banks++; - + banks =3D gpiochip_node_count(dev); if (!banks) { dev_err(dev, "at least one GPIO bank is required\n"); return -EINVAL; --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D526C433EF for ; Fri, 1 Apr 2022 10:36:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344693AbiDAKhv (ORCPT ); Fri, 1 Apr 2022 06:37:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344166AbiDAKhm (ORCPT ); Fri, 1 Apr 2022 06:37:42 -0400 Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0764266B66; Fri, 1 Apr 2022 03:35:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809352; x=1680345352; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jQJeoHDjZLYzGmOrK+oBTqEppFS7ObLysie7MCABhco=; b=WmuQOtaW0r/xhgcMu4f3HNdKL7NrgexeFDhkKGnU/ddOg+uM/Gti1VM2 SW3zwbaOvT+u7DanmviL20MvMpu3SoXLafbPF5BlxEI0QplU5n0jITHZS elTq4HxZ9PawyjPA7RJTQgJpbX9GhlYDDU5u8dXcwTaSST0zSmDPr21Wg i8D5lOQ/nY/M7FczH7QYjQUib0FMHII5tbIt8HbmY5/ehuBhefRFmRD/p ktC9BqwAALk21byR1FdXQ8CRfPgmuVPO6LcEbn3ockel6FJ0BGN4NcYyk Yd8OhYFK1FRrbWgIJVjhboGPbWLtnJuGxx3yqg64EcJxs3z3U20eyRT/p g==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="346541347" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="346541347" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:35:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="606673270" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga008.fm.intel.com with ESMTP; 01 Apr 2022 03:35:44 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id C344620B; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 04/13] pinctrl: stm32: Switch to use for_each_gpiochip_node() helper Date: Fri, 1 Apr 2022 13:35:55 +0300 Message-Id: <20220401103604.8705-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Reviewed-by: Fabien Dessenne --- drivers/pinctrl/stm32/pinctrl-stm32.c | 72 ++++++++++++--------------- 1 file changed, 33 insertions(+), 39 deletions(-) diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/= pinctrl-stm32.c index 91b9a64b649e..09952c463f67 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -1215,13 +1216,12 @@ static const struct pinconf_ops stm32_pconf_ops =3D= { .pin_config_dbg_show =3D stm32_pconf_dbg_show, }; =20 -static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, - struct device_node *np) +static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct = fwnode_handle *fwnode) { struct stm32_gpio_bank *bank =3D &pctl->banks[pctl->nbanks]; int bank_ioport_nr; struct pinctrl_gpio_range *range =3D &bank->range; - struct of_phandle_args args; + struct fwnode_reference_args args; struct device *dev =3D pctl->dev; struct resource res; int npins =3D STM32_GPIO_PINS_PER_BANK; @@ -1230,7 +1230,7 @@ static int stm32_gpiolib_register_bank(struct stm32_p= inctrl *pctl, if (!IS_ERR(bank->rstc)) reset_control_deassert(bank->rstc); =20 - if (of_address_to_resource(np, 0, &res)) + if (of_address_to_resource(to_of_node(fwnode), 0, &res)) return -ENODEV; =20 bank->base =3D devm_ioremap_resource(dev, &res); @@ -1245,15 +1245,15 @@ static int stm32_gpiolib_register_bank(struct stm32= _pinctrl *pctl, =20 bank->gpio_chip =3D stm32_gpio_template; =20 - of_property_read_string(np, "st,bank-name", &bank->gpio_chip.label); + fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.labe= l); =20 - if (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, i, &args)) { + if (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, 3, i= , &args)) { bank_nr =3D args.args[1] / STM32_GPIO_PINS_PER_BANK; bank->gpio_chip.base =3D args.args[1]; =20 /* get the last defined gpio line (offset + nb of pins) */ npins =3D args.args[0] + args.args[2]; - while (!of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, ++i, &arg= s)) + while (!fwnode_property_get_reference_args(fwnode, "gpio-ranges", NULL, = 3, ++i, &args)) npins =3D max(npins, (int)(args.args[0] + args.args[2])); } else { bank_nr =3D pctl->nbanks; @@ -1268,20 +1268,20 @@ static int stm32_gpiolib_register_bank(struct stm32= _pinctrl *pctl, &pctl->banks[bank_nr].range); } =20 - if (of_property_read_u32(np, "st,bank-ioport", &bank_ioport_nr)) + if (fwnode_property_read_u32(fwnode, "st,bank-ioport", &bank_ioport_nr)) bank_ioport_nr =3D bank_nr; =20 bank->gpio_chip.base =3D bank_nr * STM32_GPIO_PINS_PER_BANK; =20 bank->gpio_chip.ngpio =3D npins; - bank->gpio_chip.of_node =3D np; + bank->gpio_chip.fwnode =3D fwnode; bank->gpio_chip.parent =3D dev; bank->bank_nr =3D bank_nr; bank->bank_ioport_nr =3D bank_ioport_nr; spin_lock_init(&bank->lock); =20 /* create irq hierarchical domain */ - bank->fwnode =3D of_node_to_fwnode(np); + bank->fwnode =3D fwnode; =20 bank->domain =3D irq_domain_create_hierarchy(pctl->domain, 0, STM32_GPIO_IRQ_LINE, bank->fwnode, @@ -1418,7 +1418,7 @@ static int stm32_pctrl_create_pins_tab(struct stm32_p= inctrl *pctl, int stm32_pctl_probe(struct platform_device *pdev) { struct device_node *np =3D pdev->dev.of_node; - struct device_node *child; + struct fwnode_handle *child; const struct of_device_id *match; struct device *dev =3D &pdev->dev; struct stm32_pinctrl *pctl; @@ -1525,40 +1525,34 @@ int stm32_pctl_probe(struct platform_device *pdev) return -ENOMEM; =20 i =3D 0; - for_each_available_child_of_node(np, child) { + for_each_gpiochip_node(dev, child) { struct stm32_gpio_bank *bank =3D &pctl->banks[i]; + struct device_node *np =3D to_of_node(child); =20 - if (of_property_read_bool(child, "gpio-controller")) { - bank->rstc =3D of_reset_control_get_exclusive(child, - NULL); - if (PTR_ERR(bank->rstc) =3D=3D -EPROBE_DEFER) { - of_node_put(child); - return -EPROBE_DEFER; - } - - bank->clk =3D of_clk_get_by_name(child, NULL); - if (IS_ERR(bank->clk)) { - if (PTR_ERR(bank->clk) !=3D -EPROBE_DEFER) - dev_err(dev, - "failed to get clk (%ld)\n", - PTR_ERR(bank->clk)); - of_node_put(child); - return PTR_ERR(bank->clk); - } - i++; + bank->rstc =3D of_reset_control_get_exclusive(np, NULL); + if (PTR_ERR(bank->rstc) =3D=3D -EPROBE_DEFER) { + fwnode_handle_put(child); + return -EPROBE_DEFER; } - } =20 - for_each_available_child_of_node(np, child) { - if (of_property_read_bool(child, "gpio-controller")) { - ret =3D stm32_gpiolib_register_bank(pctl, child); - if (ret) { - of_node_put(child); - return ret; - } + bank->clk =3D of_clk_get_by_name(np, NULL); + if (IS_ERR(bank->clk)) { + if (PTR_ERR(bank->clk) !=3D -EPROBE_DEFER) + dev_err(dev, "failed to get clk (%ld)\n", PTR_ERR(bank->clk)); + fwnode_handle_put(child); + return PTR_ERR(bank->clk); + } + i++; + } =20 - pctl->nbanks++; + for_each_gpiochip_node(dev, child) { + ret =3D stm32_gpiolib_register_bank(pctl, child); + if (ret) { + fwnode_handle_put(child); + return ret; } + + pctl->nbanks++; } =20 dev_info(dev, "Pinctrl STM32 initialized\n"); --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06130C433F5 for ; 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X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="260281485" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="260281485" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:36:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="640496022" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 01 Apr 2022 03:35:53 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id CED55323; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 05/13] pinctrl: samsung: Switch to use for_each_gpiochip_node() helper Date: Fri, 1 Apr 2022 13:35:56 +0300 Message-Id: <20220401103604.8705-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Tested-by: Krzysztof Kozlowski --- drivers/pinctrl/samsung/pinctrl-exynos.c | 8 +++--- drivers/pinctrl/samsung/pinctrl-s3c24xx.c | 2 +- drivers/pinctrl/samsung/pinctrl-s3c64xx.c | 4 +-- drivers/pinctrl/samsung/pinctrl-samsung.c | 30 +++++++++++------------ drivers/pinctrl/samsung/pinctrl-samsung.h | 2 +- 5 files changed, 22 insertions(+), 24 deletions(-) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/sam= sung/pinctrl-exynos.c index c1c4ffbae6e2..6d7ca1758292 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c @@ -307,7 +307,7 @@ __init int exynos_eint_gpio_init(struct samsung_pinctrl= _drv_data *d) } bank->irq_chip->chip.name =3D bank->name; =20 - bank->irq_domain =3D irq_domain_add_linear(bank->of_node, + bank->irq_domain =3D irq_domain_create_linear(bank->fwnode, bank->nr_pins, &exynos_eint_irqd_ops, bank); if (!bank->irq_domain) { dev_err(dev, "gpio irq domain add failed\n"); @@ -565,7 +565,7 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl= _drv_data *d) } bank->irq_chip->chip.name =3D bank->name; =20 - bank->irq_domain =3D irq_domain_add_linear(bank->of_node, + bank->irq_domain =3D irq_domain_create_linear(bank->fwnode, bank->nr_pins, &exynos_eint_irqd_ops, bank); if (!bank->irq_domain) { dev_err(dev, "wkup irq domain add failed\n"); @@ -573,7 +573,7 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl= _drv_data *d) return -ENXIO; } =20 - if (!of_find_property(bank->of_node, "interrupts", NULL)) { + if (!fwnode_property_present(bank->fwnode, "interrupts")) { bank->eint_type =3D EINT_TYPE_WKUP_MUX; ++muxed_banks; continue; @@ -588,7 +588,7 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl= _drv_data *d) } =20 for (idx =3D 0; idx < bank->nr_pins; ++idx) { - irq =3D irq_of_parse_and_map(bank->of_node, idx); + irq =3D irq_of_parse_and_map(to_of_node(bank->fwnode), idx); if (!irq) { dev_err(dev, "irq number for eint-%s-%d not found\n", bank->name, idx); diff --git a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c b/drivers/pinctrl/sa= msung/pinctrl-s3c24xx.c index ac1eba30cf40..625cb1065eaf 100644 --- a/drivers/pinctrl/samsung/pinctrl-s3c24xx.c +++ b/drivers/pinctrl/samsung/pinctrl-s3c24xx.c @@ -525,7 +525,7 @@ static int s3c24xx_eint_init(struct samsung_pinctrl_drv= _data *d) ops =3D (bank->eint_offset =3D=3D 0) ? &s3c24xx_gpf_irq_ops : &s3c24xx_gpg_irq_ops; =20 - bank->irq_domain =3D irq_domain_add_linear(bank->of_node, + bank->irq_domain =3D irq_domain_create_linear(bank->fwnode, bank->nr_pins, ops, ddata); if (!bank->irq_domain) { dev_err(dev, "wkup irq domain add failed\n"); diff --git a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c b/drivers/pinctrl/sa= msung/pinctrl-s3c64xx.c index c5f95a1071ae..c5d92db4fdb1 100644 --- a/drivers/pinctrl/samsung/pinctrl-s3c64xx.c +++ b/drivers/pinctrl/samsung/pinctrl-s3c64xx.c @@ -471,7 +471,7 @@ static int s3c64xx_eint_gpio_init(struct samsung_pinctr= l_drv_data *d) mask =3D bank->eint_mask; nr_eints =3D fls(mask); =20 - bank->irq_domain =3D irq_domain_add_linear(bank->of_node, + bank->irq_domain =3D irq_domain_create_linear(bank->fwnode, nr_eints, &s3c64xx_gpio_irqd_ops, bank); if (!bank->irq_domain) { dev_err(dev, "gpio irq domain add failed\n"); @@ -743,7 +743,7 @@ static int s3c64xx_eint_eint0_init(struct samsung_pinct= rl_drv_data *d) return -ENOMEM; ddata->bank =3D bank; =20 - bank->irq_domain =3D irq_domain_add_linear(bank->of_node, + bank->irq_domain =3D irq_domain_create_linear(bank->fwnode, nr_eints, &s3c64xx_eint0_irqd_ops, ddata); if (!bank->irq_domain) { dev_err(dev, "wkup irq domain add failed\n"); diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/sa= msung/pinctrl-samsung.c index f610beab23a0..26d309d2516d 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -966,7 +967,7 @@ static int samsung_gpiolib_register(struct platform_dev= ice *pdev, gc->base =3D bank->grange.base; gc->ngpio =3D bank->nr_pins; gc->parent =3D &pdev->dev; - gc->of_node =3D bank->of_node; + gc->fwnode =3D bank->fwnode; gc->label =3D bank->name; =20 ret =3D devm_gpiochip_add_data(&pdev->dev, gc, bank); @@ -1002,27 +1003,25 @@ samsung_pinctrl_get_soc_data_for_of_alias(struct pl= atform_device *pdev) return &(of_data->ctrl[id]); } =20 -static void samsung_banks_of_node_put(struct samsung_pinctrl_drv_data *d) +static void samsung_banks_node_put(struct samsung_pinctrl_drv_data *d) { struct samsung_pin_bank *bank; unsigned int i; =20 bank =3D d->pin_banks; for (i =3D 0; i < d->nr_banks; ++i, ++bank) - of_node_put(bank->of_node); + fwnode_handle_put(bank->fwnode); } =20 /* * Iterate over all driver pin banks to find one matching the name of node, * skipping optional "-gpio" node suffix. When found, assign node to the b= ank. */ -static void samsung_banks_of_node_get(struct device *dev, - struct samsung_pinctrl_drv_data *d, - struct device_node *node) +static void samsung_banks_node_get(struct device *dev, struct samsung_pinc= trl_drv_data *d) { const char *suffix =3D "-gpio-bank"; struct samsung_pin_bank *bank; - struct device_node *child; + struct fwnode_handle *child; /* Pin bank names are up to 4 characters */ char node_name[20]; unsigned int i; @@ -1038,17 +1037,17 @@ static void samsung_banks_of_node_get(struct device= *dev, continue; } =20 - for_each_child_of_node(node, child) { - if (!of_find_property(child, "gpio-controller", NULL)) - continue; - if (of_node_name_eq(child, node_name)) + for_each_gpiochip_node(dev, child) { + struct device_node *np =3D to_of_node(child); + + if (of_node_name_eq(np, node_name)) break; - else if (of_node_name_eq(child, bank->name)) + if (of_node_name_eq(np, bank->name)) break; } =20 if (child) - bank->of_node =3D child; + bank->fwnode =3D child; else dev_warn(dev, "Missing node for bank %s - invalid DTB\n", bank->name); @@ -1061,7 +1060,6 @@ static const struct samsung_pin_ctrl * samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d, struct platform_device *pdev) { - struct device_node *node =3D pdev->dev.of_node; const struct samsung_pin_bank_data *bdata; const struct samsung_pin_ctrl *ctrl; struct samsung_pin_bank *bank; @@ -1125,7 +1123,7 @@ samsung_pinctrl_get_soc_data(struct samsung_pinctrl_d= rv_data *d, */ d->virt_base =3D virt_base[0]; =20 - samsung_banks_of_node_get(&pdev->dev, d, node); + samsung_banks_node_get(&pdev->dev, d); =20 d->pin_base =3D pin_base; pin_base +=3D d->nr_pins; @@ -1186,7 +1184,7 @@ static int samsung_pinctrl_probe(struct platform_devi= ce *pdev) err_unregister: samsung_pinctrl_unregister(pdev, drvdata); err_put_banks: - samsung_banks_of_node_put(drvdata); + samsung_banks_node_put(drvdata); return ret; } =20 diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/sa= msung/pinctrl-samsung.h index 5b32d3f30fcd..fc6f5199c548 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -165,7 +165,7 @@ struct samsung_pin_bank { =20 u32 pin_base; void *soc_priv; - struct device_node *of_node; + struct fwnode_handle *fwnode; struct samsung_pinctrl_drv_data *drvdata; struct irq_domain *irq_domain; struct gpio_chip gpio_chip; --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED5C1C433FE for ; Fri, 1 Apr 2022 10:37:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344461AbiDAKjY (ORCPT ); Fri, 1 Apr 2022 06:39:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344989AbiDAKiM (ORCPT ); Fri, 1 Apr 2022 06:38:12 -0400 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53A14266B6C; Fri, 1 Apr 2022 03:36:23 -0700 (PDT) DKIM-Signature: v=1; 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01 Apr 2022 03:35:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id DAA5A5F2; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 06/13] pinctrl: renesas: rza1: Replace custom code by gpiochip_node_count() call Date: Fri, 1 Apr 2022 13:35:57 +0300 Message-Id: <20220401103604.8705-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rza1.c | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renes= as/pinctrl-rza1.c index c1d6e9512c7a..acc00b1a955d 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -1154,21 +1154,6 @@ static const struct pinmux_ops rza1_pinmux_ops =3D { * RZ/A1 pin controller driver operations */ =20 -static unsigned int rza1_count_gpio_chips(struct device_node *np) -{ - struct device_node *child; - unsigned int count =3D 0; - - for_each_child_of_node(np, child) { - if (!of_property_read_bool(child, "gpio-controller")) - continue; - - count++; - } - - return count; -} - /** * rza1_parse_gpiochip() - parse and register a gpio chip and pin range * @@ -1255,7 +1240,7 @@ static int rza1_gpio_register(struct rza1_pinctrl *rz= a1_pctl) unsigned int i; int ret; =20 - ngpiochips =3D rza1_count_gpio_chips(np); + ngpiochips =3D gpiochip_node_count(rza1_pctl->dev); if (ngpiochips =3D=3D 0) { dev_dbg(rza1_pctl->dev, "No gpiochip registered\n"); return 0; --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2D27C433F5 for ; Fri, 1 Apr 2022 10:36:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345068AbiDAKin (ORCPT ); Fri, 1 Apr 2022 06:38:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42342 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344611AbiDAKhu (ORCPT ); Fri, 1 Apr 2022 06:37:50 -0400 Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81573266B75; Fri, 1 Apr 2022 03:36:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809361; x=1680345361; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Z1Wwebtp9mgYOoY8j5lm8osB9jE0USQeFWSvh/mZP9o=; b=KwvnAFwtXxiEBh03pYVGmYxhOe83GWpoABxY7NYwt9f5438M1ckk0JBp 9GVLZdhPj6A2ZBU1UcV2ru6R9B2rIKcdkDbMEqjS9u0B82DOiYdY3wmwr oyqE8WWhx6FyZS3O135f4qkVp3gu0jEwgrutbzB0outojO2MtP88h6yHx r8B4scAM22U218PjPawgsyFTNnHwq8q0uL676csxx1/JJF/R2v6Sm/xdR bCtZvzAf3LFyEjJMrqaGXo+1oHFsEZxmbKoFD3XBTSMnFB3WT5iSXA8sg TIeVE91+aRUV20uMwwRapbrOsGUfQ2KpvMUSJWcMo5myla+1V4Lorzrdm A==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="285029845" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="285029845" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:36:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="522726529" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 01 Apr 2022 03:35:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id E69485F8; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 07/13] pinctrl: renesas: rza1: Switch to use for_each_gpiochip_node() helper Date: Fri, 1 Apr 2022 13:35:58 +0300 Message-Id: <20220401103604.8705-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko Reviewed-by: Geert Uytterhoeven Tested-by: Geert Uytterhoeven Acked-by: Geert Uytterhoeven --- drivers/pinctrl/renesas/pinctrl-rza1.c | 30 +++++++++++--------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/pinctrl/renesas/pinctrl-rza1.c b/drivers/pinctrl/renes= as/pinctrl-rza1.c index acc00b1a955d..529c0fc4ec06 100644 --- a/drivers/pinctrl/renesas/pinctrl-rza1.c +++ b/drivers/pinctrl/renesas/pinctrl-rza1.c @@ -24,6 +24,7 @@ #include #include #include +#include #include =20 #include "../core.h" @@ -1161,22 +1162,22 @@ static const struct pinmux_ops rza1_pinmux_ops =3D { * defined by gpio device tree binding documentation. * * @rza1_pctl: RZ/A1 pin controller device - * @np: of gpio-controller node + * @fwnode: gpio-controller firmware node * @chip: gpio chip to register to gpiolib * @range: pin range to register to pinctrl core */ static int rza1_parse_gpiochip(struct rza1_pinctrl *rza1_pctl, - struct device_node *np, + struct fwnode_handle *fwnode, struct gpio_chip *chip, struct pinctrl_gpio_range *range) { const char *list_name =3D "gpio-ranges"; - struct of_phandle_args of_args; + struct fwnode_reference_args args; unsigned int gpioport; u32 pinctrl_base; int ret; =20 - ret =3D of_parse_phandle_with_fixed_args(np, list_name, 3, 0, &of_args); + ret =3D fwnode_property_get_reference_args(fwnode, list_name, NULL, 3, 0,= &args); if (ret) { dev_err(rza1_pctl->dev, "Unable to parse %s list property\n", list_name); @@ -1187,7 +1188,7 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *r= za1_pctl, * Find out on which port this gpio-chip maps to by inspecting the * second argument of the "gpio-ranges" property. */ - pinctrl_base =3D of_args.args[1]; + pinctrl_base =3D args.args[1]; gpioport =3D RZA1_PIN_ID_TO_PORT(pinctrl_base); if (gpioport >=3D RZA1_NPORTS) { dev_err(rza1_pctl->dev, @@ -1197,19 +1198,18 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl = *rza1_pctl, =20 *chip =3D rza1_gpiochip_template; chip->base =3D -1; - chip->label =3D devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pOFn", - np); + chip->ngpio =3D args.args[2]; + chip->label =3D devm_kasprintf(rza1_pctl->dev, GFP_KERNEL, "%pfwP", fwnod= e); if (!chip->label) return -ENOMEM; =20 - chip->ngpio =3D of_args.args[2]; - chip->of_node =3D np; + chip->fwnode =3D fwnode; chip->parent =3D rza1_pctl->dev; =20 range->id =3D gpioport; range->name =3D chip->label; range->pin_base =3D range->base =3D pinctrl_base; - range->npins =3D of_args.args[2]; + range->npins =3D args.args[2]; range->gc =3D chip; =20 ret =3D devm_gpiochip_add_data(rza1_pctl->dev, chip, @@ -1232,10 +1232,9 @@ static int rza1_parse_gpiochip(struct rza1_pinctrl *= rza1_pctl, */ static int rza1_gpio_register(struct rza1_pinctrl *rza1_pctl) { - struct device_node *np =3D rza1_pctl->dev->of_node; struct pinctrl_gpio_range *gpio_ranges; struct gpio_chip *gpio_chips; - struct device_node *child; + struct fwnode_handle *child; unsigned int ngpiochips; unsigned int i; int ret; @@ -1254,14 +1253,11 @@ static int rza1_gpio_register(struct rza1_pinctrl *= rza1_pctl) return -ENOMEM; =20 i =3D 0; - for_each_child_of_node(np, child) { - if (!of_property_read_bool(child, "gpio-controller")) - continue; - + for_each_gpiochip_node(rza1_pctl->dev, child) { ret =3D rza1_parse_gpiochip(rza1_pctl, child, &gpio_chips[i], &gpio_ranges[i]); if (ret) { - of_node_put(child); + fwnode_handle_put(child); return ret; } =20 --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B846FC433F5 for ; Fri, 1 Apr 2022 10:36:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344922AbiDAKij (ORCPT ); Fri, 1 Apr 2022 06:38:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344579AbiDAKhu (ORCPT ); Fri, 1 Apr 2022 06:37:50 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6069C266B73; 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d="scan'208";a="619271370" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga004.fm.intel.com with ESMTP; 01 Apr 2022 03:35:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id F1EA1602; Fri, 1 Apr 2022 13:36:05 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 08/13] pinctrl: npcm7xx: Switch to use for_each_gpiochip_node() helper Date: Fri, 1 Apr 2022 13:35:59 +0300 Message-Id: <20220401103604.8705-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, do the following: - use a temporary variable for struct device pointer to shorten a few lines - get rid of a temporary variable for vIRQ number, assign it directly - switch to fwnode APIs where it makes sense Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 142 ++++++++++------------ 1 file changed, 62 insertions(+), 80 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nu= voton/pinctrl-npcm7xx.c index 9557fac5d11c..3cf0f8a43c37 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -17,6 +17,7 @@ #include #include #include +#include #include =20 /* GCR registers */ @@ -1862,88 +1863,69 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *= pctrl) { int ret =3D -ENXIO; struct resource res; - int id =3D 0, irq; - struct device_node *np; - struct of_phandle_args pinspec; - - for_each_available_child_of_node(pctrl->dev->of_node, np) - if (of_find_property(np, "gpio-controller", NULL)) { - ret =3D of_address_to_resource(np, 0, &res); - if (ret < 0) { - dev_err(pctrl->dev, - "Resource fail for GPIO bank %u\n", id); - return ret; - } - - pctrl->gpio_bank[id].base =3D - ioremap(res.start, resource_size(&res)); - - irq =3D irq_of_parse_and_map(np, 0); - if (irq < 0) { - dev_err(pctrl->dev, - "No IRQ for GPIO bank %u\n", id); - ret =3D irq; - return ret; - } - - ret =3D bgpio_init(&pctrl->gpio_bank[id].gc, - pctrl->dev, 4, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DIN, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_DOUT, - NULL, - NULL, - pctrl->gpio_bank[id].base + - NPCM7XX_GP_N_IEM, - BGPIOF_READ_OUTPUT_REG_SET); - if (ret) { - dev_err(pctrl->dev, "bgpio_init() failed\n"); - return ret; - } - - ret =3D of_parse_phandle_with_fixed_args(np, - "gpio-ranges", 3, - 0, &pinspec); - if (ret < 0) { - dev_err(pctrl->dev, - "gpio-ranges fail for GPIO bank %u\n", - id); - return ret; - } - - pctrl->gpio_bank[id].irq =3D irq; - pctrl->gpio_bank[id].irq_chip =3D npcmgpio_irqchip; - pctrl->gpio_bank[id].gc.parent =3D pctrl->dev; - pctrl->gpio_bank[id].irqbase =3D - id * NPCM7XX_GPIO_PER_BANK; - pctrl->gpio_bank[id].pinctrl_id =3D pinspec.args[0]; - pctrl->gpio_bank[id].gc.base =3D pinspec.args[1]; - pctrl->gpio_bank[id].gc.ngpio =3D pinspec.args[2]; - pctrl->gpio_bank[id].gc.owner =3D THIS_MODULE; - pctrl->gpio_bank[id].gc.label =3D - devm_kasprintf(pctrl->dev, GFP_KERNEL, "%pOF", - np); - if (pctrl->gpio_bank[id].gc.label =3D=3D NULL) - return -ENOMEM; - - pctrl->gpio_bank[id].gc.dbg_show =3D npcmgpio_dbg_show; - pctrl->gpio_bank[id].direction_input =3D - pctrl->gpio_bank[id].gc.direction_input; - pctrl->gpio_bank[id].gc.direction_input =3D - npcmgpio_direction_input; - pctrl->gpio_bank[id].direction_output =3D - pctrl->gpio_bank[id].gc.direction_output; - pctrl->gpio_bank[id].gc.direction_output =3D - npcmgpio_direction_output; - pctrl->gpio_bank[id].request =3D - pctrl->gpio_bank[id].gc.request; - pctrl->gpio_bank[id].gc.request =3D npcmgpio_gpio_request; - pctrl->gpio_bank[id].gc.free =3D npcmgpio_gpio_free; - pctrl->gpio_bank[id].gc.of_node =3D np; - id++; + struct device *dev =3D pctrl->dev; + struct fwnode_reference_args args; + struct fwnode_handle *child; + int id =3D 0; + + for_each_gpiochip_node(dev, child) { + struct device_node *np =3D to_of_node(child); + + ret =3D of_address_to_resource(np, 0, &res); + if (ret < 0) { + dev_err(dev, "Resource fail for GPIO bank %u\n", id); + return ret; + } + + pctrl->gpio_bank[id].base =3D ioremap(res.start, resource_size(&res)); + + ret =3D bgpio_init(&pctrl->gpio_bank[id].gc, dev, 4, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DIN, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_DOUT, + NULL, + NULL, + pctrl->gpio_bank[id].base + NPCM7XX_GP_N_IEM, + BGPIOF_READ_OUTPUT_REG_SET); + if (ret) { + dev_err(dev, "bgpio_init() failed\n"); + return ret; } =20 + ret =3D fwnode_property_get_reference_args(child, "gpio-ranges", NULL, 3= , 0, &args); + if (ret < 0) { + dev_err(dev, "gpio-ranges fail for GPIO bank %u\n", id); + return ret; + } + + ret =3D irq_of_parse_and_map(np, 0); + if (ret < 0) { + dev_err(dev, "No IRQ for GPIO bank %u\n", id); + return ret; + } + pctrl->gpio_bank[id].irq =3D ret; + pctrl->gpio_bank[id].irq_chip =3D npcmgpio_irqchip; + pctrl->gpio_bank[id].irqbase =3D id * NPCM7XX_GPIO_PER_BANK; + pctrl->gpio_bank[id].pinctrl_id =3D args.args[0]; + pctrl->gpio_bank[id].gc.base =3D args.args[1]; + pctrl->gpio_bank[id].gc.ngpio =3D args.args[2]; + pctrl->gpio_bank[id].gc.owner =3D THIS_MODULE; + pctrl->gpio_bank[id].gc.parent =3D dev; + pctrl->gpio_bank[id].gc.fwnode =3D child; + pctrl->gpio_bank[id].gc.label =3D devm_kasprintf(dev, GFP_KERNEL, "%pfw"= , child); + if (pctrl->gpio_bank[id].gc.label =3D=3D NULL) + return -ENOMEM; + + pctrl->gpio_bank[id].gc.dbg_show =3D npcmgpio_dbg_show; + pctrl->gpio_bank[id].direction_input =3D pctrl->gpio_bank[id].gc.directi= on_input; + pctrl->gpio_bank[id].gc.direction_input =3D npcmgpio_direction_input; + pctrl->gpio_bank[id].direction_output =3D pctrl->gpio_bank[id].gc.direct= ion_output; + pctrl->gpio_bank[id].gc.direction_output =3D npcmgpio_direction_output; + pctrl->gpio_bank[id].request =3D pctrl->gpio_bank[id].gc.request; + pctrl->gpio_bank[id].gc.request =3D npcmgpio_gpio_request; + pctrl->gpio_bank[id].gc.free =3D npcmgpio_gpio_free; + id++; + } + pctrl->bank_num =3D id; return ret; } --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6ABCC433F5 for ; Fri, 1 Apr 2022 10:37:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345095AbiDAKjD (ORCPT ); Fri, 1 Apr 2022 06:39:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44352 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344980AbiDAKiL (ORCPT ); Fri, 1 Apr 2022 06:38:11 -0400 Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3994E266B73; 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d="scan'208";a="695847066" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga001.fm.intel.com with ESMTP; 01 Apr 2022 03:35:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 08D40612; Fri, 1 Apr 2022 13:36:06 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 09/13] pinctrl: meson: Rename REG_* to MESON_REG_* Date: Fri, 1 Apr 2022 13:36:00 +0300 Message-Id: <20220401103604.8705-10-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Currently compilation test fails on x86 due to name collision. The usual way to fix that is to move both conflicting parts to their own namespaces. Rename REG_* to MESON_REG_* as a prerequisite for enabling COMPILE_TEST. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/meson/pinctrl-meson.c | 24 ++++++++++++------------ drivers/pinctrl/meson/pinctrl-meson.h | 24 ++++++++++++------------ 2 files changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/= pinctrl-meson.c index 49851444a6e3..5b46a0979db7 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -218,13 +218,13 @@ static int meson_pinconf_set_output(struct meson_pinc= trl *pc, unsigned int pin, bool out) { - return meson_pinconf_set_gpio_bit(pc, pin, REG_DIR, !out); + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_DIR, !out); } =20 static int meson_pinconf_get_output(struct meson_pinctrl *pc, unsigned int pin) { - int ret =3D meson_pinconf_get_gpio_bit(pc, pin, REG_DIR); + int ret =3D meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_DIR); =20 if (ret < 0) return ret; @@ -236,13 +236,13 @@ static int meson_pinconf_set_drive(struct meson_pinct= rl *pc, unsigned int pin, bool high) { - return meson_pinconf_set_gpio_bit(pc, pin, REG_OUT, high); + return meson_pinconf_set_gpio_bit(pc, pin, MESON_REG_OUT, high); } =20 static int meson_pinconf_get_drive(struct meson_pinctrl *pc, unsigned int pin) { - return meson_pinconf_get_gpio_bit(pc, pin, REG_OUT); + return meson_pinconf_get_gpio_bit(pc, pin, MESON_REG_OUT); } =20 static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc, @@ -269,7 +269,7 @@ static int meson_pinconf_disable_bias(struct meson_pinc= trl *pc, if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); ret =3D regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0); if (ret) return ret; @@ -288,7 +288,7 @@ static int meson_pinconf_enable_bias(struct meson_pinct= rl *pc, unsigned int pin, if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); if (pull_up) val =3D BIT(bit); =20 @@ -296,7 +296,7 @@ static int meson_pinconf_enable_bias(struct meson_pinct= rl *pc, unsigned int pin, if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); ret =3D regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit)); if (ret) return ret; @@ -321,7 +321,7 @@ static int meson_pinconf_set_drive_strength(struct meso= n_pinctrl *pc, if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); =20 if (drive_strength_ua <=3D 500) { ds_val =3D MESON_PINCONF_DRV_500UA; @@ -407,7 +407,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl = *pc, unsigned int pin) if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULLEN, ®, &bit); =20 ret =3D regmap_read(pc->reg_pullen, reg, &val); if (ret) @@ -416,7 +416,7 @@ static int meson_pinconf_get_pull(struct meson_pinctrl = *pc, unsigned int pin) if (!(val & BIT(bit))) { conf =3D PIN_CONFIG_BIAS_DISABLE; } else { - meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_PULL, ®, &bit); =20 ret =3D regmap_read(pc->reg_pull, reg, &val); if (ret) @@ -447,7 +447,7 @@ static int meson_pinconf_get_drive_strength(struct meso= n_pinctrl *pc, if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit); + meson_calc_reg_and_bit(bank, pin, MESON_REG_DS, ®, &bit); =20 ret =3D regmap_read(pc->reg_ds, reg, &val); if (ret) @@ -595,7 +595,7 @@ static int meson_gpio_get(struct gpio_chip *chip, unsig= ned gpio) if (ret) return ret; =20 - meson_calc_reg_and_bit(bank, gpio, REG_IN, ®, &bit); + meson_calc_reg_and_bit(bank, gpio, MESON_REG_IN, ®, &bit); regmap_read(pc->reg_gpio, reg, &val); =20 return !!(val & BIT(bit)); diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/= pinctrl-meson.h index ff5372e0a475..fa042cd6a7ff 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.h +++ b/drivers/pinctrl/meson/pinctrl-meson.h @@ -63,12 +63,12 @@ struct meson_reg_desc { * enum meson_reg_type - type of registers encoded in @meson_reg_desc */ enum meson_reg_type { - REG_PULLEN, - REG_PULL, - REG_DIR, - REG_OUT, - REG_IN, - REG_DS, + MESON_REG_PULLEN, + MESON_REG_PULL, + MESON_REG_DIR, + MESON_REG_OUT, + MESON_REG_IN, + MESON_REG_DS, NUM_REG, }; =20 @@ -150,12 +150,12 @@ struct meson_pinctrl { .irq_first =3D fi, \ .irq_last =3D li, \ .regs =3D { \ - [REG_PULLEN] =3D { per, peb }, \ - [REG_PULL] =3D { pr, pb }, \ - [REG_DIR] =3D { dr, db }, \ - [REG_OUT] =3D { or, ob }, \ - [REG_IN] =3D { ir, ib }, \ - [REG_DS] =3D { dsr, dsb }, \ + [MESON_REG_PULLEN] =3D { per, peb }, \ + [MESON_REG_PULL] =3D { pr, pb }, \ + [MESON_REG_DIR] =3D { dr, db }, \ + [MESON_REG_OUT] =3D { or, ob }, \ + [MESON_REG_IN] =3D { ir, ib }, \ + [MESON_REG_DS] =3D { dsr, dsb }, \ }, \ } =20 --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4876AC433F5 for ; Fri, 1 Apr 2022 10:37:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345009AbiDAKir (ORCPT ); Fri, 1 Apr 2022 06:38:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344920AbiDAKiA (ORCPT ); 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01 Apr 2022 03:36:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="650672369" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga002.fm.intel.com with ESMTP; 01 Apr 2022 03:35:52 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 14307668; Fri, 1 Apr 2022 13:36:06 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 10/13] pinctrl: meson: Enable COMPILE_TEST Date: Fri, 1 Apr 2022 13:36:01 +0300 Message-Id: <20220401103604.8705-11-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Enable COMPILE_TEST for a better test coverage. Signed-off-by: Andy Shevchenko Reviewed-by: Neil Armstrong --- drivers/pinctrl/meson/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/meson/Kconfig b/drivers/pinctrl/meson/Kconfig index d1955c65b4b6..64fb9e074ac6 100644 --- a/drivers/pinctrl/meson/Kconfig +++ b/drivers/pinctrl/meson/Kconfig @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only menuconfig PINCTRL_MESON tristate "Amlogic SoC pinctrl drivers" - depends on ARCH_MESON + depends on ARCH_MESON || COMPILE_TEST depends on OF default y select PINMUX --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2A6EC433F5 for ; Fri, 1 Apr 2022 10:37:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345074AbiDAKiz (ORCPT ); Fri, 1 Apr 2022 06:38:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344927AbiDAKiB (ORCPT ); Fri, 1 Apr 2022 06:38:01 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B049D266B6C; Fri, 1 Apr 2022 03:36:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809372; x=1680345372; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=JTI2sWpV0UzE6IeL8l7wpen8kbwzDYKP8YDjk2kp5w4=; b=PvDdiI5cAR7Hd0pJbkUeP5sXHGC1NCiv73RCZkeyqG33RJ0BM9arqOAo 9cZgjjqhaAn5E3f1C6oGZyNGGZYlFBzkQ8+K2uP1zj483gHLGFah0iTJR PNIojxoYAeUmtLtmGUlY5FKox9492RRsm+5YsS05c+6DKdO+zja+7bgOF AyRrB5651W/M2dIXpdeEEQwcPvvQ/HffFPfdUkTcx0I2ItOE+JGWEhgvf QymBatbEb/51+Vav0SldiQwKLRlIpuzD9VcXB3qNfM6sqRrOv6Ta4raMK rQL2waYSQwC7ZXWGXUaeeI6U4jsMHn+90q9418KDJKh0sqGJeFb+Fig5w A==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="259804873" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="259804873" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:36:01 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="521295002" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2022 03:35:53 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 213BA698; Fri, 1 Apr 2022 13:36:06 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 11/13] pinctrl: meson: Replace custom code by gpiochip_node_count() call Date: Fri, 1 Apr 2022 13:36:02 +0300 Message-Id: <20220401103604.8705-12-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since we have generic function to count GPIO controller nodes under a given device, there is no need to open code it. Replace custom code by gpiochip_node_count() call. Signed-off-by: Andy Shevchenko Reviewed-by: Neil Armstrong --- drivers/pinctrl/meson/pinctrl-meson.c | 28 ++++++++++++--------------- 1 file changed, 12 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/= pinctrl-meson.c index 5b46a0979db7..1b078da81523 100644 --- a/drivers/pinctrl/meson/pinctrl-meson.c +++ b/drivers/pinctrl/meson/pinctrl-meson.c @@ -49,6 +49,7 @@ #include #include #include +#include #include #include =20 @@ -662,27 +663,22 @@ static struct regmap *meson_map_resource(struct meson= _pinctrl *pc, return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config); } =20 -static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, - struct device_node *node) +static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc) { - struct device_node *np, *gpio_np =3D NULL; + struct device_node *gpio_np; + unsigned int chips; =20 - for_each_child_of_node(node, np) { - if (!of_find_property(np, "gpio-controller", NULL)) - continue; - if (gpio_np) { - dev_err(pc->dev, "multiple gpio nodes\n"); - of_node_put(np); - return -EINVAL; - } - gpio_np =3D np; - } - - if (!gpio_np) { + chips =3D gpiochip_node_count(pc->dev); + if (!chips) { dev_err(pc->dev, "no gpio node found\n"); return -EINVAL; } + if (chips > 1) { + dev_err(pc->dev, "multiple gpio nodes\n"); + return -EINVAL; + } =20 + gpio_np =3D to_of_node(device_get_named_child_node(pc->dev, "gpio-control= ler")); pc->of_node =3D gpio_np; =20 pc->reg_mux =3D meson_map_resource(pc, gpio_np, "mux"); @@ -751,7 +747,7 @@ int meson_pinctrl_probe(struct platform_device *pdev) pc->dev =3D dev; pc->data =3D (struct meson_pinctrl_data *) of_device_get_match_data(dev); =20 - ret =3D meson_pinctrl_parse_dt(pc, dev->of_node); + ret =3D meson_pinctrl_parse_dt(pc); if (ret) return ret; =20 --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C155EC3527D for ; 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X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="247609919" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="247609919" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:36:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="567376773" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga008.jf.intel.com with ESMTP; 01 Apr 2022 03:35:53 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 2E0A46A9; Fri, 1 Apr 2022 13:36:06 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 12/13] pinctrl: armada-37xx: Switch to use fwnode instead of of_node Date: Fri, 1 Apr 2022 13:36:03 +0300 Message-Id: <20220401103604.8705-13-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" GPIO library now accepts fwnode as a firmware node, so switch the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/= mvebu/pinctrl-armada-37xx.c index 08cad14042e2..1fef8a38f574 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -787,18 +788,13 @@ static int armada_37xx_gpiochip_register(struct platf= orm_device *pdev, struct armada_37xx_pinctrl *info) { struct device *dev =3D &pdev->dev; - struct device_node *np; + struct fwnode_handle *fwnode; struct gpio_chip *gc; - int ret =3D -ENODEV; + int ret; =20 - for_each_child_of_node(dev->of_node, np) { - if (of_find_property(np, "gpio-controller", NULL)) { - ret =3D 0; - break; - } - } - if (ret) - return ret; + fwnode =3D device_get_named_child_node(dev, "gpio-controller"); + if (!fwnode) + return -ENODEV; =20 info->gpio_chip =3D armada_37xx_gpiolib_chip; =20 @@ -806,7 +802,7 @@ static int armada_37xx_gpiochip_register(struct platfor= m_device *pdev, gc->ngpio =3D info->data->nr_pins; gc->parent =3D dev; gc->base =3D -1; - gc->of_node =3D np; + gc->fwnode =3D fwnode; gc->label =3D info->data->name; =20 ret =3D armada_37xx_irqchip_register(pdev, info); --=20 2.35.1 From nobody Fri Jun 19 15:44:25 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0AB1CC433EF for ; Fri, 1 Apr 2022 10:37:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345050AbiDAKi6 (ORCPT ); Fri, 1 Apr 2022 06:38:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43688 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344926AbiDAKiB (ORCPT ); Fri, 1 Apr 2022 06:38:01 -0400 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBD48266B73; Fri, 1 Apr 2022 03:36:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1648809373; x=1680345373; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KXLXc+19o0UubT6TkmoiDgHQv9YpGm9hY5Ydb16Dc5c=; b=HZLmkNe2E7wysGeItjXWetp7ySJTGL4jrw+fbNAqXA6NOUcF4BlR7M/K BVtRT7RIlP4nOv/yXkUKiYdGTxD4mmAkJi2EEB+SsXwbH8gjFdB7NDf2m to3A+bbW9+54bB6wH7kNTempuICsfafTAmE2ysRHcFB1fHak1MGAJFj9m hSajX73MSkejMmkq3BN7olqdt3YYLnd+FeSpGcwsxhcnUTW+6CfclsrAN RZNo+dKeRls4doTgcrk3b0VBgf8uNjBfRGF4+4OiM+byccFC5AeBX2zf5 g6YRVGzWV0CRFBRTpHGQ9SwOieFykuuKQzfnUi0YaC0lbxgvf9PH+tJnw Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10303"; a="259804876" X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="259804876" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Apr 2022 03:36:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,227,1643702400"; d="scan'208";a="521295008" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 01 Apr 2022 03:35:53 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3BFD26C0; Fri, 1 Apr 2022 13:36:06 +0300 (EEST) From: Andy Shevchenko To: Qianggui Song , Andy Shevchenko , Geert Uytterhoeven , Krzysztof Kozlowski , Marc Zyngier , Fabien Dessenne , Linus Walleij , linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org, linux-renesas-soc@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Avi Fishman , Tomer Maimon , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , Tomasz Figa , Sylwester Nawrocki , Alim Akhtar , Maxime Coquelin , Alexandre Torgue , Bartosz Golaszewski , Philipp Zabel Subject: [PATCH v4 13/13] pinctrl: armada-37xx: Reuse GPIO fwnode in armada_37xx_irqchip_register() Date: Fri, 1 Apr 2022 13:36:04 +0300 Message-Id: <20220401103604.8705-14-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> References: <20220401103604.8705-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Since we have fwnode of the first found GPIO controller assigned to the struct gpio_chip, we may reuse it in the armada_37xx_irqchip_register(). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/= mvebu/pinctrl-armada-37xx.c index 1fef8a38f574..c0384661ea48 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -727,23 +727,13 @@ static int armada_37xx_irqchip_register(struct platfo= rm_device *pdev, struct gpio_chip *gc =3D &info->gpio_chip; struct irq_chip *irqchip =3D &info->irq_chip; struct gpio_irq_chip *girq =3D &gc->irq; + struct device_node *np =3D to_of_node(gc->fwnode); struct device *dev =3D &pdev->dev; - struct device_node *np; - int ret =3D -ENODEV, i, nr_irq_parent; - - /* Check if we have at least one gpio-controller child node */ - for_each_child_of_node(dev->of_node, np) { - if (of_property_read_bool(np, "gpio-controller")) { - ret =3D 0; - break; - } - } - if (ret) - return dev_err_probe(dev, ret, "no gpio-controller child node\n"); + unsigned int i, nr_irq_parent; =20 - nr_irq_parent =3D of_irq_count(np); spin_lock_init(&info->irq_lock); =20 + nr_irq_parent =3D of_irq_count(np); if (!nr_irq_parent) { dev_err(dev, "invalid or no IRQ\n"); return 0; --=20 2.35.1