From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FAE8C433EF for ; Wed, 30 Mar 2022 20:47:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351126AbiC3Utm (ORCPT ); Wed, 30 Mar 2022 16:49:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351109AbiC3Uti (ORCPT ); Wed, 30 Mar 2022 16:49:38 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B77DD2BB2A; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id gb19so21918948pjb.1; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ldA9Mhj+0mZCxGshcEo9t/60BKvUL5CRDf8xGkXfdGo=; b=lPIT/WDBI7h0jSYCTMxfH2uW+XNKl+dSPF9A6KLgXLvPui73Swrq3Q1Q3AZg/DX0q3 +ILslReszOaZipmEUbTHMLnsqVfTJ9yEiM8hbPd/AXsL6lLCbhjBxI5szwGsTeuz4PXN JGTd7r9ax2P4rnbV+gzD6ftAIBm8grCaA0+C+YWplgI/cEU+729K+Dw2xjeRsRAbs1Mj jEUx5VvmE6Y75RXC5s8Yl+rJMHsTz5FZLydGXMPv0N/0XWKtiEHKeM3tOd+nxuDuUrng 6Guam7SiAaXysw5rNN8ugEYxVvLXAd/7Y4pidtUZj8kdg/fJ6Djy34tH5qFwpyI1LWBK y/eg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ldA9Mhj+0mZCxGshcEo9t/60BKvUL5CRDf8xGkXfdGo=; b=JNzdlisfStJCbU3R+7upJ4seBx5dfP3y9PsvWYtsd0TSmHchvV7EFfjXk/SQDDqAc9 9zvNm2w/PaKY6+UhEQ5hkBZ1+S6EX0hX2VkwqX1hjypSxr9+d6jIN1l3Wb05mp6zDjmI yGEbYuW3xSpZrSP9wXzlnTCNSa86YboSxru/83nub4HEz6ZzVPBPCf9y4N9KEWVkIWoD OQwJrmQy/kglFKQHX4U+cSMX38F3MoW2oCzjOCaVQcjnI0IPl2AM/ArxRH/X0x+EfowO kA5aYUVWIhsYxOMHRUeY2fC0CZwko4Ai/5WHQ8eZbNdoc9oJ3M+qel6ql3whcXOHprjD ZfCA== X-Gm-Message-State: AOAM530Pke8Aa5YAJqr6fTFh9W9gClhogxQ4mGvpHDDmoPz/zN/7R5xk LWn+bLo46Jff3fFSKKHvIbk= X-Google-Smtp-Source: ABdhPJysfQC0ENwfzI6jQB6u/35Gy9KhZqGh43AyIEW8pA1f1g9B+MQW/gPexaDjtmrxvOJnE1wXDA== X-Received: by 2002:a17:902:ab59:b0:156:17a5:5de7 with SMTP id ij25-20020a170902ab5900b0015617a55de7mr1592725plb.6.1648673272187; Wed, 30 Mar 2022 13:47:52 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id l2-20020a17090a150200b001c9f1a7aafesm3448919pja.29.2022.03.30.13.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:47:51 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 01/10] drm/msm/gem: Move prototypes Date: Wed, 30 Mar 2022 13:47:46 -0700 Message-Id: <20220330204804.660819-2-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark These belong more cleanly in the gem header. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_drv.h | 23 ----------------------- drivers/gpu/drm/msm/msm_gem.h | 22 ++++++++++++++++++++++ 2 files changed, 22 insertions(+), 23 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index 9f68aa685ed7..daf60d219463 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -250,29 +250,6 @@ void msm_atomic_state_free(struct drm_atomic_state *st= ate); int msm_crtc_enable_vblank(struct drm_crtc *crtc); void msm_crtc_disable_vblank(struct drm_crtc *crtc); =20 -int msm_gem_init_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int npages, - u64 range_start, u64 range_end); -void msm_gem_purge_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); -int msm_gem_map_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int prot, - struct sg_table *sgt, int npages); -void msm_gem_close_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); - - -struct msm_gem_address_space * -msm_gem_address_space_get(struct msm_gem_address_space *aspace); - -void msm_gem_address_space_put(struct msm_gem_address_space *aspace); - -struct msm_gem_address_space * -msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, - u64 va_start, u64 size); - int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu); void msm_unregister_mmu(struct drm_device *dev, struct msm_mmu *mmu); =20 diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 58e11c282928..947ff7d9b471 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -40,6 +40,15 @@ struct msm_gem_address_space { int faults; }; =20 +struct msm_gem_address_space * +msm_gem_address_space_get(struct msm_gem_address_space *aspace); + +void msm_gem_address_space_put(struct msm_gem_address_space *aspace); + +struct msm_gem_address_space * +msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, + u64 va_start, u64 size); + struct msm_gem_vma { struct drm_mm_node node; uint64_t iova; @@ -49,6 +58,19 @@ struct msm_gem_vma { int inuse; }; =20 +int msm_gem_init_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma, int npages, + u64 range_start, u64 range_end); +void msm_gem_purge_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); +void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); +int msm_gem_map_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma, int prot, + struct sg_table *sgt, int npages); +void msm_gem_close_vma(struct msm_gem_address_space *aspace, + struct msm_gem_vma *vma); + struct msm_gem_object { struct drm_gem_object base; =20 --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7B28AC433EF for ; Wed, 30 Mar 2022 20:48:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351128AbiC3Uts (ORCPT ); Wed, 30 Mar 2022 16:49:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54154 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351109AbiC3Utn (ORCPT ); Wed, 30 Mar 2022 16:49:43 -0400 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CABE46B21; Wed, 30 Mar 2022 13:47:58 -0700 (PDT) Received: by mail-pg1-x52c.google.com with SMTP id bc27so18422267pgb.4; Wed, 30 Mar 2022 13:47:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=g43LRxOPnuHcbyfQfDVoT6M8d2laa4QFWkHWb/Yu4qg=; b=EDj7+eTg1TCkYEULfp1MIR/SDGZ0rXOcFYFdpXrZl3dyOhLMllkDqxH5w6NCq/+ozh IvzMMurJ5Zb9xcmgqlBDONonrMbulUdRXYM+rR73Wl38EmF1IEDCmP8xV3dm6KYaWa0c tMBtuKWFQ8mqGqf4mgc+JhcHqkXY/Y9FBXy4yClMgazSZhiDdSOUZtEz7Tnw3P3MBP6x b9HDiuX//DJ06r1Brfeu/Fd8jR9TZotTOeZw/1LgpR/JZ2WQcy2vg7OMDV4CF2zgQIx1 c1OsjNboj/1eD1aZz24tua2kVInPgU8fJkEHG8f0nvksMnaeyqDTkvFactksmCMW1IjZ afvw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=g43LRxOPnuHcbyfQfDVoT6M8d2laa4QFWkHWb/Yu4qg=; b=fycqwc10GUXYLEWIKEX1k3gAK1+NH/dnPqlcjAnmvCYgyI54nc6dZbzSfH50+xICyz 8xg3Bpac0PNEeFGqB5Fqo01DAAHtxsbZpj6sAzVsMh1OXVYxAx6St2iyqexqsqhw580R BAGBFCO1wrL5j/hY4KGXhUIEb61QwKT2kBTyQkUlUnBCRn1SV5Hn3xW3elROsbAWz790 4DR/NmI9jAJQ/XrTe00Iu/jfNgbXyEcwz6XTdj4n5dqqhdgugLNpWjBDvGyKCiAdcCk2 +9sRvF/MieHMt1cS+pMPvzNeOPZQvN7AiEDn6veLUZp9+si36WNaiqjbdgtJ0rZf6Ww1 DwEA== X-Gm-Message-State: AOAM532DzqMED6yxBgVnvxHRZnMmKqo8A6eJ37gl48qzDaToBMR+QflP +bTvpcM0y9TMG5t1zfMOywE= X-Google-Smtp-Source: ABdhPJzs6n1xh1i7+qLLrdd2K/konTPn+T9Q2ItRvfEIcXWKRpDoCWXZXzbTAnI6HcHmCkpTnnfRiw== X-Received: by 2002:a05:6a00:e8e:b0:4fa:a52f:59cf with SMTP id bo14-20020a056a000e8e00b004faa52f59cfmr1475528pfb.84.1648673277619; Wed, 30 Mar 2022 13:47:57 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id o22-20020a056a0015d600b004fb03c903c3sm21474179pfu.71.2022.03.30.13.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:47:56 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Jordan Crouse , Akhil P Oommen , Vladimir Lypak , Yangtao Li , Jonathan Marek , Emma Anholt , Dan Carpenter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 02/10] drm/msm/gpu: Drop duplicate fence counter Date: Wed, 30 Mar 2022 13:47:47 -0700 Message-Id: <20220330204804.660819-3-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark The ring seqno counter duplicates the fence-context last_fence counter. They end up getting incremented in lock-step, on the same scheduler thread, but the split just makes things less obvious. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 4 ++-- drivers/gpu/drm/msm/msm_gpu.c | 8 ++++---- drivers/gpu/drm/msm/msm_gpu.h | 2 +- drivers/gpu/drm/msm/msm_ringbuffer.h | 1 - 6 files changed, 9 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c b/drivers/gpu/drm/msm/ad= reno/a5xx_gpu.c index 407f50a15faa..d31aa87c6c8d 100644 --- a/drivers/gpu/drm/msm/adreno/a5xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c @@ -1235,7 +1235,7 @@ static void a5xx_fault_detect_irq(struct msm_gpu *gpu) return; =20 DRM_DEV_ERROR(dev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x= /%4.4x ib1 %16.16llX/%4.4x ib2 %16.16llX/%4.4x\n", - ring ? ring->id : -1, ring ? ring->seqno : 0, + ring ? ring->id : -1, ring ? ring->fctx->last_fence : 0, gpu_read(gpu, REG_A5XX_RBBM_STATUS), gpu_read(gpu, REG_A5XX_CP_RB_RPTR), gpu_read(gpu, REG_A5XX_CP_RB_WPTR), diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gpu.c index 83c31b2ad865..17de46fc4bf2 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c @@ -1390,7 +1390,7 @@ static void a6xx_fault_detect_irq(struct msm_gpu *gpu) =20 DRM_DEV_ERROR(&gpu->pdev->dev, "gpu fault ring %d fence %x status %8.8X rb %4.4x/%4.4x ib1 %16.16llX/%4= .4x ib2 %16.16llX/%4.4x\n", - ring ? ring->id : -1, ring ? ring->seqno : 0, + ring ? ring->id : -1, ring ? ring->fctx->last_fence : 0, gpu_read(gpu, REG_A6XX_RBBM_STATUS), gpu_read(gpu, REG_A6XX_CP_RB_RPTR), gpu_read(gpu, REG_A6XX_CP_RB_WPTR), diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index 45f2c6084aa7..6385ab06632f 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -578,7 +578,7 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct ms= m_gpu_state *state) =20 state->ring[i].fence =3D gpu->rb[i]->memptrs->fence; state->ring[i].iova =3D gpu->rb[i]->iova; - state->ring[i].seqno =3D gpu->rb[i]->seqno; + state->ring[i].seqno =3D gpu->rb[i]->fctx->last_fence; state->ring[i].rptr =3D get_rptr(adreno_gpu, gpu->rb[i]); state->ring[i].wptr =3D get_wptr(gpu->rb[i]); =20 @@ -828,7 +828,7 @@ void adreno_dump_info(struct msm_gpu *gpu) =20 printk("rb %d: fence: %d/%d\n", i, ring->memptrs->fence, - ring->seqno); + ring->fctx->last_fence); =20 printk("rptr: %d\n", get_rptr(adreno_gpu, ring)); printk("rb wptr: %d\n", get_wptr(ring)); diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 747b89aa9d13..9480bdf875db 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -534,7 +534,7 @@ static void hangcheck_handler(struct timer_list *t) if (fence !=3D ring->hangcheck_fence) { /* some progress has been made.. ya! */ ring->hangcheck_fence =3D fence; - } else if (fence_before(fence, ring->seqno)) { + } else if (fence_before(fence, ring->fctx->last_fence)) { /* no progress and not done.. hung! */ ring->hangcheck_fence =3D fence; DRM_DEV_ERROR(dev->dev, "%s: hangcheck detected gpu lockup rb %d!\n", @@ -542,13 +542,13 @@ static void hangcheck_handler(struct timer_list *t) DRM_DEV_ERROR(dev->dev, "%s: completed fence: %u\n", gpu->name, fence); DRM_DEV_ERROR(dev->dev, "%s: submitted fence: %u\n", - gpu->name, ring->seqno); + gpu->name, ring->fctx->last_fence); =20 kthread_queue_work(gpu->worker, &gpu->recover_work); } =20 /* if still more pending work, reset the hangcheck timer: */ - if (fence_after(ring->seqno, ring->hangcheck_fence)) + if (fence_after(ring->fctx->last_fence, ring->hangcheck_fence)) hangcheck_timer_reset(gpu); =20 /* workaround for missing irq: */ @@ -770,7 +770,7 @@ void msm_gpu_submit(struct msm_gpu *gpu, struct msm_gem= _submit *submit) =20 msm_gpu_hw_init(gpu); =20 - submit->seqno =3D ++ring->seqno; + submit->seqno =3D submit->hw_fence->seqno; =20 msm_rd_dump_submit(priv->rd, submit, NULL); =20 diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 2c0203fd6ce3..e47a42b1244a 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -291,7 +291,7 @@ static inline bool msm_gpu_active(struct msm_gpu *gpu) for (i =3D 0; i < gpu->nr_rings; i++) { struct msm_ringbuffer *ring =3D gpu->rb[i]; =20 - if (fence_after(ring->seqno, ring->memptrs->fence)) + if (fence_after(ring->fctx->last_fence, ring->memptrs->fence)) return true; } =20 diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.h b/drivers/gpu/drm/msm/msm= _ringbuffer.h index d8c63df4e9ca..2a5045abe46e 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.h +++ b/drivers/gpu/drm/msm/msm_ringbuffer.h @@ -59,7 +59,6 @@ struct msm_ringbuffer { spinlock_t submit_lock; =20 uint64_t iova; - uint32_t seqno; uint32_t hangcheck_fence; struct msm_rbmemptrs *memptrs; uint64_t memptrs_iova; --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C85C3C433F5 for ; Wed, 30 Mar 2022 20:48:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351147AbiC3Utt (ORCPT ); Wed, 30 Mar 2022 16:49:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351131AbiC3Utq (ORCPT ); Wed, 30 Mar 2022 16:49:46 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD59746B2B; Wed, 30 Mar 2022 13:48:00 -0700 (PDT) Received: by mail-pj1-x102e.google.com with SMTP id jx9so21906944pjb.5; Wed, 30 Mar 2022 13:48:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SGa5BVmzMUOjfF5fklYjMnwty8EXXy2NltxcnqNLnSI=; b=DSd0Nzz9hIrhZxIZfNCcmrP6ngFJEnXjmtoQvedf5AXNAco5uLpIdKfMnlFhduseHm ghdLVjUhcyu+e1ldHlAqMbqU+D/xstz3gB16jtbSryEdaXLNy44Aud1Uyr8hUDLIvxKJ bKZ+rbXZt2JSjOCWFu1wfmmUopJu7uW8SicjmuK+3Z1G3CAxIwxGJiUp+EHDrmZxC8LZ BFc7YfLczqNkUfPtfqyMxkf7GqmUzMt+rUYEp7+0jJ6gmOUEQuo2Ra8qRrc8eKo5Nida ll7sQlqQ0Hz8mi6RrtbNn8Xdw69ESHzWNJCkWHvxeS7upUM1aD9ca9AjgLm/ZnIPlnJm ydXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SGa5BVmzMUOjfF5fklYjMnwty8EXXy2NltxcnqNLnSI=; b=xUpdeIbIGeRsuw4K0oM3hZ22M6BypWE3tqdiGKxw0BV7XAiGy9erOUmvjzIiEJ9WS9 RgoI1j7ICvKW4mFYCKkkIBbSUZPnRDbZ0NhAeDkBCY2Q6ZKW74Nc5x1O4WKNlmVXnxhp c8WqBQOuvlyStHuw+u73nqZxl0xR3IT+jG10t8wA3nxAOs+3QqfVkrCAve2ouFbHGfC2 Gm4hf6Z/g9esa6kary3ShsQ6rYHSFIFJFugkWAr/gNx1mOFrp96ykODC15COnz8lJKvd SQevc46y60xMnG3g4RdYNUGbmmFy1XhOnfBRBWvovrKSOwmp5X8XZFkeeiOpUhV3aCK7 lUoA== X-Gm-Message-State: AOAM531cnQfr1sAlC56EO08oXjfGh+jt4lxjm8O1tjEvCMlBdIt7qrQe X0H/rFiTuCm0KuKXN1M6oDU= X-Google-Smtp-Source: ABdhPJz4skMp1REpP6c7Chg16yU1uOCWTgymMz/5cLiay5QYtR+SyDD1L5Qm4FsQDK0GEkCXZL4plw== X-Received: by 2002:a17:902:d4c1:b0:153:d493:3f1 with SMTP id o1-20020a170902d4c100b00153d49303f1mr1601609plg.102.1648673280201; Wed, 30 Mar 2022 13:48:00 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id y9-20020a056a00180900b004faa45a2230sm25216397pfa.210.2022.03.30.13.47.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:47:59 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 03/10] drm/msm/gem: Convert some missed GEM_WARN_ON()s Date: Wed, 30 Mar 2022 13:47:48 -0700 Message-Id: <20220330204804.660819-4-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem_vma.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_ge= m_vma.c index f914ddbaea89..64906594fc65 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -44,7 +44,7 @@ void msm_gem_purge_vma(struct msm_gem_address_space *aspa= ce, unsigned size =3D vma->node.size << PAGE_SHIFT; =20 /* Print a message if we try to purge a vma in use */ - if (WARN_ON(vma->inuse > 0)) + if (GEM_WARN_ON(vma->inuse > 0)) return; =20 /* Don't do anything if the memory isn't mapped */ @@ -61,7 +61,7 @@ void msm_gem_purge_vma(struct msm_gem_address_space *aspa= ce, void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) { - if (!WARN_ON(!vma->iova)) + if (!GEM_WARN_ON(!vma->iova)) vma->inuse--; } =20 @@ -73,7 +73,7 @@ msm_gem_map_vma(struct msm_gem_address_space *aspace, unsigned size =3D npages << PAGE_SHIFT; int ret =3D 0; =20 - if (WARN_ON(!vma->iova)) + if (GEM_WARN_ON(!vma->iova)) return -EINVAL; =20 /* Increase the usage counter */ @@ -100,7 +100,7 @@ msm_gem_map_vma(struct msm_gem_address_space *aspace, void msm_gem_close_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) { - if (WARN_ON(vma->inuse > 0 || vma->mapped)) + if (GEM_WARN_ON(vma->inuse > 0 || vma->mapped)) return; =20 spin_lock(&aspace->lock); @@ -120,7 +120,7 @@ int msm_gem_init_vma(struct msm_gem_address_space *aspa= ce, { int ret; =20 - if (WARN_ON(vma->iova)) + if (GEM_WARN_ON(vma->iova)) return -EBUSY; =20 spin_lock(&aspace->lock); --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D9C97C433EF for ; Wed, 30 Mar 2022 20:48:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351156AbiC3Utw (ORCPT ); Wed, 30 Mar 2022 16:49:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54282 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351130AbiC3Uts (ORCPT ); Wed, 30 Mar 2022 16:49:48 -0400 Received: from mail-pf1-x42b.google.com (mail-pf1-x42b.google.com [IPv6:2607:f8b0:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2BB5E46B21; Wed, 30 Mar 2022 13:48:03 -0700 (PDT) Received: by mail-pf1-x42b.google.com with SMTP id s11so19907234pfu.13; Wed, 30 Mar 2022 13:48:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tAkFR+6vhq0o/UUKOqeWc9uPJoN5WXdSoZFQuuhB/hI=; b=FaRX1UWeh8GQfsWkMrLyB/2P+dHN9Hng7Nnbkb8Dmccr6iK2ArjJbfSlU8EPowuRWM qW31UzHkCjytuoAR+WWkvmyCp3G4iMnoWx/nnxlHTLpAJUQbM6GVypBSaZwMyvLSvARW ScQl1zEZXblXWWXw9Ao0riGA53h1pygszQSJnMez126k9Azct1fKBoXLyPcmzCicD4J0 4HwypBgxCK8bwUjzSXEeBNYCMLJBm3zt7CE+xreRbChK4sOA1MmLNzXoGnceIs57lW6H LuE9H0um3vrd7lKNr9E2BPQqKoF6+bx/PIgeyCRbpWeyXfH3ZlRKF2JsOe2CV+9V9fdo M55Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tAkFR+6vhq0o/UUKOqeWc9uPJoN5WXdSoZFQuuhB/hI=; b=JOK7QZVDDJAsWhqIMNiYG6Ut4hNyeauXjLe8Q0v/MGcKDSAVr2LzpjRxKGZdVZuuOO miB+gUiucgkVKVhipljRELZfIXTyNx4pyp6LjDR4bNq8BDbpXIkJSlexhyXoZlg8ZFTL QvfiBB0ym08mLOYqEaTEga/X27mP1S6U+/+SRn9JP/2X11lfR6eViDDTBoJL4Ok65kb4 Z3yWXqzNoUFbRIfoE2pS5yEXrbDbwa9EfM3ZIPwqyzx9taBM1XOmXr1qrJHQLI+aKZXQ owKTHPl4xBa1repsJiiH/MPgC/PwndsegPIs3B5VKZfpkUkAppJhs114teD3hzilm/nu XIEw== X-Gm-Message-State: AOAM532e+Wc5eBw3MIOl4fa4gDXPaUbpWgA46SCtBKA288PXcDVWRjxC /JRY8Eup4GEwy6hU+NCdAag= X-Google-Smtp-Source: ABdhPJzyLcWT52tc3P1GfBTk7VIU++snmA/PldvdmH9n7aHI7zf3vdwf3YMazpOjlkZVEhlMgaeJ3Q== X-Received: by 2002:a63:4005:0:b0:373:9ac7:fec1 with SMTP id n5-20020a634005000000b003739ac7fec1mr7699274pga.12.1648673282631; Wed, 30 Mar 2022 13:48:02 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id u10-20020a63b54a000000b00380ea901cd2sm19805501pgo.6.2022.03.30.13.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:01 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 04/10] drm/msm/gem: Split out inuse helper Date: Wed, 30 Mar 2022 13:47:49 -0700 Message-Id: <20220330204804.660819-5-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Prep for a following patch, where it gets a bit more complicated. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 1 + drivers/gpu/drm/msm/msm_gem_vma.c | 9 +++++++-- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index a4f61972667b..f96d1dc72021 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -938,7 +938,7 @@ void msm_gem_describe(struct drm_gem_object *obj, struc= t seq_file *m, name, comm ? ":" : "", comm ? comm : "", vma->aspace, vma->iova, vma->mapped ? "mapped" : "unmapped", - vma->inuse); + msm_gem_vma_inuse(vma)); kfree(comm); } =20 diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 947ff7d9b471..1b7f0f0b88bf 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -61,6 +61,7 @@ struct msm_gem_vma { int msm_gem_init_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int npages, u64 range_start, u64 range_end); +bool msm_gem_vma_inuse(struct msm_gem_vma *vma); void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma); void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_ge= m_vma.c index 64906594fc65..dc2ae097805e 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -37,6 +37,11 @@ msm_gem_address_space_get(struct msm_gem_address_space *= aspace) return aspace; } =20 +bool msm_gem_vma_inuse(struct msm_gem_vma *vma) +{ + return !!vma->inuse; +} + /* Actually unmap memory for the vma */ void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) @@ -44,7 +49,7 @@ void msm_gem_purge_vma(struct msm_gem_address_space *aspa= ce, unsigned size =3D vma->node.size << PAGE_SHIFT; =20 /* Print a message if we try to purge a vma in use */ - if (GEM_WARN_ON(vma->inuse > 0)) + if (GEM_WARN_ON(msm_gem_vma_inuse(vma))) return; =20 /* Don't do anything if the memory isn't mapped */ @@ -100,7 +105,7 @@ msm_gem_map_vma(struct msm_gem_address_space *aspace, void msm_gem_close_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) { - if (GEM_WARN_ON(vma->inuse > 0 || vma->mapped)) + if (GEM_WARN_ON(msm_gem_vma_inuse(vma) || vma->mapped)) return; =20 spin_lock(&aspace->lock); --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5268C433EF for ; Wed, 30 Mar 2022 20:48:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351187AbiC3UuP (ORCPT ); Wed, 30 Mar 2022 16:50:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351162AbiC3Ut7 (ORCPT ); Wed, 30 Mar 2022 16:49:59 -0400 Received: from mail-pf1-x430.google.com (mail-pf1-x430.google.com [IPv6:2607:f8b0:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFA5F473BB; Wed, 30 Mar 2022 13:48:06 -0700 (PDT) Received: by mail-pf1-x430.google.com with SMTP id z16so19936898pfh.3; Wed, 30 Mar 2022 13:48:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fYDyepM1PAw2FFzhXN5YHyImg0OWJ25svdZsQDoslA8=; b=ChVMQToydrt+7HGXPCiIPagn73alyXCDQwOewO9LNcXKaY3wJod0f1Wr9TxpzQ9908 AaQ3ngeH6Nf2g9WG5OSC6Y+BynUXNFF7Cpbp5d3513UQxhvfm/+BTRNktwebBqhIZih8 eiOPj5odKM3VYb+PEUkhPULpW3gvrwUAa5/dlmIGdZW/QnP0iPutXZfFsy2BJqvtjP7Q nT17wtqZgqBndc+E4RkBblbSY8etJTlPwEcqkrpYVVfOgpWZFra2aqojUWV45NMxK5HC Mn32p5oAEiZPqa9UubcKPZjJFCNkwrHFyxnYKkxRHAUQO6CNawkvn0IH+gBhU5nrOcWh 0dig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fYDyepM1PAw2FFzhXN5YHyImg0OWJ25svdZsQDoslA8=; b=t6agZW2hsr5ZvIH6FeuZcYUpc5Bbgevq9sa/9NS/3aUmzueRBrE/4oJ8gU5HK0nJED LcwNkaHKAAgAuuWEo7DK1DH1h3jSf7OyN6v35dz768KESYzjVNuRDoiwpDcjdutjlpb8 9hdUFJ/V7yOcO8TC8hQhDHlrpaoumJ2if8yzBX3jtiFQiWpgS74rnnOCEOI2tlAZ01m9 dtarj9TrBmELQO2Nc5K9ESnVmlfGDcWOh6JXUclKGPw+BGx2dKhcdN/4LAx58HlL3LU4 hga74QnSZXv2GPhK6iwAfiZRmg5lmBB7Om9cU8e4mCB08ZnTQfVjzFjbsdfvlnmwXWCx TB/Q== X-Gm-Message-State: AOAM530SF+RlhhHMw8Cbtwsd+2pIk3v7p5RJOHbiWzCSbZNAXTCuGeqQ 7HixyFU6Z7mYjVj0uVKiUQo= X-Google-Smtp-Source: ABdhPJysrCW7T4xLr30Fk4k5Y9pqgTYVNJdHJPSmvaqNrmHMUh6eDCzdUrrBZBnkmHm6GQ5x+MtBKw== X-Received: by 2002:a65:530b:0:b0:382:b21d:82eb with SMTP id m11-20020a65530b000000b00382b21d82ebmr7766001pgq.215.1648673286092; Wed, 30 Mar 2022 13:48:06 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id f192-20020a636ac9000000b0039836edcf42sm11513218pgc.85.2022.03.30.13.48.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:05 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Jonathan Marek , Akhil P Oommen , Bjorn Andersson , Wang Qing , Dan Carpenter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 05/10] drm/msm/gem: Drop PAGE_SHIFT for address space mm Date: Wed, 30 Mar 2022 13:47:50 -0700 Message-Id: <20220330204804.660819-6-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Get rid of all the unnecessary conversion between address/size and page offsets. It just confuses things. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +- drivers/gpu/drm/msm/msm_gem.c | 5 ++--- drivers/gpu/drm/msm/msm_gem.h | 4 ++-- drivers/gpu/drm/msm/msm_gem_vma.c | 16 ++++++++-------- 4 files changed, 13 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/ad= reno/a6xx_gmu.c index 3e325e2a2b1b..9f76f5b15759 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1172,7 +1172,7 @@ static int a6xx_gmu_memory_alloc(struct a6xx_gmu *gmu= , struct a6xx_gmu_bo *bo, return PTR_ERR(bo->obj); =20 ret =3D msm_gem_get_and_pin_iova_range(bo->obj, gmu->aspace, &bo->iova, - range_start >> PAGE_SHIFT, range_end >> PAGE_SHIFT); + range_start, range_end); if (ret) { drm_gem_object_put(bo->obj); return ret; diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index f96d1dc72021..f4b68bb28a4d 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -392,7 +392,7 @@ static int get_iova_locked(struct drm_gem_object *obj, if (IS_ERR(vma)) return PTR_ERR(vma); =20 - ret =3D msm_gem_init_vma(aspace, vma, obj->size >> PAGE_SHIFT, + ret =3D msm_gem_init_vma(aspace, vma, obj->size, range_start, range_end); if (ret) { del_vma(vma); @@ -434,8 +434,7 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj, if (IS_ERR(pages)) return PTR_ERR(pages); =20 - ret =3D msm_gem_map_vma(aspace, vma, prot, - msm_obj->sgt, obj->size >> PAGE_SHIFT); + ret =3D msm_gem_map_vma(aspace, vma, prot, msm_obj->sgt, obj->size); =20 if (!ret) msm_obj->pin_count++; diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 1b7f0f0b88bf..090c3b1a6d9a 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -59,7 +59,7 @@ struct msm_gem_vma { }; =20 int msm_gem_init_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int npages, + struct msm_gem_vma *vma, int size, u64 range_start, u64 range_end); bool msm_gem_vma_inuse(struct msm_gem_vma *vma); void msm_gem_purge_vma(struct msm_gem_address_space *aspace, @@ -68,7 +68,7 @@ void msm_gem_unmap_vma(struct msm_gem_address_space *aspa= ce, struct msm_gem_vma *vma); int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int prot, - struct sg_table *sgt, int npages); + struct sg_table *sgt, int size); void msm_gem_close_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma); =20 diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_ge= m_vma.c index dc2ae097805e..4949899f1fc7 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -46,7 +46,7 @@ bool msm_gem_vma_inuse(struct msm_gem_vma *vma) void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma) { - unsigned size =3D vma->node.size << PAGE_SHIFT; + unsigned size =3D vma->node.size; =20 /* Print a message if we try to purge a vma in use */ if (GEM_WARN_ON(msm_gem_vma_inuse(vma))) @@ -73,9 +73,8 @@ void msm_gem_unmap_vma(struct msm_gem_address_space *aspa= ce, int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int prot, - struct sg_table *sgt, int npages) + struct sg_table *sgt, int size) { - unsigned size =3D npages << PAGE_SHIFT; int ret =3D 0; =20 if (GEM_WARN_ON(!vma->iova)) @@ -120,7 +119,7 @@ void msm_gem_close_vma(struct msm_gem_address_space *as= pace, =20 /* Initialize a new vma and allocate an iova for it */ int msm_gem_init_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma, int npages, + struct msm_gem_vma *vma, int size, u64 range_start, u64 range_end) { int ret; @@ -129,14 +128,15 @@ int msm_gem_init_vma(struct msm_gem_address_space *as= pace, return -EBUSY; =20 spin_lock(&aspace->lock); - ret =3D drm_mm_insert_node_in_range(&aspace->mm, &vma->node, npages, 0, - 0, range_start, range_end, 0); + ret =3D drm_mm_insert_node_in_range(&aspace->mm, &vma->node, + size, PAGE_SIZE, 0, + range_start, range_end, 0); spin_unlock(&aspace->lock); =20 if (ret) return ret; =20 - vma->iova =3D vma->node.start << PAGE_SHIFT; + vma->iova =3D vma->node.start; vma->mapped =3D false; =20 kref_get(&aspace->kref); @@ -161,7 +161,7 @@ msm_gem_address_space_create(struct msm_mmu *mmu, const= char *name, aspace->name =3D name; aspace->mmu =3D mmu; =20 - drm_mm_init(&aspace->mm, va_start >> PAGE_SHIFT, size >> PAGE_SHIFT); + drm_mm_init(&aspace->mm, va_start, size); =20 kref_init(&aspace->kref); =20 --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BEA83C433F5 for ; Wed, 30 Mar 2022 20:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350263AbiC3Uua (ORCPT ); Wed, 30 Mar 2022 16:50:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54816 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351170AbiC3Ut7 (ORCPT ); Wed, 30 Mar 2022 16:49:59 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53FD547AE8; Wed, 30 Mar 2022 13:48:09 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id a16-20020a17090a6d9000b001c7d6c1bb13so1325719pjk.4; Wed, 30 Mar 2022 13:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=NOdxvPtlisUpSXyoJyoVKYjYLlL/fOVfmd/T3oP24MA=; b=gnO1+Uz1zwVNZdc7ViqrJ2uXAA9XBhjgYTjmNeTFVVHzTuLqLA/dXsX3t6DteVlrB0 tnXmqffRqVAKy7rSeHJ503EGdIPkFFVp52VE2tW/X1q4lJs4NUlhupT88Wd+Gvrco9oI IsTB2PDlAzkLvtGs78iW45C7AVmXdiWi8Xjvjww5xQlXZSdkQsc69TKko4ele8+3TZnX c6KHXMpehwoJgBvxMJzZLnDMB5QhP6K9mWZovvcIBbkFHgl9PEwxh2oA/Oy/Ty2Y34Y1 L7Z86rVsjvKnA8yrhhNeidZ9O91DHv73CTYdsDmCoT+wstnBNmT241CsQL1EvgOm65iI 9OlA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=NOdxvPtlisUpSXyoJyoVKYjYLlL/fOVfmd/T3oP24MA=; b=DbnOyV/czZQ7hHKWLDPPYpMBd2/nKi58BRS7eEADwlCXR18T6aIZcPPhezQoKsa3DP 4VbbGabbni67vKJ9dDeuynClwHn2fPptaplzSjUG6FRUe41uvjCLzStKozyNjEE68Llo L9TpoTAjPRZGMd8plhDDvSd37R7ED/M7pjtw2EwtL3exTftl/qbDtGoxxXw0dRGhTfG0 7IYjXSx2T0cIciE/0gLsxL5Qp7vYILmA3b50gMkfEWsln6Y44V4ymwT4ZDzRx2T29EJ/ /A3aj9BepF6dPx9BW76R9eak/6MjEZqbtMzQb5M17gM66KCuRs1o+dMM61ny6t+ciD8m IO8w== X-Gm-Message-State: AOAM533M5Ve2g6JyD76bWVSFeR1pe/AXVAkItNJsrzdLovFz4yC1yP9o AuC8EjojyDmY1RjZuEwrUFw= X-Google-Smtp-Source: ABdhPJxuJKHDkDYK605WbB4re1/4y+Ms0Jo9eQFbbKvEzPSoEMHXuspIEx1zRw/AmFt8H/Yz6mdMAw== X-Received: by 2002:a17:902:f70c:b0:14e:f1a4:d894 with SMTP id h12-20020a170902f70c00b0014ef1a4d894mr1609506plo.65.1648673288700; Wed, 30 Mar 2022 13:48:08 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id k20-20020aa788d4000000b004fb07f819c1sm20293768pff.50.2022.03.30.13.48.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:07 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 06/10] drm/msm: Drop msm_gem_iova() Date: Wed, 30 Mar 2022 13:47:51 -0700 Message-Id: <20220330204804.660819-7-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark There was only a single user, which could just as easily stash the iova when pinning. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/msm_fb.c | 16 ++++++++++------ drivers/gpu/drm/msm/msm_gem.c | 16 ---------------- drivers/gpu/drm/msm/msm_gem.h | 2 -- 3 files changed, 10 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_fb.c b/drivers/gpu/drm/msm/msm_fb.c index 7137492fe78e..d4eef66e29dc 100644 --- a/drivers/gpu/drm/msm/msm_fb.c +++ b/drivers/gpu/drm/msm/msm_fb.c @@ -21,6 +21,9 @@ struct msm_framebuffer { =20 /* Count of # of attached planes which need dirtyfb: */ refcount_t dirtyfb; + + /* Framebuffer per-plane address, if pinned, else zero: */ + uint64_t iova[DRM_FORMAT_MAX_PLANES]; }; #define to_msm_framebuffer(x) container_of(x, struct msm_framebuffer, base) =20 @@ -76,14 +79,14 @@ int msm_framebuffer_prepare(struct drm_framebuffer *fb, { struct msm_framebuffer *msm_fb =3D to_msm_framebuffer(fb); int ret, i, n =3D fb->format->num_planes; - uint64_t iova; =20 if (needs_dirtyfb) refcount_inc(&msm_fb->dirtyfb); =20 for (i =3D 0; i < n; i++) { - ret =3D msm_gem_get_and_pin_iova(fb->obj[i], aspace, &iova); - drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)", fb->base.id, i, = iova, ret); + ret =3D msm_gem_get_and_pin_iova(fb->obj[i], aspace, &msm_fb->iova[i]); + drm_dbg_state(fb->dev, "FB[%u]: iova[%d]: %08llx (%d)", + fb->base.id, i, msm_fb->iova[i], ret); if (ret) return ret; } @@ -103,14 +106,15 @@ void msm_framebuffer_cleanup(struct drm_framebuffer *= fb, =20 for (i =3D 0; i < n; i++) msm_gem_unpin_iova(fb->obj[i], aspace); + + memset(msm_fb->iova, 0, sizeof(msm_fb->iova)); } =20 uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, struct msm_gem_address_space *aspace, int plane) { - if (!fb->obj[plane]) - return 0; - return msm_gem_iova(fb->obj[plane], aspace) + fb->offsets[plane]; + struct msm_framebuffer *msm_fb =3D to_msm_framebuffer(fb); + return msm_fb->iova[plane]; } =20 struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int = plane) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index f4b68bb28a4d..deafae6feaa8 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -509,22 +509,6 @@ int msm_gem_get_iova(struct drm_gem_object *obj, return ret; } =20 -/* get iova without taking a reference, used in places where you have - * already done a 'msm_gem_get_and_pin_iova' or 'msm_gem_get_iova' - */ -uint64_t msm_gem_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace) -{ - struct msm_gem_vma *vma; - - msm_gem_lock(obj); - vma =3D lookup_vma(obj, aspace); - msm_gem_unlock(obj); - GEM_WARN_ON(!vma); - - return vma ? vma->iova : 0; -} - /* * Locked variant of msm_gem_unpin_iova() */ diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 090c3b1a6d9a..772de010a669 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -142,8 +142,6 @@ int msm_gem_get_and_pin_iova_locked(struct drm_gem_obje= ct *obj, struct msm_gem_address_space *aspace, uint64_t *iova); int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); -uint64_t msm_gem_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace); void msm_gem_unpin_iova_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace); void msm_gem_unpin_iova(struct drm_gem_object *obj, --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3926DC433F5 for ; Wed, 30 Mar 2022 20:48:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351157AbiC3Uul (ORCPT ); Wed, 30 Mar 2022 16:50:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351161AbiC3UuF (ORCPT ); Wed, 30 Mar 2022 16:50:05 -0400 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3C4849933; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) Received: by mail-pj1-x1035.google.com with SMTP id mr5-20020a17090b238500b001c67366ae93so807258pjb.4; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tOn9Tor8polPNHF4xDcLky0lDAw9l38xozLRMXI1//U=; b=UPK7hL40Q2YvCF9wKbtwYgJsCkDD4S3VjnoBgdNSt+WHM9zo7jOHSYtbtzE/pU7cc0 vWJUocRHernfEg73QBM9SK2P7rVRf+2qdpt+ZCnjAmUNaIeYI02wik/UvelXsmEXugFg mTdOEsnNaUwfQ3W9rElImmVHtS95BnTfIj0w4SFFy33B7vRuFqiyB0rLTQpND+vxfjtH rCYoA7o2YWALAs1UeWMk1if0oh2cESd++RhA4sJ9c4ITBqScF7/6YyldnC+nq+FLVFGB 8O8zqvBh1YQAdW1FoWS9e2nQjbVz42hJ+8eewUQecBhbeb47p8JtIXXDUNSDVXTrK/WH dwSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tOn9Tor8polPNHF4xDcLky0lDAw9l38xozLRMXI1//U=; b=bKqw9IZ+8KdPmcrAeJyrWLaUBihGEfpgEhlUnC6QQZtpjvrr8C70Q9F399p+LTiLL9 CI6Lqamwq8YesqYOR7p3aGzU9rK8/4mbMpOMtBtDnsPGOoNUkfGprZidO04gZ2g4JzVP 6wj+DvfoNGStOKDCCCzs9ra610L4arNzG+Fm20sXqs7zrT4TOMnTIZJWFPkVtR/Szy15 Y08ZREPaXFRJYP+DOgRkUoz87wnY+FXLxyd9h8k9FNscW3f+s7Lm/zCIkggbzQb7d5s0 6gxOaY4fA1zfo5m8JWQfiqJCfdYYL8g9LeAdbCiq34SBU2QeHKRk5xVvTfww/r4L5Rgd Ntdg== X-Gm-Message-State: AOAM532PDNMe2ce4VnhQFbY9rBkCxVdpAmKCQw6jxWsdbSrbTVE0L2Q1 jGxgNyQK6BsdpCZ12rw5vRE= X-Google-Smtp-Source: ABdhPJwJYRnX56RJoMLOVKWPDbw1s9PqMDGKWuJcsQPWKmnOylUzAMHvewFPAxCbjEv4C8yhrsXlMQ== X-Received: by 2002:a17:902:c745:b0:151:e8fa:629b with SMTP id q5-20020a170902c74500b00151e8fa629bmr38131930plq.90.1648673291159; Wed, 30 Mar 2022 13:48:11 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id d21-20020a056a0024d500b004fb0e7c7c3bsm21656825pfv.161.2022.03.30.13.48.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:10 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 07/10] drm/msm/gem: Rework vma lookup and pin Date: Wed, 30 Mar 2022 13:47:52 -0700 Message-Id: <20220330204804.660819-8-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark Combines duplicate vma lookup in the get_and_pin path. Signed-off-by: Rob Clark Reviewed-by: Dmitry Osipenko --- drivers/gpu/drm/msm/msm_gem.c | 50 ++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index deafae6feaa8..218744a490a4 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -376,39 +376,40 @@ put_iova_vmas(struct drm_gem_object *obj) } } =20 -static int get_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace, uint64_t *iova, +static struct msm_gem_vma *get_vma_locked(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, u64 range_start, u64 range_end) { struct msm_gem_vma *vma; - int ret =3D 0; =20 GEM_WARN_ON(!msm_gem_is_locked(obj)); =20 vma =3D lookup_vma(obj, aspace); =20 if (!vma) { + int ret; + vma =3D add_vma(obj, aspace); if (IS_ERR(vma)) - return PTR_ERR(vma); + return vma; =20 ret =3D msm_gem_init_vma(aspace, vma, obj->size, range_start, range_end); if (ret) { del_vma(vma); - return ret; + return ERR_PTR(ret); } + } else { + GEM_WARN_ON(vma->iova < range_start); + GEM_WARN_ON((vma->iova + obj->size) > range_end); } =20 - *iova =3D vma->iova; - return 0; + return vma; } =20 -static int msm_gem_pin_iova(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace) +static int msm_gem_pin_iova(struct drm_gem_object *obj, struct msm_gem_vma= *vma) { struct msm_gem_object *msm_obj =3D to_msm_bo(obj); - struct msm_gem_vma *vma; struct page **pages; int ret, prot =3D IOMMU_READ; =20 @@ -426,15 +427,11 @@ static int msm_gem_pin_iova(struct drm_gem_object *ob= j, if (GEM_WARN_ON(msm_obj->madv !=3D MSM_MADV_WILLNEED)) return -EBUSY; =20 - vma =3D lookup_vma(obj, aspace); - if (GEM_WARN_ON(!vma)) - return -EINVAL; - pages =3D get_pages(obj); if (IS_ERR(pages)) return PTR_ERR(pages); =20 - ret =3D msm_gem_map_vma(aspace, vma, prot, msm_obj->sgt, obj->size); + ret =3D msm_gem_map_vma(vma->aspace, vma, prot, msm_obj->sgt, obj->size); =20 if (!ret) msm_obj->pin_count++; @@ -446,19 +443,18 @@ static int get_and_pin_iova_range_locked(struct drm_g= em_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end) { - u64 local; + struct msm_gem_vma *vma; int ret; =20 GEM_WARN_ON(!msm_gem_is_locked(obj)); =20 - ret =3D get_iova_locked(obj, aspace, &local, - range_start, range_end); - - if (!ret) - ret =3D msm_gem_pin_iova(obj, aspace); + vma =3D get_vma_locked(obj, aspace, range_start, range_end); + if (IS_ERR(vma)) + return PTR_ERR(vma); =20 + ret =3D msm_gem_pin_iova(obj, vma); if (!ret) - *iova =3D local; + *iova =3D vma->iova; =20 return ret; } @@ -500,10 +496,16 @@ int msm_gem_get_and_pin_iova(struct drm_gem_object *o= bj, int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova) { - int ret; + struct msm_gem_vma *vma; + int ret =3D 0; =20 msm_gem_lock(obj); - ret =3D get_iova_locked(obj, aspace, iova, 0, U64_MAX); + vma =3D get_vma_locked(obj, aspace, 0, U64_MAX); + if (IS_ERR(vma)) { + ret =3D PTR_ERR(vma); + } else { + *iova =3D vma->iova; + } msm_gem_unlock(obj); =20 return ret; --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 403B2C433F5 for ; Wed, 30 Mar 2022 20:48:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351206AbiC3Uuh (ORCPT ); Wed, 30 Mar 2022 16:50:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351143AbiC3UuJ (ORCPT ); Wed, 30 Mar 2022 16:50:09 -0400 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29153C13; Wed, 30 Mar 2022 13:48:14 -0700 (PDT) Received: by mail-pj1-x102e.google.com with SMTP id a16-20020a17090a6d9000b001c7d6c1bb13so1325994pjk.4; Wed, 30 Mar 2022 13:48:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=05mUL8FeeCXWVDafJ6OfP4ybn8WOOy9jUdlt3AmYSNs=; b=ehvSFP/VY+Z3t+kg9iDvkymrluumHhnMra5noAhhfp49VXMPL1EHRpmX/CIJCBcc18 SIMQAdU2Mq6/9sNSCe3XOCjvmeAMlN8GfUGILFB54MAKxG2wtqMzfWmaW+93Z1dXAWUh DLC7qQelGS804mBuJ9MHd7kKRPLxFVE4A4z8/Q6G5WxLAVrtREdiT7r4aONOSLBqptI9 rCrOJmiEtILMYAiMWQ+Qzg4pk1wrtTDaLlk501VCtQqfnNCaTbOVjSqagOdH4PYTwA2m TnwiGodAEhv1rLijGHqDHLy+EVqUsVJaFXykuqs3skEb8D5/cHYx/jf1oL+g3jSyuqQQ WjXg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=05mUL8FeeCXWVDafJ6OfP4ybn8WOOy9jUdlt3AmYSNs=; b=FYTTidkYjsrg3GII4MVPtziMQQchoeXxlR+uNqY+ZdUIBdE5UBNAe4LGDu6oL8w2OO kwKrraMhJpL94E5HwYVap+l+YHnBwh+DAaxzd0/VaiAlQZ4UDyByfM/ll+P9jp6IdtOp dV9zwhZjD9WZjP4aOmJHaodzpKGZhxSyX9QAgEHGd/HVuIfFF5KNGMYc4H4JOjjQXk4C cMyH5KSPnzgh3O9Jc/5RQFpd6QCi7ed+BG1js0UHAV/rgJgGboQJBDehu81eENEC+0D5 oxcT9Kvr82cyZRVwsHqe61nOQWVJj2vrw48Yh9Bbqhw/RbJDkViEFe336MnR353ZW6Gs Z2tw== X-Gm-Message-State: AOAM530HXmU4sGbRgCf77o3ZP3avknV/DPjvcmEfUn0XLckWhNu/V+gk VBQ92IxvMhqc/q9jmqHs7hw= X-Google-Smtp-Source: ABdhPJzuNeiLjAtyDjw6M38OpWJ78peOGuLXl5m60CIO5fbDTlzLWX1cIVa8uu5z5AObnjBtoDCT1w== X-Received: by 2002:a17:90a:3e0e:b0:1c7:ca0e:a11 with SMTP id j14-20020a17090a3e0e00b001c7ca0e0a11mr1595741pjc.19.1648673293614; Wed, 30 Mar 2022 13:48:13 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id gd10-20020a17090b0fca00b001c75d6a4b18sm7138706pjb.14.2022.03.30.13.48.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:12 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 08/10] drm/msm/gem: Split vma lookup and pin Date: Wed, 30 Mar 2022 13:47:53 -0700 Message-Id: <20220330204804.660819-9-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark This way we only lookup vma once per object per submit, for both the submit and retire path. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gem.c | 60 +++++++++++++--------------- drivers/gpu/drm/msm/msm_gem.h | 9 +++-- drivers/gpu/drm/msm/msm_gem_submit.c | 17 +++++--- 3 files changed, 44 insertions(+), 42 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index 218744a490a4..e8107a22c33a 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -407,7 +407,7 @@ static struct msm_gem_vma *get_vma_locked(struct drm_ge= m_object *obj, return vma; } =20 -static int msm_gem_pin_iova(struct drm_gem_object *obj, struct msm_gem_vma= *vma) +int msm_gem_pin_vma_locked(struct drm_gem_object *obj, struct msm_gem_vma = *vma) { struct msm_gem_object *msm_obj =3D to_msm_bo(obj); struct page **pages; @@ -439,6 +439,26 @@ static int msm_gem_pin_iova(struct drm_gem_object *obj= , struct msm_gem_vma *vma) return ret; } =20 +void msm_gem_unpin_vma_locked(struct drm_gem_object *obj, struct msm_gem_v= ma *vma) +{ + struct msm_gem_object *msm_obj =3D to_msm_bo(obj); + + GEM_WARN_ON(!msm_gem_is_locked(obj)); + + msm_gem_unmap_vma(vma->aspace, vma); + + msm_obj->pin_count--; + GEM_WARN_ON(msm_obj->pin_count < 0); + + update_inactive(msm_obj); +} + +struct msm_gem_vma *msm_gem_get_vma_locked(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace) +{ + return get_vma_locked(obj, aspace, 0, U64_MAX); +} + static int get_and_pin_iova_range_locked(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end) @@ -452,7 +472,7 @@ static int get_and_pin_iova_range_locked(struct drm_gem= _object *obj, if (IS_ERR(vma)) return PTR_ERR(vma); =20 - ret =3D msm_gem_pin_iova(obj, vma); + ret =3D msm_gem_pin_vma_locked(obj, vma); if (!ret) *iova =3D vma->iova; =20 @@ -476,12 +496,6 @@ int msm_gem_get_and_pin_iova_range(struct drm_gem_obje= ct *obj, return ret; } =20 -int msm_gem_get_and_pin_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace, uint64_t *iova) -{ - return get_and_pin_iova_range_locked(obj, aspace, iova, 0, U64_MAX); -} - /* get iova and pin it. Should have a matching put */ int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova) @@ -511,29 +525,6 @@ int msm_gem_get_iova(struct drm_gem_object *obj, return ret; } =20 -/* - * Locked variant of msm_gem_unpin_iova() - */ -void msm_gem_unpin_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace) -{ - struct msm_gem_object *msm_obj =3D to_msm_bo(obj); - struct msm_gem_vma *vma; - - GEM_WARN_ON(!msm_gem_is_locked(obj)); - - vma =3D lookup_vma(obj, aspace); - - if (!GEM_WARN_ON(!vma)) { - msm_gem_unmap_vma(aspace, vma); - - msm_obj->pin_count--; - GEM_WARN_ON(msm_obj->pin_count < 0); - - update_inactive(msm_obj); - } -} - /* * Unpin a iova by updating the reference counts. The memory isn't actually * purged until something else (shrinker, mm_notifier, destroy, etc) decid= es @@ -542,8 +533,13 @@ void msm_gem_unpin_iova_locked(struct drm_gem_object *= obj, void msm_gem_unpin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace) { + struct msm_gem_vma *vma; + msm_gem_lock(obj); - msm_gem_unpin_iova_locked(obj, aspace); + vma =3D lookup_vma(obj, aspace); + if (!GEM_WARN_ON(!vma)) { + msm_gem_unpin_vma_locked(obj, vma); + } msm_gem_unlock(obj); } =20 diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 772de010a669..f98264cf130d 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -133,17 +133,17 @@ struct msm_gem_object { #define to_msm_bo(x) container_of(x, struct msm_gem_object, base) =20 uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj); +int msm_gem_pin_vma_locked(struct drm_gem_object *obj, struct msm_gem_vma = *vma); +void msm_gem_unpin_vma_locked(struct drm_gem_object *obj, struct msm_gem_v= ma *vma); +struct msm_gem_vma *msm_gem_get_vma_locked(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace); int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end); -int msm_gem_get_and_pin_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace, uint64_t *iova); int msm_gem_get_and_pin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); -void msm_gem_unpin_iova_locked(struct drm_gem_object *obj, - struct msm_gem_address_space *aspace); void msm_gem_unpin_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace); struct page **msm_gem_get_pages(struct drm_gem_object *obj); @@ -369,6 +369,7 @@ struct msm_gem_submit { uint32_t handle; }; uint64_t iova; + struct msm_gem_vma *vma; } bos[]; }; =20 diff --git a/drivers/gpu/drm/msm/msm_gem_submit.c b/drivers/gpu/drm/msm/msm= _gem_submit.c index c6d60c8d286d..91da05af40ee 100644 --- a/drivers/gpu/drm/msm/msm_gem_submit.c +++ b/drivers/gpu/drm/msm/msm_gem_submit.c @@ -232,7 +232,7 @@ static void submit_cleanup_bo(struct msm_gem_submit *su= bmit, int i, unsigned flags =3D submit->bos[i].flags & cleanup_flags; =20 if (flags & BO_PINNED) - msm_gem_unpin_iova_locked(obj, submit->aspace); + msm_gem_unpin_vma_locked(obj, submit->bos[i].vma); =20 if (flags & BO_ACTIVE) msm_gem_active_put(obj); @@ -365,21 +365,26 @@ static int submit_pin_objects(struct msm_gem_submit *= submit) =20 for (i =3D 0; i < submit->nr_bos; i++) { struct drm_gem_object *obj =3D &submit->bos[i].obj->base; - uint64_t iova; + struct msm_gem_vma *vma; =20 /* if locking succeeded, pin bo: */ - ret =3D msm_gem_get_and_pin_iova_locked(obj, - submit->aspace, &iova); + vma =3D msm_gem_get_vma_locked(obj, submit->aspace); + if (IS_ERR(vma)) { + ret =3D PTR_ERR(vma); + break; + } =20 + ret =3D msm_gem_pin_vma_locked(obj, vma); if (ret) break; =20 submit->bos[i].flags |=3D BO_PINNED; + submit->bos[i].vma =3D vma; =20 - if (iova =3D=3D submit->bos[i].iova) { + if (vma->iova =3D=3D submit->bos[i].iova) { submit->bos[i].flags |=3D BO_VALID; } else { - submit->bos[i].iova =3D iova; + submit->bos[i].iova =3D vma->iova; /* iova changed, so address in cmdstream is not valid: */ submit->bos[i].flags &=3D ~BO_VALID; submit->valid =3D false; --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4C08C433FE for ; Wed, 30 Mar 2022 20:49:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351252AbiC3Uup (ORCPT ); Wed, 30 Mar 2022 16:50:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55980 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351190AbiC3UuT (ORCPT ); Wed, 30 Mar 2022 16:50:19 -0400 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CAFBA15FD2; Wed, 30 Mar 2022 13:48:16 -0700 (PDT) Received: by mail-pf1-x432.google.com with SMTP id u22so19934846pfg.6; Wed, 30 Mar 2022 13:48:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B/Mh53kPn0QTu3WUX/8jYKpAAkoPl5CFyIRM1My8ikk=; b=kWtT++covG1yMwHPTJ6ztbVXh9M4ZY8UKKYOujYv39WArd2SGh5AgTRFeCiwIRT1t5 bQnRf368c+LyW5+/zuQIlApoAjMK/wiHHXBK73S6Ra5XBjRbch8wRhI+Bfp1QZi5lfsg O+wfaaT4uTazIt5Ys3+alG0gasVRuxQ5TqUmbI7LV/WUrimb0Y4aTmCPFHHbd9QYBbQ7 IGCiw8UF2N+eu37JJDcUUnepb4LwxIPvM1+X3cVymJ9aRWQLcYz7C8owyiUGZCuiXfTP c6baqineYHWxcPFPaXwA0wY8iZO9Z1tA7B870pu54OW66Om+VlHTgfwP/8NQFU/Jh1+o zjAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B/Mh53kPn0QTu3WUX/8jYKpAAkoPl5CFyIRM1My8ikk=; b=lZnV9A1XzgIWpEiyE1StrwwZUEtU/lT0yKF6qZcoaXHngfAtSOdFrakJBvh1ZqCd9/ AlssrK9EjbMYJ9mqxO2gajvlVQM+wB/YFSAow8rZ0c9I7mkMsqA/dDd5zX5FYuFApE4y 4MP2iKp8jXkzyJ067RSCwo0MLM1tz3NEB5XJ7+Yn1CGxPQVunGUWILS/wH90FUA3yjHD OzHMa3vxIloLLJ0y9jYQi3syi/aKXeT5mUCARn42atEWYiI3wV7TcE2nmTapOn3exxf1 5mtJnrerjBp+bTfei/YRZUnU8ekZsvcCobJqPKunpdPaiUugo/453cZLShz714cX2yjL 9kog== X-Gm-Message-State: AOAM532N4dfgCc2u4CmSCLNUklFyKixIngH/CWtw1EyDT0WHcP+8krjL utbkhdEKSI27dOz6nc5E9AI= X-Google-Smtp-Source: ABdhPJyBLXRWfRJM2DV60SzL9CEogUwwWSLdQ8WE5cTv7VGSEFLANNjJGoLp2xmS8if0CRRNrTy1KQ== X-Received: by 2002:a63:e1a:0:b0:380:fba9:f6e8 with SMTP id d26-20020a630e1a000000b00380fba9f6e8mr7750362pgl.384.1648673296294; Wed, 30 Mar 2022 13:48:16 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id b2-20020a056a000a8200b004e1414f0bb1sm26005115pfl.135.2022.03.30.13.48.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:15 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 09/10] drm/msm/gem: Add fenced vma unpin Date: Wed, 30 Mar 2022 13:47:54 -0700 Message-Id: <20220330204804.660819-10-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark With userspace allocated iova (next patch), we can have a race condition where userspace observes the fence completion and deletes the vma before retire_submit() gets around to unpinning the vma. To handle this, add a fenced unpin which drops the refcount but tracks the fence, and update msm_gem_vma_inuse() to check any previously unsignaled fences. Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_fence.c | 6 ++++-- drivers/gpu/drm/msm/msm_fence.h | 3 +++ drivers/gpu/drm/msm/msm_gem.c | 2 +- drivers/gpu/drm/msm/msm_gem.h | 9 +++++++-- drivers/gpu/drm/msm/msm_gem_vma.c | 28 +++++++++++++++++++++++++--- drivers/gpu/drm/msm/msm_ringbuffer.c | 12 +++++++++++- 6 files changed, 51 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_fence.c b/drivers/gpu/drm/msm/msm_fenc= e.c index f2cece542c3f..3df255402a33 100644 --- a/drivers/gpu/drm/msm/msm_fence.c +++ b/drivers/gpu/drm/msm/msm_fence.c @@ -15,6 +15,7 @@ msm_fence_context_alloc(struct drm_device *dev, volatile = uint32_t *fenceptr, const char *name) { struct msm_fence_context *fctx; + static int index =3D 0; =20 fctx =3D kzalloc(sizeof(*fctx), GFP_KERNEL); if (!fctx) @@ -23,6 +24,7 @@ msm_fence_context_alloc(struct drm_device *dev, volatile = uint32_t *fenceptr, fctx->dev =3D dev; strncpy(fctx->name, name, sizeof(fctx->name)); fctx->context =3D dma_fence_context_alloc(1); + fctx->index =3D index++; fctx->fenceptr =3D fenceptr; spin_lock_init(&fctx->spinlock); =20 @@ -34,7 +36,7 @@ void msm_fence_context_free(struct msm_fence_context *fct= x) kfree(fctx); } =20 -static inline bool fence_completed(struct msm_fence_context *fctx, uint32_= t fence) +bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence) { /* * Note: Check completed_fence first, as fenceptr is in a write-combine @@ -76,7 +78,7 @@ static const char *msm_fence_get_timeline_name(struct dma= _fence *fence) static bool msm_fence_signaled(struct dma_fence *fence) { struct msm_fence *f =3D to_msm_fence(fence); - return fence_completed(f->fctx, f->base.seqno); + return msm_fence_completed(f->fctx, f->base.seqno); } =20 static const struct dma_fence_ops msm_fence_ops =3D { diff --git a/drivers/gpu/drm/msm/msm_fence.h b/drivers/gpu/drm/msm/msm_fenc= e.h index 17ee3822b423..7f1798c54cd1 100644 --- a/drivers/gpu/drm/msm/msm_fence.h +++ b/drivers/gpu/drm/msm/msm_fence.h @@ -21,6 +21,8 @@ struct msm_fence_context { char name[32]; /** context: see dma_fence_context_alloc() */ unsigned context; + /** index: similar to context, but local to msm_fence_context's */ + unsigned index; =20 /** * last_fence: @@ -56,6 +58,7 @@ struct msm_fence_context * msm_fence_context_alloc(struct= drm_device *dev, volatile uint32_t *fenceptr, const char *name); void msm_fence_context_free(struct msm_fence_context *fctx); =20 +bool msm_fence_completed(struct msm_fence_context *fctx, uint32_t fence); void msm_update_fence(struct msm_fence_context *fctx, uint32_t fence); =20 struct dma_fence * msm_fence_alloc(struct msm_fence_context *fctx); diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index e8107a22c33a..bf4af17e2f1e 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -445,7 +445,7 @@ void msm_gem_unpin_vma_locked(struct drm_gem_object *ob= j, struct msm_gem_vma *vm =20 GEM_WARN_ON(!msm_gem_is_locked(obj)); =20 - msm_gem_unmap_vma(vma->aspace, vma); + msm_gem_unpin_vma(vma); =20 msm_obj->pin_count--; GEM_WARN_ON(msm_obj->pin_count < 0); diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index f98264cf130d..38d66e1248b1 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -49,6 +49,8 @@ struct msm_gem_address_space * msm_gem_address_space_create(struct msm_mmu *mmu, const char *name, u64 va_start, u64 size); =20 +struct msm_fence_context; + struct msm_gem_vma { struct drm_mm_node node; uint64_t iova; @@ -56,6 +58,9 @@ struct msm_gem_vma { struct list_head list; /* node in msm_gem_object::vmas */ bool mapped; int inuse; + uint32_t fence_mask; + uint32_t fence[MSM_GPU_MAX_RINGS]; + struct msm_fence_context *fctx[MSM_GPU_MAX_RINGS]; }; =20 int msm_gem_init_vma(struct msm_gem_address_space *aspace, @@ -64,8 +69,8 @@ int msm_gem_init_vma(struct msm_gem_address_space *aspace, bool msm_gem_vma_inuse(struct msm_gem_vma *vma); void msm_gem_purge_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma); -void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma); +void msm_gem_unpin_vma(struct msm_gem_vma *vma); +void msm_gem_unpin_vma_fenced(struct msm_gem_vma *vma, struct msm_fence_co= ntext *fctx); int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int prot, struct sg_table *sgt, int size); diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_ge= m_vma.c index 4949899f1fc7..6f9a402450f9 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -5,6 +5,7 @@ */ =20 #include "msm_drv.h" +#include "msm_fence.h" #include "msm_gem.h" #include "msm_mmu.h" =20 @@ -39,7 +40,19 @@ msm_gem_address_space_get(struct msm_gem_address_space *= aspace) =20 bool msm_gem_vma_inuse(struct msm_gem_vma *vma) { - return !!vma->inuse; + if (vma->inuse > 0) + return true; + + while (vma->fence_mask) { + unsigned idx =3D ffs(vma->fence_mask) - 1; + + if (!msm_fence_completed(vma->fctx[idx], vma->fence[idx])) + return true; + + vma->fence_mask &=3D ~BIT(idx); + } + + return false; } =20 /* Actually unmap memory for the vma */ @@ -63,13 +76,22 @@ void msm_gem_purge_vma(struct msm_gem_address_space *as= pace, } =20 /* Remove reference counts for the mapping */ -void msm_gem_unmap_vma(struct msm_gem_address_space *aspace, - struct msm_gem_vma *vma) +void msm_gem_unpin_vma(struct msm_gem_vma *vma) { if (!GEM_WARN_ON(!vma->iova)) vma->inuse--; } =20 +/* Replace pin reference with fence: */ +void msm_gem_unpin_vma_fenced(struct msm_gem_vma *vma, struct msm_fence_co= ntext *fctx) +{ + vma->fctx[fctx->index] =3D fctx; + vma->fence[fctx->index] =3D fctx->last_fence; + vma->fence_mask |=3D BIT(fctx->index); + msm_gem_unpin_vma(vma); +} + +/* Map and pin vma: */ int msm_gem_map_vma(struct msm_gem_address_space *aspace, struct msm_gem_vma *vma, int prot, diff --git a/drivers/gpu/drm/msm/msm_ringbuffer.c b/drivers/gpu/drm/msm/msm= _ringbuffer.c index 3bbf574c3bdc..01f7e4b771ff 100644 --- a/drivers/gpu/drm/msm/msm_ringbuffer.c +++ b/drivers/gpu/drm/msm/msm_ringbuffer.c @@ -14,9 +14,19 @@ module_param(num_hw_submissions, uint, 0600); static struct dma_fence *msm_job_run(struct drm_sched_job *job) { struct msm_gem_submit *submit =3D to_msm_submit(job); + struct msm_fence_context *fctx =3D submit->ring->fctx; struct msm_gpu *gpu =3D submit->gpu; + int i; =20 - submit->hw_fence =3D msm_fence_alloc(submit->ring->fctx); + submit->hw_fence =3D msm_fence_alloc(fctx); + + for (i =3D 0; i < submit->nr_bos; i++) { + struct drm_gem_object *obj =3D &submit->bos[i].obj->base; + + msm_gem_lock(obj); + msm_gem_unpin_vma_fenced(submit->bos[i].vma, fctx); + msm_gem_unlock(obj); + } =20 pm_runtime_get_sync(&gpu->pdev->dev); =20 --=20 2.35.1 From nobody Fri Jun 19 18:00:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D4B3C433EF for ; Wed, 30 Mar 2022 20:49:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351191AbiC3Uut (ORCPT ); Wed, 30 Mar 2022 16:50:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1351205AbiC3UuY (ORCPT ); Wed, 30 Mar 2022 16:50:24 -0400 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B861A28E0A; Wed, 30 Mar 2022 13:48:20 -0700 (PDT) Received: by mail-pj1-x1030.google.com with SMTP id o3-20020a17090a3d4300b001c6bc749227so1343153pjf.1; Wed, 30 Mar 2022 13:48:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YhqBYA9LoIJ60EteTk4vCygqpc91SV8qqSrLcG+7bKE=; b=L4SR1WCpED6fkMkYuMq3AOPXc7D+DfBVHRbBTe0mTx0nwQjpoUpWp0yIRLexbteB61 CV3lexE8g+SPRee0kIY+szy+eBmElgYVAPlTZa03xsrOwJwWJmc/URyKIgA6L4vso4Sw 6p0r/Jaw17uPV6KjeFurzPR3vzmqbeGLyZenexARFf1ct+Sv717Iug03T/3BIbm6Jwfj RQcoMsS82pOjple+UrCxzBEUuhcduUGEKWegSsCLy8xtTXTl6KqgJkN5/2K6gJv1Ki7h 9syOyxo+/DSsaFis/bcg5Hvf6/ziLbYmcobQaV5WVExW4mvGxljlzeq54VrNxmVDTFd+ lcPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YhqBYA9LoIJ60EteTk4vCygqpc91SV8qqSrLcG+7bKE=; b=eEwNK2QWrpx1fAtMy6jRAeXpvkcxTB1/NjC9dj6rx2vVkU2JSPsVnQ6qFneItwhGmJ AS2ew0y2QpYEwhNi+U0YteieLZTd/f6OOzt0HQw+ni5qBGIqWDpaJNS5R60RbZFpukaU 6Y2f8JPfaI2ixoSOhTm2ANF9kcspUKi1Xkw0I8L8PNDsgopCYCIC+aEP3N68Q5VjogFM 0UZcBe0ChhBszQ4Na8j89i7h0OBkB6c5nWzCUtyqLNHVO78lwL0YatVQJU1XsBKDM/f1 xFPefb/LHjtg1+j18YITzgYzwvAL/dzSil8S0GTor2HzHWQpoCWFtggmCpaj+M8F+upW qYvg== X-Gm-Message-State: AOAM532jRPzYLSd9k73tRARLIav224qkptZxxPA1bwAxb9HhsYIxPC0h CAnStAvOFerGHU4ydd0mWMs= X-Google-Smtp-Source: ABdhPJzliute0Xo12/AQ7Lagh7KmApHVAEXKXm8zAL9n1MqwiTAD6W3ussZ2n3k1etmO+Q5vQGj6MQ== X-Received: by 2002:a17:90b:1583:b0:1c7:3736:629c with SMTP id lc3-20020a17090b158300b001c73736629cmr1512606pjb.215.1648673300173; Wed, 30 Mar 2022 13:48:20 -0700 (PDT) Received: from localhost ([2a00:79e1:abd:4a00:2703:3c72:eb1a:cffd]) by smtp.gmail.com with ESMTPSA id y13-20020a17090a390d00b001c995e0a481sm7264610pjb.30.2022.03.30.13.48.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Mar 2022 13:48:19 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org Cc: freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, Dmitry Baryshkov , Dmitry Osipenko , Rob Clark , Rob Clark , Sean Paul , Abhinav Kumar , David Airlie , Daniel Vetter , Akhil P Oommen , Jonathan Marek , Jordan Crouse , Emma Anholt , Dan Carpenter , linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 10/10] drm/msm: Add a way for userspace to allocate GPU iova Date: Wed, 30 Mar 2022 13:47:55 -0700 Message-Id: <20220330204804.660819-11-robdclark@gmail.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220330204804.660819-1-robdclark@gmail.com> References: <20220330204804.660819-1-robdclark@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Rob Clark The motivation at this point is mainly native userspace mesa driver in a VM guest. The one remaining synchronous "hotpath" is buffer allocation, because guest needs to wait to know the bo's iova before it can start emitting cmdstream/state that references the new bo. By allocating the iova in the guest userspace, we no longer need to wait for a response from the host, but can just rely on the allocation request being processed before the cmdstream submission. Allocation failures (OoM, etc) would just be treated as context-lost (ie. GL_GUILTY_CONTEXT_RESET) or subsequent allocations (or readpix, etc) can raise GL_OUT_OF_MEMORY. Signed-off-by: Rob Clark Reviewed-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/adreno/adreno_gpu.c | 10 ++++++ drivers/gpu/drm/msm/msm_drv.c | 21 +++++++++++ drivers/gpu/drm/msm/msm_gem.c | 48 +++++++++++++++++++++++++ drivers/gpu/drm/msm/msm_gem.h | 8 +++++ drivers/gpu/drm/msm/msm_gem_vma.c | 2 ++ include/uapi/drm/msm_drm.h | 3 ++ 6 files changed, 92 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/= adreno/adreno_gpu.c index 6385ab06632f..4caae0229518 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c @@ -281,6 +281,16 @@ int adreno_get_param(struct msm_gpu *gpu, struct msm_f= ile_private *ctx, case MSM_PARAM_SUSPENDS: *value =3D gpu->suspend_count; return 0; + case MSM_PARAM_VA_START: + if (ctx->aspace =3D=3D gpu->aspace) + return -EINVAL; + *value =3D ctx->aspace->va_start; + return 0; + case MSM_PARAM_VA_SIZE: + if (ctx->aspace =3D=3D gpu->aspace) + return -EINVAL; + *value =3D ctx->aspace->va_size; + return 0; default: DBG("%s: invalid param: %u", gpu->name, param); return -EINVAL; diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index a5eed5738ac8..45523b4123eb 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -719,6 +719,23 @@ static int msm_ioctl_gem_info_iova(struct drm_device *= dev, return msm_gem_get_iova(obj, ctx->aspace, iova); } =20 +static int msm_ioctl_gem_info_set_iova(struct drm_device *dev, + struct drm_file *file, struct drm_gem_object *obj, + uint64_t iova) +{ + struct msm_drm_private *priv =3D dev->dev_private; + struct msm_file_private *ctx =3D file->driver_priv; + + if (!priv->gpu) + return -EINVAL; + + /* Only supported if per-process address space is supported: */ + if (priv->gpu->aspace =3D=3D ctx->aspace) + return -EOPNOTSUPP; + + return msm_gem_set_iova(obj, ctx->aspace, iova); +} + static int msm_ioctl_gem_info(struct drm_device *dev, void *data, struct drm_file *file) { @@ -733,6 +750,7 @@ static int msm_ioctl_gem_info(struct drm_device *dev, v= oid *data, switch (args->info) { case MSM_INFO_GET_OFFSET: case MSM_INFO_GET_IOVA: + case MSM_INFO_SET_IOVA: /* value returned as immediate, not pointer, so len=3D=3D0: */ if (args->len) return -EINVAL; @@ -757,6 +775,9 @@ static int msm_ioctl_gem_info(struct drm_device *dev, v= oid *data, case MSM_INFO_GET_IOVA: ret =3D msm_ioctl_gem_info_iova(dev, file, obj, &args->value); break; + case MSM_INFO_SET_IOVA: + ret =3D msm_ioctl_gem_info_set_iova(dev, file, obj, args->value); + break; case MSM_INFO_SET_NAME: /* length check should leave room for terminating null: */ if (args->len >=3D sizeof(msm_obj->name)) { diff --git a/drivers/gpu/drm/msm/msm_gem.c b/drivers/gpu/drm/msm/msm_gem.c index bf4af17e2f1e..83ded2b7154e 100644 --- a/drivers/gpu/drm/msm/msm_gem.c +++ b/drivers/gpu/drm/msm/msm_gem.c @@ -525,6 +525,54 @@ int msm_gem_get_iova(struct drm_gem_object *obj, return ret; } =20 +static int clear_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace) +{ + struct msm_gem_vma *vma =3D lookup_vma(obj, aspace); + + if (!vma) + return 0; + + if (msm_gem_vma_inuse(vma)) + return -EBUSY; + + msm_gem_purge_vma(vma->aspace, vma); + msm_gem_close_vma(vma->aspace, vma); + del_vma(vma); + + return 0; +} + +/* + * Get the requested iova but don't pin it. Fails if the requested iova is + * not available. Doesn't need a put because iovas are currently valid for + * the life of the object. + * + * Setting an iova of zero will clear the vma. + */ +int msm_gem_set_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, uint64_t iova) +{ + int ret =3D 0; + + msm_gem_lock(obj); + if (!iova) { + ret =3D clear_iova(obj, aspace); + } else { + struct msm_gem_vma *vma; + vma =3D get_vma_locked(obj, aspace, iova, iova + obj->size); + if (IS_ERR(vma)) { + ret =3D PTR_ERR(vma); + } else if (GEM_WARN_ON(vma->iova !=3D iova)) { + clear_iova(obj, aspace); + ret =3D -ENOSPC; + } + } + msm_gem_unlock(obj); + + return ret; +} + /* * Unpin a iova by updating the reference counts. The memory isn't actually * purged until something else (shrinker, mm_notifier, destroy, etc) decid= es diff --git a/drivers/gpu/drm/msm/msm_gem.h b/drivers/gpu/drm/msm/msm_gem.h index 38d66e1248b1..efa2e5c19f1e 100644 --- a/drivers/gpu/drm/msm/msm_gem.h +++ b/drivers/gpu/drm/msm/msm_gem.h @@ -38,6 +38,12 @@ struct msm_gem_address_space { =20 /* @faults: the number of GPU hangs associated with this address space */ int faults; + + /** @va_start: lowest possible address to allocate */ + uint64_t va_start; + + /** @va_size: the size of the address space (in bytes) */ + uint64_t va_size; }; =20 struct msm_gem_address_space * @@ -144,6 +150,8 @@ struct msm_gem_vma *msm_gem_get_vma_locked(struct drm_g= em_object *obj, struct msm_gem_address_space *aspace); int msm_gem_get_iova(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova); +int msm_gem_set_iova(struct drm_gem_object *obj, + struct msm_gem_address_space *aspace, uint64_t iova); int msm_gem_get_and_pin_iova_range(struct drm_gem_object *obj, struct msm_gem_address_space *aspace, uint64_t *iova, u64 range_start, u64 range_end); diff --git a/drivers/gpu/drm/msm/msm_gem_vma.c b/drivers/gpu/drm/msm/msm_ge= m_vma.c index 6f9a402450f9..354f91aff573 100644 --- a/drivers/gpu/drm/msm/msm_gem_vma.c +++ b/drivers/gpu/drm/msm/msm_gem_vma.c @@ -182,6 +182,8 @@ msm_gem_address_space_create(struct msm_mmu *mmu, const= char *name, spin_lock_init(&aspace->lock); aspace->name =3D name; aspace->mmu =3D mmu; + aspace->va_start =3D va_start; + aspace->va_size =3D size; =20 drm_mm_init(&aspace->mm, va_start, size); =20 diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h index 794ad1948497..3c7b097c4e3d 100644 --- a/include/uapi/drm/msm_drm.h +++ b/include/uapi/drm/msm_drm.h @@ -84,6 +84,8 @@ struct drm_msm_timespec { #define MSM_PARAM_SYSPROF 0x0b /* WO: 1 preserves perfcntrs, 2 also di= sables suspend */ #define MSM_PARAM_COMM 0x0c /* WO: override for task->comm */ #define MSM_PARAM_CMDLINE 0x0d /* WO: override for task cmdline */ +#define MSM_PARAM_VA_START 0x0e /* RO: start of valid GPU iova range */ +#define MSM_PARAM_VA_SIZE 0x0f /* RO: size of valid GPU iova range (by= tes) */ =20 /* For backwards compat. The original support for preemption was based on * a single ring per priority level so # of priority levels equals the # @@ -135,6 +137,7 @@ struct drm_msm_gem_new { #define MSM_INFO_GET_IOVA 0x01 /* get iova, returned by value */ #define MSM_INFO_SET_NAME 0x02 /* set the debug name (by pointer) */ #define MSM_INFO_GET_NAME 0x03 /* get debug name, returned by pointer */ +#define MSM_INFO_SET_IOVA 0x04 /* set the iova, passed by value */ =20 struct drm_msm_gem_info { __u32 handle; /* in */ --=20 2.35.1