From nobody Sun Jun 21 10:10:36 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A489C433F5 for ; Tue, 29 Mar 2022 18:38:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240620AbiC2Skc (ORCPT ); Tue, 29 Mar 2022 14:40:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240150AbiC2Sk3 (ORCPT ); Tue, 29 Mar 2022 14:40:29 -0400 Received: from hutie.ust.cz (unknown [IPv6:2a03:3b40:fe:f0::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C2B3E6401 for ; Tue, 29 Mar 2022 11:38:43 -0700 (PDT) From: =?UTF-8?q?Martin=20Povi=C5=A1er?= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cutebit.org; s=mail; t=1648579115; bh=MNw6TZjQg12ilqVca1Iyk/1Sr/JwKEtEFZo4CqiuRdA=; h=From:To:Cc:Subject:Date; b=MK0FFNR/dSMhYqsYkSiQpNIza2jECdZ01Sz1FG5KrRdcROhl1cEAdsLSEG4wXdfeM eEMzqSrFbkDtDZ9SN0WP0Wmg5wGWgEy3BVWpFBv37e0G916tpdI4G+MZ3CvqY2yZzb ovpC3Ak2hp3f1boVZ3YgYRmmBggUEat5PHwD2+Dw= To: Hector Martin , Sven Peter , Michael Ellerman Cc: Alyssa Rosenzweig , Benjamin Herrenschmidt , Paul Mackerras , Jean Delvare , Olof Johansson , linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Janne Grunau , =?UTF-8?q?Martin=20Povi=C5=A1er?= Subject: [PATCH] i2c: pasemi: Wait for write xfers to finish Date: Tue, 29 Mar 2022 20:38:17 +0200 Message-Id: <20220329183817.21656-1-povik+lin@cutebit.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Wait for completion of write transfers before returning from the driver. At first sight it may seem advantageous to leave write transfers queued for the controller to carry out on its own time, but there's a couple of issues with it: * Driver doesn't check for FIFO space. * The queued writes can complete while the driver is in its I2C read transfer path which means it will get confused by the raising of XEN (the 'transaction ended' signal). This can cause a spurious ENODATA error due to premature reading of the MRXFIFO register. Adding the wait fixes some unreliability issues with the driver. There's some efficiency cost to it (especially with pasemi_smb_waitready doing its polling), but that will be alleviated once the driver receives interrupt support. Fixes: beb58aa39e6e ("i2c: PA Semi SMBus driver") Signed-off-by: Martin Povi=C5=A1er Reviewed-by: Sven Peter --- Tested on Apple's t8103 chip. To my knowledge the PA Semi controller in its pre-Apple occurences behaves the same as far as this patch is concerned. drivers/i2c/busses/i2c-pasemi-core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/i2c/busses/i2c-pasemi-core.c b/drivers/i2c/busses/i2c-= pasemi-core.c index 7728c8460dc0..9028ffb58cc0 100644 --- a/drivers/i2c/busses/i2c-pasemi-core.c +++ b/drivers/i2c/busses/i2c-pasemi-core.c @@ -137,6 +137,12 @@ static int pasemi_i2c_xfer_msg(struct i2c_adapter *ada= pter, =20 TXFIFO_WR(smbus, msg->buf[msg->len-1] | (stop ? MTXFIFO_STOP : 0)); + + if (stop) { + err =3D pasemi_smb_waitready(smbus); + if (err) + goto reset_out; + } } =20 return 0; --=20 2.33.0