From nobody Sun Sep 22 08:42:59 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C38FC43217 for ; Tue, 29 Mar 2022 11:46:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236111AbiC2LsR (ORCPT ); Tue, 29 Mar 2022 07:48:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60034 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236071AbiC2LsI (ORCPT ); Tue, 29 Mar 2022 07:48:08 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 191E8249C57; Tue, 29 Mar 2022 04:46:21 -0700 (PDT) X-UUID: 5f15c8a45c6e4c198ee1177005194eec-20220329 X-UUID: 5f15c8a45c6e4c198ee1177005194eec-20220329 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1163599205; Tue, 29 Mar 2022 19:46:12 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Tue, 29 Mar 2022 19:46:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 29 Mar 2022 19:46:11 +0800 From: Tinghan Shen To: Chaotian Jing , Ulf Hansson , Rob Herring , "Krzysztof Kozlowski" , Matthias Brugger , AngeloGioacchino Del Regno , Wenbin Mei CC: , , , , , , , , , Tinghan Shen Subject: [PATCH v12 1/3] dt-bindings: mmc: mtk-sd: fix yamllint error Date: Tue, 29 Mar 2022 19:45:38 +0800 Message-ID: <20220329114540.17140-2-tinghan.shen@mediatek.com> X-Mailer: git-send-email 2.15.GIT In-Reply-To: <20220329114540.17140-1-tinghan.shen@mediatek.com> References: <20220329114540.17140-1-tinghan.shen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Documentation/devicetree/bindings/mmc/mtk-sd.yaml 54:81 error line too long (95 > 80 characters) (line-length) Signed-off-by: Tinghan Shen --- Documentation/devicetree/bindings/mmc/mtk-sd.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml b/Documentat= ion/devicetree/bindings/mmc/mtk-sd.yaml index 297ada03e3de..7032f7adf3ca 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.yaml @@ -50,7 +50,8 @@ properties: - description: source clock (required). - description: HCLK which used for host (required). - description: independent source clock gate (required for MT2712). - - description: bus clock used for internal register access (required= for MT2712 MSDC0/3). + - description: bus clock used for internal register access + (required for MT2712 MSDC0/3). - description: msdc subsys clock gate (required for MT8192). - description: peripheral bus clock gate (required for MT8192). - description: AXI bus clock gate (required for MT8192). --=20 2.18.0