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[62.219.32.62]) by smtp.googlemail.com with ESMTPSA id 3-20020a5d47a3000000b0020412ba45f6sm16919344wrb.8.2022.03.29.03.43.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Mar 2022 03:43:26 -0700 (PDT) From: Shlomo Pongratz X-Google-Original-From: Shlomo Pongratz To: linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, andrew.maier@eideticom.com, logang@deltatee.com, bhelgaas@google.com, jgg@nvidia.com, Shlomo Pongratz Subject: [PATCH V3 1/1] Intel Sky Lake-E host root ports check. Date: Tue, 29 Mar 2022 13:43:21 +0300 Message-Id: <20220329104321.4712-2-shlomop@pliops.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220329104321.4712-1-shlomop@pliops.com> References: <20220329104321.4712-1-shlomop@pliops.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" On commit 7b94b53db34f ("PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, = D to the whitelist") Andrew Maier added the Sky Lake-E additional devices 2031, 2032 and 2033 root ports to the already existing 2030 device. The Intel devices 2030, 2031, 2032 and 2033 which are ports A, B, C and D, and if all exist they will occupy slots 0 till 3 in that order. Now if for example device 2030 is missing then there will no device on slot= 0, but other devices can reside on other slots according to there port. For this reason the test that insisted that the bridge should be on slot 0 = was modified to support bridges that are not on slot 0. Signed-off-by: Shlomo Pongratz --- drivers/pci/p2pdma.c | 42 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 37 insertions(+), 5 deletions(-) diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c index 30b1df3c9d2f..c088d4ab64f4 100644 --- a/drivers/pci/p2pdma.c +++ b/drivers/pci/p2pdma.c @@ -307,6 +307,7 @@ static const struct pci_p2pdma_whitelist_entry { unsigned short device; enum { REQ_SAME_HOST_BRIDGE =3D 1 << 0, + IS_ROOT_PORT =3D 1 << 1, } flags; } pci_p2pdma_whitelist[] =3D { /* Intel Xeon E5/Core i7 */ @@ -316,15 +317,38 @@ static const struct pci_p2pdma_whitelist_entry { {PCI_VENDOR_ID_INTEL, 0x2f00, REQ_SAME_HOST_BRIDGE}, {PCI_VENDOR_ID_INTEL, 0x2f01, REQ_SAME_HOST_BRIDGE}, /* Intel SkyLake-E */ - {PCI_VENDOR_ID_INTEL, 0x2030, 0}, - {PCI_VENDOR_ID_INTEL, 0x2031, 0}, - {PCI_VENDOR_ID_INTEL, 0x2032, 0}, - {PCI_VENDOR_ID_INTEL, 0x2033, 0}, + {PCI_VENDOR_ID_INTEL, 0x2030, IS_ROOT_PORT}, + {PCI_VENDOR_ID_INTEL, 0x2031, IS_ROOT_PORT}, + {PCI_VENDOR_ID_INTEL, 0x2032, IS_ROOT_PORT}, + {PCI_VENDOR_ID_INTEL, 0x2033, IS_ROOT_PORT}, {PCI_VENDOR_ID_INTEL, 0x2020, 0}, {PCI_VENDOR_ID_INTEL, 0x09a2, 0}, {} }; =20 +/* + * The functionality of thisunction can be integrated into + * __host_bridge_whitelist function but this will make the code + * less readable + */ +static bool pci_is_root_port(struct pci_dev *root) +{ + const struct pci_p2pdma_whitelist_entry *entry; + unsigned short vendor, device; + + vendor =3D root->vendor; + device =3D root->device; + + for (entry =3D pci_p2pdma_whitelist; entry->vendor; entry++) { + if (vendor !=3D entry->vendor || device !=3D entry->device) + continue; + + if (entry->flags & IS_ROOT_PORT) + return true; + } + return false; +} + /* * This lookup function tries to find the PCI device corresponding to a gi= ven * host bridge. @@ -333,6 +357,11 @@ static const struct pci_p2pdma_whitelist_entry { * bus->devices list and that the devfn is 00.0. These assumptions should = hold * for all the devices in the whitelist above. * + * The method above will work in most cases but not for all. + * Note that the Intel devices 2030, 2031, 2032 and 2033 are ports A, B, C= and D. + * Consider on a bus X only port C has devices connected to it so in the P= CI scan only + * device 8086:2032 on 0000:X:02.0 will be found as bridges with no childr= en are ignored + * * This function is equivalent to pci_get_slot(host->bus, 0), however it d= oes * not take the pci_bus_sem lock seeing __host_bridge_whitelist() must not * sleep. @@ -350,7 +379,9 @@ static struct pci_dev *pci_host_bridge_dev(struct pci_h= ost_bridge *host) =20 if (!root) return NULL; - if (root->devfn !=3D PCI_DEVFN(0, 0)) + + /* Intel Sky Lake-E host root ports can be on no zero slot */ + if (root->devfn !=3D PCI_DEVFN(0, 0) && !pci_is_root_port(root)) return NULL; =20 return root; @@ -372,6 +403,7 @@ static bool __host_bridge_whitelist(struct pci_host_bri= dge *host, for (entry =3D pci_p2pdma_whitelist; entry->vendor; entry++) { if (vendor !=3D entry->vendor || device !=3D entry->device) continue; + if (entry->flags & REQ_SAME_HOST_BRIDGE && !same_host_bridge) return false; =20 --=20 2.17.1