From nobody Fri Jun 19 22:37:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 89594C433F5 for ; Mon, 28 Mar 2022 01:01:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237232AbiC1BCr (ORCPT ); Sun, 27 Mar 2022 21:02:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237195AbiC1BCb (ORCPT ); Sun, 27 Mar 2022 21:02:31 -0400 X-Greylist: delayed 621 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Sun, 27 Mar 2022 18:00:50 PDT Received: from proxmox1.postmarketos.org (proxmox1.postmarketos.org [IPv6:2a01:4f8:a0:821d::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id A81AD4ECDB; Sun, 27 Mar 2022 18:00:50 -0700 (PDT) Received: from localhost.localdomain (cpc78119-cwma10-2-0-cust590.7-3.cable.virginm.net [81.96.50.79]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by proxmox1.postmarketos.org (Postfix) with ESMTPSA id 0028F140191; Mon, 28 Mar 2022 00:50:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=postmarketos.org; s=donut; t=1648428628; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=Bu81eOdyE1PgdWCUxw1KdAZTJHOAI2JnAqP9I0MQSuA=; b=j21xTSslEESvLFxMs+EYDFVsJUlLWimEebt7444X37O+50OyAf8T8kI8m1zHxbZ4ijTdKA XlyhWJKvTeccvsoV10KyCGAiAWty0go0ucRBU+iA9MbScdKAjE854yCEQiyeXwvzzOO1VC 2EQzHPHIsVPoEIUnKypWb7uB3cT8z70= From: Caleb Connolly To: Caleb Connolly , Rob Herring , Heiko Stuebner , Linus Walleij , Bartosz Golaszewski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martijn@brixit.nl, Arnaud Ferraris Subject: [PATCH 1/4] pinctrl/rockchip: support deferring other gpio params Date: Mon, 28 Mar 2022 01:50:02 +0100 Message-Id: <20220328005005.72492-2-kc@postmarketos.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220328005005.72492-1-kc@postmarketos.org> References: <20220328005005.72492-1-kc@postmarketos.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for deferring other params like PIN_CONFIG_INPUT_ENABLE. This will be used to add support for PIN_CONFIG_INPUT_ENABLE to the driver. Fixes: e7165b1d ("pinctrl/rockchip: add a queue for deferred pin output set= tings on probe") Fixes: 59dd178e ("gpio/rockchip: fetch deferred output settings on probe") Signed-off-by: Caleb Connolly --- drivers/gpio/gpio-rockchip.c | 24 ++++++++----- drivers/pinctrl/pinctrl-rockchip.c | 54 ++++++++++++++++-------------- drivers/pinctrl/pinctrl-rockchip.h | 7 ++-- 3 files changed, 50 insertions(+), 35 deletions(-) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index 099e358d2491..bcf5214e3586 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -19,6 +19,7 @@ #include #include #include +#include #include =20 #include "../pinctrl/core.h" @@ -706,7 +707,7 @@ static int rockchip_gpio_probe(struct platform_device *= pdev) struct device_node *pctlnp =3D of_get_parent(np); struct pinctrl_dev *pctldev =3D NULL; struct rockchip_pin_bank *bank =3D NULL; - struct rockchip_pin_output_deferred *cfg; + struct rockchip_pin_deferred *cfg; static int gpio; int id, ret; =20 @@ -747,15 +748,22 @@ static int rockchip_gpio_probe(struct platform_device= *pdev) return ret; } =20 - while (!list_empty(&bank->deferred_output)) { - cfg =3D list_first_entry(&bank->deferred_output, - struct rockchip_pin_output_deferred, head); + while (!list_empty(&bank->deferred_pins)) { + cfg =3D list_first_entry(&bank->deferred_pins, + struct rockchip_pin_deferred, head); list_del(&cfg->head); =20 - ret =3D rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg->= arg); - if (ret) - dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->ar= g); - + switch (cfg->param) { + case PIN_CONFIG_OUTPUT: + ret =3D rockchip_gpio_direction_output(&bank->gpio_chip, cfg->pin, cfg-= >arg); + if (ret) + dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, + cfg->arg); + break; + default: + dev_warn(dev, "unknown deferred config param %d\n", cfg->param); + break; + } kfree(cfg); } =20 diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-r= ockchip.c index d8dd8415fa81..d54fc1cdf609 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2095,19 +2095,20 @@ static bool rockchip_pinconf_pull_valid(struct rock= chip_pin_ctrl *ctrl, return false; } =20 -static int rockchip_pinconf_defer_output(struct rockchip_pin_bank *bank, - unsigned int pin, u32 arg) +static int rockchip_pinconf_defer_pin(struct rockchip_pin_bank *bank, + unsigned int pin, u32 param, u32 arg) { - struct rockchip_pin_output_deferred *cfg; + struct rockchip_pin_deferred *cfg; =20 cfg =3D kzalloc(sizeof(*cfg), GFP_KERNEL); if (!cfg) return -ENOMEM; =20 cfg->pin =3D pin; + cfg->param =3D param; cfg->arg =3D arg; =20 - list_add_tail(&cfg->head, &bank->deferred_output); + list_add_tail(&cfg->head, &bank->deferred_pins); =20 return 0; } @@ -2128,6 +2129,25 @@ static int rockchip_pinconf_set(struct pinctrl_dev *= pctldev, unsigned int pin, param =3D pinconf_to_config_param(configs[i]); arg =3D pinconf_to_config_argument(configs[i]); =20 + if (param =3D=3D (PIN_CONFIG_OUTPUT | PIN_CONFIG_INPUT_ENABLE)) { + /* + * Check for gpio driver not being probed yet. + * The lock makes sure that either gpio-probe has completed + * or the gpio driver hasn't probed yet. + */ + mutex_lock(&bank->deferred_lock); + if (!gpio || !gpio->direction_output) { + rc =3D rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param, + arg); + mutex_unlock(&bank->deferred_lock); + if (rc) + return rc; + + break; + } + mutex_unlock(&bank->deferred_lock); + } + switch (param) { case PIN_CONFIG_BIAS_DISABLE: rc =3D rockchip_set_pull(bank, pin - bank->pin_base, @@ -2156,22 +2176,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev *= pctldev, unsigned int pin, if (rc !=3D RK_FUNC_GPIO) return -EINVAL; =20 - /* - * Check for gpio driver not being probed yet. - * The lock makes sure that either gpio-probe has completed - * or the gpio driver hasn't probed yet. - */ - mutex_lock(&bank->deferred_lock); - if (!gpio || !gpio->direction_output) { - rc =3D rockchip_pinconf_defer_output(bank, pin - bank->pin_base, arg); - mutex_unlock(&bank->deferred_lock); - if (rc) - return rc; - - break; - } - mutex_unlock(&bank->deferred_lock); - rc =3D gpio->direction_output(gpio, pin - bank->pin_base, arg); if (rc) @@ -2485,7 +2489,7 @@ static int rockchip_pinctrl_register(struct platform_= device *pdev, pdesc++; } =20 - INIT_LIST_HEAD(&pin_bank->deferred_output); + INIT_LIST_HEAD(&pin_bank->deferred_pins); mutex_init(&pin_bank->deferred_lock); } =20 @@ -2746,7 +2750,7 @@ static int rockchip_pinctrl_remove(struct platform_de= vice *pdev) { struct rockchip_pinctrl *info =3D platform_get_drvdata(pdev); struct rockchip_pin_bank *bank; - struct rockchip_pin_output_deferred *cfg; + struct rockchip_pin_deferred *cfg; int i; =20 of_platform_depopulate(&pdev->dev); @@ -2755,9 +2759,9 @@ static int rockchip_pinctrl_remove(struct platform_de= vice *pdev) bank =3D &info->ctrl->pin_banks[i]; =20 mutex_lock(&bank->deferred_lock); - while (!list_empty(&bank->deferred_output)) { - cfg =3D list_first_entry(&bank->deferred_output, - struct rockchip_pin_output_deferred, head); + while (!list_empty(&bank->deferred_pins)) { + cfg =3D list_first_entry(&bank->deferred_pins, + struct rockchip_pin_deferred, head); list_del(&cfg->head); kfree(cfg); } diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-r= ockchip.h index 91f10279d084..98a01a616da6 100644 --- a/drivers/pinctrl/pinctrl-rockchip.h +++ b/drivers/pinctrl/pinctrl-rockchip.h @@ -171,7 +171,7 @@ struct rockchip_pin_bank { u32 toggle_edge_mode; u32 recalced_mask; u32 route_mask; - struct list_head deferred_output; + struct list_head deferred_pins; struct mutex deferred_lock; }; =20 @@ -247,9 +247,12 @@ struct rockchip_pin_config { unsigned int nconfigs; }; =20 -struct rockchip_pin_output_deferred { +enum pin_config_param; + +struct rockchip_pin_deferred { struct list_head head; unsigned int pin; + enum pin_config_param param; u32 arg; }; =20 --=20 2.35.1 From nobody Fri Jun 19 22:37:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E212C433F5 for ; Mon, 28 Mar 2022 01:01:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237234AbiC1BCn (ORCPT ); Sun, 27 Mar 2022 21:02:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51050 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237196AbiC1BCb (ORCPT ); Sun, 27 Mar 2022 21:02:31 -0400 Received: from proxmox1.postmarketos.org (proxmox1.postmarketos.org [IPv6:2a01:4f8:a0:821d::2]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AC5CE4ECE0; Sun, 27 Mar 2022 18:00:50 -0700 (PDT) Received: from localhost.localdomain (cpc78119-cwma10-2-0-cust590.7-3.cable.virginm.net [81.96.50.79]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by proxmox1.postmarketos.org (Postfix) with ESMTPSA id E46AA140193; Mon, 28 Mar 2022 00:50:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=postmarketos.org; s=donut; t=1648428629; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=CuEcPDB+AlpLfXTqAeWfzXqofQSTcIxpMeVQrjaG4Nk=; b=CeL2JT/7rrhCyZeiu6hxNT/c/FpFJCMWOh7V/0uP6zoUQRmcQ2p4+tjczMM49dpdvaRnjW 2jrWHgYS/bhHVE09b/DHO6AYRO2+C0WYxvhFvAJBsqGhENrvThvD6TouD+oGLqadGDvG4A RjursQ4ABdzsZ/liMBNriWXQwHG6Aws= From: Caleb Connolly To: Caleb Connolly , Rob Herring , Heiko Stuebner , Linus Walleij , Bartosz Golaszewski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martijn@brixit.nl, Arnaud Ferraris Subject: [PATCH 2/4] pinctrl/rockchip: support setting input-enable param Date: Mon, 28 Mar 2022 01:50:03 +0100 Message-Id: <20220328005005.72492-3-kc@postmarketos.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220328005005.72492-1-kc@postmarketos.org> References: <20220328005005.72492-1-kc@postmarketos.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Handle the PIN_CONFIG_INPUT_ENABLE param for configuring GPIOs as input. Signed-off-by: Caleb Connolly --- drivers/pinctrl/pinctrl-rockchip.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-r= ockchip.c index d54fc1cdf609..9d50d9756bb9 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2129,7 +2129,7 @@ static int rockchip_pinconf_set(struct pinctrl_dev *p= ctldev, unsigned int pin, param =3D pinconf_to_config_param(configs[i]); arg =3D pinconf_to_config_argument(configs[i]); =20 - if (param =3D=3D (PIN_CONFIG_OUTPUT | PIN_CONFIG_INPUT_ENABLE)) { + if (param =3D=3D PIN_CONFIG_OUTPUT || param =3D=3D PIN_CONFIG_INPUT_ENAB= LE) { /* * Check for gpio driver not being probed yet. * The lock makes sure that either gpio-probe has completed @@ -2181,6 +2181,16 @@ static int rockchip_pinconf_set(struct pinctrl_dev *= pctldev, unsigned int pin, if (rc) return rc; break; + case PIN_CONFIG_INPUT_ENABLE: + rc =3D rockchip_set_mux(bank, pin - bank->pin_base, + RK_FUNC_GPIO); + if (rc !=3D RK_FUNC_GPIO) + return -EINVAL; + + rc =3D gpio->direction_input(gpio, pin - bank->pin_base); + if (rc) + return rc; + break; case PIN_CONFIG_DRIVE_STRENGTH: /* rk3288 is the first with per-pin drive-strength */ if (!info->ctrl->drv_calc_reg) --=20 2.35.1 From nobody Fri Jun 19 22:37:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F4FBC4167D for ; Mon, 28 Mar 2022 01:00:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235753AbiC1BCe (ORCPT ); Sun, 27 Mar 2022 21:02:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51048 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235028AbiC1BCb (ORCPT ); Sun, 27 Mar 2022 21:02:31 -0400 Received: from proxmox1.postmarketos.org (proxmox1.postmarketos.org [213.239.216.189]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AC3084ECDD; Sun, 27 Mar 2022 18:00:50 -0700 (PDT) Received: from localhost.localdomain (cpc78119-cwma10-2-0-cust590.7-3.cable.virginm.net [81.96.50.79]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by proxmox1.postmarketos.org (Postfix) with ESMTPSA id CCA3E140195; Mon, 28 Mar 2022 00:50:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=postmarketos.org; s=donut; t=1648428630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=FJPO+cvB8mQMll3NzzvYxlnd9zKt1uj4D1+8hbf+ebs=; b=QCUmOohgp7Hn9lmS+r5wAkX438yPTC/mINkGBozlm1i//Cp1NiRAtUM3e23zyrgp2VJvQN DE+ArD6XUE8FhBU+jPxyGQt2L0qsKA0/nPOTZtLCbc3Fi3aokGFvGdP/S1FV8J1smBuvit jFZPfxAXuWy8dGFa+TQ9V7nD04Dswew= From: Caleb Connolly To: Caleb Connolly , Rob Herring , Heiko Stuebner , Linus Walleij , Bartosz Golaszewski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martijn@brixit.nl, Arnaud Ferraris Subject: [PATCH 3/4] gpio/rockchip: handle deferring input-enable pinconfs Date: Mon, 28 Mar 2022 01:50:04 +0100 Message-Id: <20220328005005.72492-4-kc@postmarketos.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220328005005.72492-1-kc@postmarketos.org> References: <20220328005005.72492-1-kc@postmarketos.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for deferred PIN_CONFIG_INPUT_ENABLE handling. Signed-off-by: Caleb Connolly Acked-by: Bartosz Golaszewski --- drivers/gpio/gpio-rockchip.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c index bcf5214e3586..e342a6dc4c6c 100644 --- a/drivers/gpio/gpio-rockchip.c +++ b/drivers/gpio/gpio-rockchip.c @@ -760,6 +760,11 @@ static int rockchip_gpio_probe(struct platform_device = *pdev) dev_warn(dev, "setting output pin %u to %u failed\n", cfg->pin, cfg->arg); break; + case PIN_CONFIG_INPUT_ENABLE: + ret =3D rockchip_gpio_direction_input(&bank->gpio_chip, cfg->pin); + if (ret) + dev_warn(dev, "setting input pin %u failed\n", cfg->pin); + break; default: dev_warn(dev, "unknown deferred config param %d\n", cfg->param); break; --=20 2.35.1 From nobody Fri Jun 19 22:37:43 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 374ECC433FE for ; Mon, 28 Mar 2022 01:00:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237239AbiC1BCg (ORCPT ); Sun, 27 Mar 2022 21:02:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237190AbiC1BCb (ORCPT ); Sun, 27 Mar 2022 21:02:31 -0400 Received: from proxmox1.postmarketos.org (proxmox1.postmarketos.org [213.239.216.189]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id AC2424ECDC; Sun, 27 Mar 2022 18:00:50 -0700 (PDT) Received: from localhost.localdomain (cpc78119-cwma10-2-0-cust590.7-3.cable.virginm.net [81.96.50.79]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by proxmox1.postmarketos.org (Postfix) with ESMTPSA id 627B4140197; Mon, 28 Mar 2022 00:50:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=postmarketos.org; s=donut; t=1648428630; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EGfRjZnta91pDqb00FS0IyJHpRVsoSTogbe12bpoSb4=; b=X2zG46B5pNwGoT2nQfsdZaf9YtNrhXf8GJcEiWdevtF2Cm6PHVN0aslA0XeQHeQsnXffpP 4zkZbszn7nISfJH8uRfhYZzXd0xZvY/eliL/ukQjDWcLR7igIDsWkSD0QOynje6lLG/y0n yp2Q+GNFhUsOWbUasS1mqbuZYZfeYUM= From: Caleb Connolly To: Caleb Connolly , Rob Herring , Heiko Stuebner , Linus Walleij , Bartosz Golaszewski , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, martijn@brixit.nl, Arnaud Ferraris Subject: [PATCH 4/4] arm64: dts: rockchip: rk3399: add an input enable pinconf Date: Mon, 28 Mar 2022 01:50:05 +0100 Message-Id: <20220328005005.72492-5-kc@postmarketos.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220328005005.72492-1-kc@postmarketos.org> References: <20220328005005.72492-1-kc@postmarketos.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a pinconf to configure pins as input-enable. Signed-off-by: Caleb Connolly --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts= /rockchip/rk3399.dtsi index 080457a68e3c..9b111bd89f0a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -2188,6 +2188,22 @@ pcfg_output_low: pcfg-output-low { output-low; }; =20 + pcfg_input_enable: pcfg-input-enable { + input-enable; + }; + + pcfg_input_pull_up: pcfg-input-pull-up { + input-enable; + bias-pull-up; + drive-strength =3D <2>; + }; + + pcfg_input_pull_down: pcfg-input-pull-down { + input-enable; + bias-pull-down; + drive-strength =3D <2>; + }; + clock { clk_32k: clk-32k { rockchip,pins =3D <0 RK_PA0 2 &pcfg_pull_none>; --=20 2.35.1