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[2a02:8440:6240:cc41:3074:96af:9642:3]) by smtp.gmail.com with ESMTPSA id p16-20020a5d6390000000b00203ffebddf3sm7547464wru.99.2022.03.25.10.17.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Mar 2022 10:17:12 -0700 (PDT) From: Guillaume Ranquet To: chunkuang.hu@kernel.org, p.zabel@pengutronix.de, airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, matthias.bgg@gmail.com, chunfeng.yun@mediatek.com, kishon@ti.com, vkoul@kernel.org, deller@gmx.de, ck.hu@mediatek.com, jitao.shi@mediatek.com, angelogioacchino.delregno@collabora.com Cc: dri-devel@lists.freedesktop.org, linux-mediatek@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, linux-fbdev@vger.kernel.org, markyacoub@google.com Subject: [PATCH 14/22] drm/mediatek: dpi: move the csc_enable bit to SoC config Date: Fri, 25 Mar 2022 18:15:03 +0100 Message-Id: <20220325171511.23493-15-granquet@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220325171511.23493-1-granquet@baylibre.com> References: <20220325171511.23493-1-granquet@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add flexibility by moving the csc_enable bit to SoC specific config Signed-off-by: Guillaume Ranquet Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_dpi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/= mtk_dpi.c index 40254cd9d168..eb969c5c5c2e 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -133,6 +133,7 @@ struct mtk_dpi_conf { u32 hvsize_mask; u32 channel_swap_shift; u32 yuv422_en_bit; + u32 csc_enable_bit; const struct mtk_dpi_yc_limit *limit; }; =20 @@ -363,7 +364,8 @@ static void mtk_dpi_config_yuv422_enable(struct mtk_dpi= *dpi, bool enable) =20 static void mtk_dpi_config_csc_enable(struct mtk_dpi *dpi, bool enable) { - mtk_dpi_mask(dpi, DPI_CON, enable ? CSC_ENABLE : 0, CSC_ENABLE); + mtk_dpi_mask(dpi, DPI_CON, enable ? dpi->conf->csc_enable_bit : 0, + dpi->conf->csc_enable_bit); } =20 static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable) @@ -827,6 +829,7 @@ static const struct mtk_dpi_conf mt8173_conf =3D { .hvsize_mask =3D HSIZE_MASK, .channel_swap_shift =3D CH_SWAP, .yuv422_en_bit =3D YUV422_EN, + .csc_enable_bit =3D CSC_ENABLE, .limit =3D &mtk_dpi_limit, }; =20 @@ -843,6 +846,7 @@ static const struct mtk_dpi_conf mt2701_conf =3D { .hvsize_mask =3D HSIZE_MASK, .channel_swap_shift =3D CH_SWAP, .yuv422_en_bit =3D YUV422_EN, + .csc_enable_bit =3D CSC_ENABLE, .limit =3D &mtk_dpi_limit, }; =20 @@ -858,6 +862,7 @@ static const struct mtk_dpi_conf mt8183_conf =3D { .hvsize_mask =3D HSIZE_MASK, .channel_swap_shift =3D CH_SWAP, .yuv422_en_bit =3D YUV422_EN, + .csc_enable_bit =3D CSC_ENABLE, .limit =3D &mtk_dpi_limit, }; =20 @@ -873,6 +878,7 @@ static const struct mtk_dpi_conf mt8192_conf =3D { .hvsize_mask =3D HSIZE_MASK, .channel_swap_shift =3D CH_SWAP, .yuv422_en_bit =3D YUV422_EN, + .csc_enable_bit =3D CSC_ENABLE, .limit =3D &mtk_dpi_limit, }; =20 --=20 2.34.1