From nobody Sat Jun 20 01:57:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64047C433FE for ; Fri, 25 Mar 2022 01:20:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1357246AbiCYBWF (ORCPT ); Thu, 24 Mar 2022 21:22:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240712AbiCYBWD (ORCPT ); Thu, 24 Mar 2022 21:22:03 -0400 Received: from nksmu.kylinos.cn (mailgw.kylinos.cn [123.150.8.42]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5A6E860CFE for ; Thu, 24 Mar 2022 18:20:30 -0700 (PDT) X-UUID: f2e9e587d0b344779316483ce14ebf00-20220324 X-GW-Reason: 11101 X-Policy-Incident: 5pS25Lu25Lq66LaF6L+HNeS6uumcgOimgeWuoeaguA== X-Content-Feature: ica/max.line-size 74 audit/email.address 1 meta/cnt.alert 1 X-UUID: f2e9e587d0b344779316483ce14ebf00-20220324 Received: from cs2c.com.cn [(172.17.111.24)] by nksmu.kylinos.cn (envelope-from ) (Generic MTA) with ESMTP id 1781606887; Thu, 24 Mar 2022 18:49:12 +0800 X-ns-mid: postfix-623C4CD5-4726359750 Received: from localhost.localdomain (unknown [172.20.12.219]) by cs2c.com.cn (NSMail) with ESMTPA id 2B333383C640; Thu, 24 Mar 2022 10:49:57 +0000 (UTC) From: Cong Liu To: airlied@linux.ie, airlied@redhat.com, christian.koenig@amd.com, kraxel@redhat.com, robin.murphy@arm.com Cc: virtualization@lists.linux-foundation.org, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, ray.huang@amd.com, spice-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, Cong Liu Subject: [PATCH v2] drm/qxl: fix qxl can't use in arm64 Date: Thu, 24 Mar 2022 18:49:28 +0800 Message-Id: <20220324104928.2959545-1-liucong2@kylinos.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <12eba824-ee80-0aac-56ed-e13084c9cae7@amd.com> References: <12eba824-ee80-0aac-56ed-e13084c9cae7@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" qxl use ioremap to map ram_header and rom, in the arm64 implementation, the device is mapped as DEVICE_nGnRE, it can not support unaligned access. and qxl is a virtual device, it can be treated more like RAM than actual MMIO registers. use ioremap_wc() replace it. Signed-off-by: Cong Liu Acked-by: Christian K=C3=B6nig Reviewed-by: Dave Airlie --- drivers/gpu/drm/qxl/qxl_kms.c | 4 ++-- drivers/gpu/drm/qxl/qxl_ttm.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/qxl/qxl_kms.c b/drivers/gpu/drm/qxl/qxl_kms.c index 4dc5ad13f12c..a054e4a00fe8 100644 --- a/drivers/gpu/drm/qxl/qxl_kms.c +++ b/drivers/gpu/drm/qxl/qxl_kms.c @@ -165,7 +165,7 @@ int qxl_device_init(struct qxl_device *qdev, (int)qdev->surfaceram_size / 1024, (sb =3D=3D 4) ? "64bit" : "32bit"); =20 - qdev->rom =3D ioremap(qdev->rom_base, qdev->rom_size); + qdev->rom =3D ioremap_wc(qdev->rom_base, qdev->rom_size); if (!qdev->rom) { pr_err("Unable to ioremap ROM\n"); r =3D -ENOMEM; @@ -183,7 +183,7 @@ int qxl_device_init(struct qxl_device *qdev, goto rom_unmap; } =20 - qdev->ram_header =3D ioremap(qdev->vram_base + + qdev->ram_header =3D ioremap_wc(qdev->vram_base + qdev->rom->ram_header_offset, sizeof(*qdev->ram_header)); if (!qdev->ram_header) { diff --git a/drivers/gpu/drm/qxl/qxl_ttm.c b/drivers/gpu/drm/qxl/qxl_ttm.c index b2e33d5ba5d0..95df5750f47f 100644 --- a/drivers/gpu/drm/qxl/qxl_ttm.c +++ b/drivers/gpu/drm/qxl/qxl_ttm.c @@ -82,13 +82,13 @@ int qxl_ttm_io_mem_reserve(struct ttm_device *bdev, case TTM_PL_VRAM: mem->bus.is_iomem =3D true; mem->bus.offset =3D (mem->start << PAGE_SHIFT) + qdev->vram_base; - mem->bus.caching =3D ttm_cached; + mem->bus.caching =3D ttm_write_combined; break; case TTM_PL_PRIV: mem->bus.is_iomem =3D true; mem->bus.offset =3D (mem->start << PAGE_SHIFT) + qdev->surfaceram_base; - mem->bus.caching =3D ttm_cached; + mem->bus.caching =3D ttm_write_combined; break; default: return -EINVAL; --=20 2.25.1