From nobody Mon Jun 22 14:24:45 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2E9B9C433EF for ; Tue, 22 Mar 2022 12:48:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235022AbiCVMtf (ORCPT ); Tue, 22 Mar 2022 08:49:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33548 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233454AbiCVMte (ORCPT ); Tue, 22 Mar 2022 08:49:34 -0400 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 67BFD1086 for ; Tue, 22 Mar 2022 05:48:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1647953285; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=u9yrNlkYpunaRytWgUY4ikU4zuFUDmjdz1rHYai2Yfg=; b=gi4fV1o3CkBnlsZhL6RWSoejt42nleJUK00nOkLLnCt0speDZ14xAlqC6zNQNHN8T5l9lF T414HfYQSVu7aT+XhS/HCLquAeYtQjUtsymzI8HXQZ1AGqOWM5pBds2vZagz3yjoVrFNaN q3mXwTfIXX4jnWzRZw/5TyDFWgQToHY= Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-223-xYX6jujvMuuAdZk3_5mHyA-1; Tue, 22 Mar 2022 08:48:03 -0400 X-MC-Unique: xYX6jujvMuuAdZk3_5mHyA-1 Received: by mail-wm1-f69.google.com with SMTP id bg28-20020a05600c3c9c00b0038c8da4d9b3so1209443wmb.0 for ; Tue, 22 Mar 2022 05:48:03 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=u9yrNlkYpunaRytWgUY4ikU4zuFUDmjdz1rHYai2Yfg=; b=FRLTzzcxF8QmLg5YpCliUJ6LXpSbkvNuXRpetQ4VQcvwgQ4zyVm7qJiTZmMHyLQpxO dF7oI4D+yoEPQ/nKjXIIgdUWo3PQ+v8zn3gAqYKTcXD43vTKWvBYPcHgGG81sPBbjlff VmVQwRm6DNBtyQyr9x1KUZ0m1d+/+9G8PVzbGThBJkLZwIkdH9lAEZCM9DzUVBnwggBs 5IO88YnypiEKzLXBymO4YizvYFZ3kEMPhOg0Ct/12UB4/CkUryG2tQlFiEkKNVI08Y9E 5rEbCB3Fcg/k0xDDavmX1cFUpwswLloAEknBXJ4+Gg/R4F8HRIcs64bLSsXbb+Re1ssj 4zjg== X-Gm-Message-State: AOAM5301FCdeAQfUbzM9APWAyMyc5oZnLYUoVPAaizHSjkO2YeIgBTJH o1pfPkOjptJwix5+kB9FlqwJVYrpLguquu41IyY3nogbe+ZEM2PK/FuL+068Sh4svxgij3C+2hG 4pt3nugRIAahdmsgkkqBueg+8whMrGa66BsQyBhAvIdCKHAHu+KU3j6lYzxPrxLzQ7nJEIMmI5H 8= X-Received: by 2002:a05:600c:5021:b0:38c:70c0:80e9 with SMTP id n33-20020a05600c502100b0038c70c080e9mr3610565wmr.91.1647953282604; Tue, 22 Mar 2022 05:48:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyb73Jj3kArrdOmr4xNJ2g6A2tODfvNxCiROA57ukRjloP9coQ4ogSvUIco5W02naEshguG4A== X-Received: by 2002:a05:600c:5021:b0:38c:70c0:80e9 with SMTP id n33-20020a05600c502100b0038c70c080e9mr3610550wmr.91.1647953282389; Tue, 22 Mar 2022 05:48:02 -0700 (PDT) Received: from kherbst.pingu.com ([31.16.187.72]) by smtp.gmail.com with ESMTPSA id s17-20020adfdb11000000b001f02d5fea43sm16823291wri.98.2022.03.22.05.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Mar 2022 05:48:01 -0700 (PDT) From: Karol Herbst To: linux-kernel@vger.kernel.org Cc: Karol Herbst , Ben Skeggs , dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, stable@vger.kernel.org Subject: [PATCH] drm/nouveau/pmu: Add missing callbacks for Tegra devices Date: Tue, 22 Mar 2022 13:48:00 +0100 Message-Id: <20220322124800.2605463-1-kherbst@redhat.com> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fixes a crash booting on those platforms with nouveau. Fixes: 4cdd2450bf73 ("drm/nouveau/pmu/gm200-: use alternate falcon reset se= quence") Cc: Ben Skeggs Cc: Karol Herbst Cc: dri-devel@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: # v5.17+ Signed-off-by: Karol Herbst --- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c | 2 +- drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c | 1 + drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h | 1 + 4 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c b/drivers/gpu/= drm/nouveau/nvkm/subdev/pmu/gm20b.c index e1772211b0a4..612310d5d481 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gm20b.c @@ -216,6 +216,7 @@ gm20b_pmu =3D { .intr =3D gt215_pmu_intr, .recv =3D gm20b_pmu_recv, .initmsg =3D gm20b_pmu_initmsg, + .reset =3D gf100_pmu_reset, }; =20 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c b/drivers/gpu/= drm/nouveau/nvkm/subdev/pmu/gp102.c index 6bf7fc1bd1e3..1a6f9c3af5ec 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp102.c @@ -23,7 +23,7 @@ */ #include "priv.h" =20 -static void +void gp102_pmu_reset(struct nvkm_pmu *pmu) { struct nvkm_device *device =3D pmu->subdev.device; diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c b/drivers/gpu/= drm/nouveau/nvkm/subdev/pmu/gp10b.c index ba1583bb618b..94cfb1791af6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/gp10b.c @@ -83,6 +83,7 @@ gp10b_pmu =3D { .intr =3D gt215_pmu_intr, .recv =3D gm20b_pmu_recv, .initmsg =3D gm20b_pmu_initmsg, + .reset =3D gp102_pmu_reset, }; =20 #if IS_ENABLED(CONFIG_ARCH_TEGRA_210_SOC) diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h b/drivers/gpu/d= rm/nouveau/nvkm/subdev/pmu/priv.h index bcaade758ff7..21abf31f4442 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/priv.h @@ -41,6 +41,7 @@ int gt215_pmu_send(struct nvkm_pmu *, u32[2], u32, u32, u= 32, u32); =20 bool gf100_pmu_enabled(struct nvkm_pmu *); void gf100_pmu_reset(struct nvkm_pmu *); +void gp102_pmu_reset(struct nvkm_pmu *pmu); =20 void gk110_pmu_pgob(struct nvkm_pmu *, bool); =20 --=20 2.35.1