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[62.219.32.62]) by smtp.googlemail.com with ESMTPSA id f7-20020a05600c154700b0038c85aade39sm10642703wmg.47.2022.03.21.07.31.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 07:31:25 -0700 (PDT) From: Shlomo Pongratz X-Google-Original-From: Shlomo Pongratz To: linux-pci@vger.kernel.org Cc: linux-kernel@vger.kernel.org, andrew.maier@eideticom.com, logang@deltatee.com, bhelgaas@google.com, Shlomo Pongratz Subject: [PATCH v1] Intel Sky Lake-E host root ports check. Date: Mon, 21 Mar 2022 16:31:20 +0200 Message-Id: <20220321143120.12191-1-shlomop@pliops.com> X-Mailer: git-send-email 2.17.1 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" On commit 7b94b53db34f ("PCI/P2PDMA: Add Intel Sky Lake-E Root Ports B, C, = D to the whitelist") Andrew Maier added the Sky Lake-E additional devices 2031, 2032 and 2033 root ports to the already existing 2030 device. Note that the Intel devices 2030, 2031, 2032 and 2033 are ports A, B, C and= D. Consider on a bus X only port C is connected downstream so in the PCI scan = only device 8086:2032 on 0000:X:02.0 will be found as bridges that have no child= ren are ignored. As a result the routine pci_host_bridge_dev will return NULL for devices un= der slot C. In the proposed patch port field is added to the whitelist which is 0 for 2= 030, 1 for 2031, 2 for 2032 3 for 2033 and 0 for all other devices. Signed-off-by: Shlomo Pongratz --- drivers/pci/p2pdma.c | 35 +++++++++++++++++++++++++---------- 1 file changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/pci/p2pdma.c b/drivers/pci/p2pdma.c index 1015274bd2fe..86f6594a0b8a 100644 --- a/drivers/pci/p2pdma.c +++ b/drivers/pci/p2pdma.c @@ -305,22 +305,23 @@ static bool cpu_supports_p2pdma(void) static const struct pci_p2pdma_whitelist_entry { unsigned short vendor; unsigned short device; + unsigned short port; enum { REQ_SAME_HOST_BRIDGE =3D 1 << 0, } flags; } pci_p2pdma_whitelist[] =3D { /* Intel Xeon E5/Core i7 */ - {PCI_VENDOR_ID_INTEL, 0x3c00, REQ_SAME_HOST_BRIDGE}, - {PCI_VENDOR_ID_INTEL, 0x3c01, REQ_SAME_HOST_BRIDGE}, + {PCI_VENDOR_ID_INTEL, 0x3c00, 0, REQ_SAME_HOST_BRIDGE}, + {PCI_VENDOR_ID_INTEL, 0x3c01, 0, REQ_SAME_HOST_BRIDGE}, /* Intel Xeon E7 v3/Xeon E5 v3/Core i7 */ - {PCI_VENDOR_ID_INTEL, 0x2f00, REQ_SAME_HOST_BRIDGE}, - {PCI_VENDOR_ID_INTEL, 0x2f01, REQ_SAME_HOST_BRIDGE}, + {PCI_VENDOR_ID_INTEL, 0x2f00, 0, REQ_SAME_HOST_BRIDGE}, + {PCI_VENDOR_ID_INTEL, 0x2f01, 0, REQ_SAME_HOST_BRIDGE}, /* Intel SkyLake-E */ - {PCI_VENDOR_ID_INTEL, 0x2030, 0}, - {PCI_VENDOR_ID_INTEL, 0x2031, 0}, - {PCI_VENDOR_ID_INTEL, 0x2032, 0}, - {PCI_VENDOR_ID_INTEL, 0x2033, 0}, - {PCI_VENDOR_ID_INTEL, 0x2020, 0}, + {PCI_VENDOR_ID_INTEL, 0x2030, 0, 0}, + {PCI_VENDOR_ID_INTEL, 0x2031, 1, 0}, + {PCI_VENDOR_ID_INTEL, 0x2032, 2, 0}, + {PCI_VENDOR_ID_INTEL, 0x2033, 3, 0}, + {PCI_VENDOR_ID_INTEL, 0x2020, 0, 0}, {} }; =20 @@ -332,6 +333,11 @@ static const struct pci_p2pdma_whitelist_entry { * bus->devices list and that the devfn is 00.0. These assumptions should = hold * for all the devices in the whitelist above. * + * The method above will work in most cases but not for all. + * Note that the Intel devices 2030, 2031, 2032 and 2033 are ports A, B, C= and D. + * Consider on a bus X only port C is connected downstream so in the PCI s= can only + * device 8086:2032 on 0000:X:02.0 will be found as birdges with no childr= en are ignored + * * This function is equivalent to pci_get_slot(host->bus, 0), however it d= oes * not take the pci_bus_sem lock seeing __host_bridge_whitelist() must not * sleep. @@ -349,7 +355,10 @@ static struct pci_dev *pci_host_bridge_dev(struct pci_= host_bridge *host) =20 if (!root) return NULL; - if (root->devfn !=3D PCI_DEVFN(0, 0)) + /* Here just check that the function is 0 + * The slot number will be checked later + */ + if (PCI_FUNC(root->devfn) !=3D 0) return NULL; =20 return root; @@ -371,6 +380,12 @@ static bool __host_bridge_whitelist(struct pci_host_br= idge *host, for (entry =3D pci_p2pdma_whitelist; entry->vendor; entry++) { if (vendor !=3D entry->vendor || device !=3D entry->device) continue; + /* For Intel Sky Lake-E host root ports check the port is + * Identical to the slot number. + * For other devices continue to inssist on slot 0 + */ + if (PCI_SLOT(root->devfn) !=3D entry->port) + return false; if (entry->flags & REQ_SAME_HOST_BRIDGE && !same_host_bridge) return false; =20 --=20 2.17.1