From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A6A8C4332F for ; Sun, 20 Mar 2022 06:42:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244831AbiCTGoG (ORCPT ); Sun, 20 Mar 2022 02:44:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233610AbiCTGoD (ORCPT ); Sun, 20 Mar 2022 02:44:03 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8FEDE2102AB for ; Sat, 19 Mar 2022 23:42:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758561; x=1679294561; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=riq+74Hd12qH3YALmkqybAFcLX89Dbvo/9sgqkY6aro=; b=kfvQJ8GlVKse/d/TmJllqVtxigk6+G7Rxqd6MKrtvf1S2aO+0gnvYfVN /YPHtefs4cYQGcJCXjSvLKmLG/tlKtvctp7IL1VFQIruyxGLHVUqywxbw n5ae0KXoAEnbl5TTVZ2NmqO0Al52j6XeLGrHM4qax/JW7PiGsL7wy7ixe FfyGesQ77X7vFQ450lV/GE5f7WQ8Pz7Sw1wmrsnCIswzN3XMeyPoKB6Lx 5vb3YWbmwy+3++/dbs6JAwO3kBxr/7dj2CZtIncoGgj/aqvszS+5bb27A 5zaOnSW0E59zIwkcXTdScGbhr8QApT8Sq57H/ILud8IsngU8/tXqhYpet g==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924007" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924007" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:42:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839870" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:42:38 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 01/11] iommu: Add pasid_bits field in struct dev_iommu Date: Sun, 20 Mar 2022 14:40:20 +0800 Message-Id: <20220320064030.2936936-2-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use this field to save the pasid/ssid bits that a device is able to support with its IOMMU hardware. It is a generic attribute of a device and lifting it into the per-device dev_iommu struct makes it possible to allocate a PASID for device without calls into the IOMMU drivers. Any iommu driver which suports PASID related features should set this field before features are enabled on the devices. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 1 + drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 + drivers/iommu/intel/iommu.c | 5 ++++- 3 files changed, 6 insertions(+), 1 deletion(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 6ef2df258673..36f43af0af53 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -368,6 +368,7 @@ struct dev_iommu { struct iommu_fwspec *fwspec; struct iommu_device *iommu_dev; void *priv; + unsigned int pasid_bits; }; =20 int iommu_device_register(struct iommu_device *iommu, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 627a3ed5ee8f..8e262210b5ad 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2812,6 +2812,7 @@ static int arm_smmu_dev_enable_feature(struct device = *dev, master->iopf_enabled =3D true; return 0; case IOMMU_DEV_FEAT_SVA: + dev->iommu->pasid_bits =3D master->ssid_bits; return arm_smmu_master_enable_sva(master); default: return -EINVAL; diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 6f7485c44a4b..c1b91bce1530 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4587,8 +4587,11 @@ static struct iommu_device *intel_iommu_probe_device= (struct device *dev) if (pasid_supported(iommu)) { int features =3D pci_pasid_features(pdev); =20 - if (features >=3D 0) + if (features >=3D 0) { info->pasid_supported =3D features | 1; + dev->iommu->pasid_bits =3D + fls(pci_max_pasids(pdev)) - 1; + } } =20 if (info->ats_supported && ecap_prs(iommu->ecap) && --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EDD27C433F5 for ; Sun, 20 Mar 2022 06:42:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244841AbiCTGoK (ORCPT ); Sun, 20 Mar 2022 02:44:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233610AbiCTGoH (ORCPT ); Sun, 20 Mar 2022 02:44:07 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 107622102A9 for ; Sat, 19 Mar 2022 23:42:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758565; x=1679294565; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bqc+qN2B2/Vja5qf7Vjqf51YeUhWC0UzAro/jfN5yK4=; b=X3fdMKhudHmP/wlEPKPsaYjGPszdIjMlj+4O2Ey/9pDiHPzhbmHkmO8l a3bBy8WlMZ2nGPy5u8JDuoqdkauYdXmcjpTp8E4RInHSg7iCJj5pVEGh6 5EIXgehATP5SFUyFfeQLUduszjrFlNqgzvxMmPfb+up6DvXa5rX9KYYtJ APcrkwwhBVdi76tThqjkvpswKan4hxGSYIKr8lnD6ufhc7ppRVkCxEdKW 8l5hMEgbUXN+JnVDIwVi02Xtw5JNjOT3f7ZFeLZiJHB/5IbsHSrR2YryP BhOYNpOaq1U4T9egObAfXM8fsviWAkggtwrcbG7kC7SQobOEtfN3iBalE A==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924011" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924011" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:42:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839880" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:42:41 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 02/11] iommu: Add iommu_domain type for SVA Date: Sun, 20 Mar 2022 14:40:21 +0800 Message-Id: <20220320064030.2936936-3-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a new iommu domain type IOMMU_DOMAIN_SVA to represent an I/O page table which is shared from CPU host VA. Add a sva_cookie field in the iommu_domain structure to save the mm_struct which represent the CPU memory page table. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 36f43af0af53..3e179b853380 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -64,6 +64,9 @@ struct iommu_domain_geometry { #define __IOMMU_DOMAIN_PT (1U << 2) /* Domain is identity mapped */ #define __IOMMU_DOMAIN_DMA_FQ (1U << 3) /* DMA-API uses flush queue */ =20 +#define __IOMMU_DOMAIN_SHARED (1U << 4) /* Page table shared from CPU */ +#define __IOMMU_DOMAIN_HOST_VA (1U << 5) /* Host CPU virtual address */ + /* * This are the possible domain-types * @@ -86,6 +89,8 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_DMA_FQ (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API | \ __IOMMU_DOMAIN_DMA_FQ) +#define IOMMU_DOMAIN_SVA (__IOMMU_DOMAIN_SHARED | \ + __IOMMU_DOMAIN_HOST_VA) =20 struct iommu_domain { unsigned type; @@ -95,6 +100,7 @@ struct iommu_domain { void *handler_token; struct iommu_domain_geometry geometry; struct iommu_dma_cookie *iova_cookie; + struct mm_struct *sva_cookie; }; =20 static inline bool iommu_is_dma_domain(struct iommu_domain *domain) --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A50DCC4332F for ; Sun, 20 Mar 2022 06:43:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244846AbiCTGoO (ORCPT ); Sun, 20 Mar 2022 02:44:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244840AbiCTGoL (ORCPT ); Sun, 20 Mar 2022 02:44:11 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF344211EE8 for ; Sat, 19 Mar 2022 23:42:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758568; x=1679294568; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vJyVAk/j31H5Tr2Hz0IVnXHEkRGz8CGwz17yXeLe0U8=; b=Jv8xSpX1t/zP8tQFqpL/0KjeBduWWADsNvvMInHhi3Hd3fsYYPhK/Tbk R9ajYmK+eHgmpLmi8VcsCQdsbwCWoulJWq/Pn2ARCE+oDiF0gLKqy+P+6 1WQQ/buM8noWUIw+pdwFJv3u53+prTSTqGO6ryOpSim4uNZE9362M+1JB /eE1jcfJUl9vWuRehM2DLbs72wAzWj4Ub91A+p/nGXglWOZACv873h4c2 t9FLS+M4ho/8r5cmXzDedQvMZqA3qrn4IivbnN9IUdzG0SUQwMKLgdB1g lYE1bS1xby6f8ZoKfdcEpl0QIF93kq/oWRSiuh8LfNmslfsmYaR+NSY5G A==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924013" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924013" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:42:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839884" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:42:45 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 03/11] iommu: Add attach/detach_dev_pasid domain ops Date: Sun, 20 Mar 2022 14:40:22 +0800 Message-Id: <20220320064030.2936936-4-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Attaching an IOMMU domain to a PASID of a device is a generic operation for modern IOMMU drivers which support PASID-granular DMA address translation. Currently visible usage scenarios include (but not limited): - SVA - kernel DMA with PASID - hardware-assist mediated device This adds a pair of common domain ops for this purpose and implements a couple of wrapper helpers for in-kernel usage. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 22 ++++++++++++++++++++++ drivers/iommu/iommu.c | 41 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 3e179b853380..e51845b9a146 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -268,6 +268,8 @@ struct iommu_ops { * struct iommu_domain_ops - domain specific operations * @attach_dev: attach an iommu domain to a device * @detach_dev: detach an iommu domain from a device + * @attach_dev_pasid: attach an iommu domain to a pasid of device + * @detach_dev_pasid: detach an iommu domain from a pasid of device * @map: map a physically contiguous memory region to an iommu domain * @map_pages: map a physically contiguous set of pages of the same size to * an iommu domain. @@ -285,6 +287,10 @@ struct iommu_ops { struct iommu_domain_ops { int (*attach_dev)(struct iommu_domain *domain, struct device *dev); void (*detach_dev)(struct iommu_domain *domain, struct device *dev); + int (*attach_dev_pasid)(struct iommu_domain *domain, + struct device *dev, ioasid_t id); + void (*detach_dev_pasid)(struct iommu_domain *domain, + struct device *dev, ioasid_t id); =20 int (*map)(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot, gfp_t gfp); @@ -678,6 +684,11 @@ int iommu_group_claim_dma_owner(struct iommu_group *gr= oup, void *owner); void iommu_group_release_dma_owner(struct iommu_group *group); bool iommu_group_dma_owner_claimed(struct iommu_group *group); =20 +int iommu_attach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid); +void iommu_detach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid); + #else /* CONFIG_IOMMU_API */ =20 struct iommu_ops {}; @@ -1046,6 +1057,17 @@ static inline bool iommu_group_dma_owner_claimed(str= uct iommu_group *group) { return false; } + +static inline int iommu_attach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + return -ENODEV; +} + +static inline void iommu_detach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ +} #endif /* CONFIG_IOMMU_API */ =20 /** diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 0c42ece25854..78c71ee15f36 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -3167,3 +3167,44 @@ bool iommu_group_dma_owner_claimed(struct iommu_grou= p *group) return user; } EXPORT_SYMBOL_GPL(iommu_group_dma_owner_claimed); + +int iommu_attach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + struct iommu_group *group; + int ret =3D -EINVAL; + + if (!domain->ops->attach_dev_pasid) + return -EINVAL; + + group =3D iommu_group_get(dev); + if (!group) + return -ENODEV; + + mutex_lock(&group->mutex); + if (iommu_group_device_count(group) !=3D 1) + goto out_unlock; + + ret =3D domain->ops->attach_dev_pasid(domain, dev, pasid); + +out_unlock: + mutex_unlock(&group->mutex); + iommu_group_put(group); + + return ret; +} + +void iommu_detach_device_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + struct iommu_group *group; + + group =3D iommu_group_get(dev); + if (WARN_ON(!group)) + return; + + mutex_lock(&group->mutex); + domain->ops->detach_dev_pasid(domain, dev, pasid); + mutex_unlock(&group->mutex); + iommu_group_put(group); +} --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9549AC433F5 for ; Sun, 20 Mar 2022 06:43:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244849AbiCTGoU (ORCPT ); Sun, 20 Mar 2022 02:44:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50086 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244840AbiCTGoP (ORCPT ); Sun, 20 Mar 2022 02:44:15 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 68C62277 for ; Sat, 19 Mar 2022 23:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758572; x=1679294572; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hqPz7OA71vKX+4SbCI7310Zl8v9/gzrRYRCnasL1ZjU=; b=Bjn9FF/yoAvthFUxPXbfvvotbuh+yEca7RS87LZSgOYiysRZoFhFetJT ZndGOlcJ49QRyZB+wstE4mkPYv0z9ZdpRQYBkO1HXMK5Rw96ZTvU8+Vch cY72haaq8Gk8/HlG/rnTPbXLQVPYp7Cst/t6P3JILqVHWN2A++d9bxGMY Ppuc5t83vfpqoWumJc0OgzfxzSMqN/C1XWH5wP21UYlsVUgZcvhu9mvnz B5yYU3RXdNvsWPKZeZvJ0ORFQYKAVt1kE0l1KscDyq2oUYGkeXz80fWWD m/QV+VxU1QfsI40Nkx80h86TR6keh3ipkOmu4E2JX4Tc7Ypn+dS19tIq7 g==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924019" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924019" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:42:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839896" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:42:48 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 04/11] iommu/vt-d: Add SVA domain support Date: Sun, 20 Mar 2022 14:40:23 +0800 Message-Id: <20220320064030.2936936-5-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for SVA domain allocation and provide an SVA-specific iommu_domain_ops. Signed-off-by: Lu Baolu --- include/linux/intel-iommu.h | 1 + drivers/iommu/intel/iommu.c | 12 ++++++++++++ drivers/iommu/intel/svm.c | 34 ++++++++++++++++++++++++++++++++++ 3 files changed, 47 insertions(+) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index 2f9891cb3d00..c14283137fb5 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -744,6 +744,7 @@ void intel_svm_unbind(struct iommu_sva *handle); u32 intel_svm_get_pasid(struct iommu_sva *handle); int intel_svm_page_response(struct device *dev, struct iommu_fault_event *= evt, struct iommu_page_response *msg); +extern const struct iommu_domain_ops intel_svm_domain_ops; =20 struct intel_svm_dev { struct list_head list; diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index c1b91bce1530..d55dca3eacf8 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4318,6 +4318,18 @@ static struct iommu_domain *intel_iommu_domain_alloc= (unsigned type) return domain; case IOMMU_DOMAIN_IDENTITY: return &si_domain->domain; +#ifdef CONFIG_INTEL_IOMMU_SVM + case IOMMU_DOMAIN_SVA: + dmar_domain =3D alloc_domain(type); + if (!dmar_domain) { + pr_err("Can't allocate sva domain\n"); + return NULL; + } + domain =3D &dmar_domain->domain; + domain->ops =3D &intel_svm_domain_ops; + + return domain; +#endif /* CONFIG_INTEL_IOMMU_SVM */ default: return NULL; } diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index ee5ecde5b318..b9f4dd7057d1 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -932,3 +932,37 @@ int intel_svm_page_response(struct device *dev, mutex_unlock(&pasid_mutex); return ret; } + +static int intel_svm_attach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + struct device_domain_info *info =3D dev_iommu_priv_get(dev); + struct mm_struct *mm =3D domain->sva_cookie; + struct intel_iommu *iommu =3D info->iommu; + struct iommu_sva *sva; + + mutex_lock(&pasid_mutex); + sva =3D intel_svm_bind_mm(iommu, dev, mm); + mutex_unlock(&pasid_mutex); + + return IS_ERR_OR_NULL(sva); +} + +static void intel_svm_detach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t pasid) +{ + mutex_lock(&pasid_mutex); + intel_svm_unbind_mm(dev, pasid); + mutex_unlock(&pasid_mutex); +} + +static void intel_svm_domain_free(struct iommu_domain *domain) +{ + kfree(domain); +} + +const struct iommu_domain_ops intel_svm_domain_ops =3D { + .attach_dev_pasid =3D intel_svm_attach_dev_pasid, + .detach_dev_pasid =3D intel_svm_detach_dev_pasid, + .free =3D intel_svm_domain_free, +}; --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0537C433FE for ; Sun, 20 Mar 2022 06:43:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244851AbiCTGo0 (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924028" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924028" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:42:55 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839914" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:42:52 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 05/11] arm-smmu-v3/sva: Add SVA domain support Date: Sun, 20 Mar 2022 14:40:24 +0800 Message-Id: <20220320064030.2936936-6-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for SVA domain allocation and provide an SVA-specific iommu_domain_ops. Signed-off-by: Lu Baolu --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 14 ++++++ .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 45 +++++++++++++++++++ drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 13 +++++- 3 files changed, 71 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index cd48590ada30..7631c00fdcbd 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -759,6 +759,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev= , struct mm_struct *mm, void arm_smmu_sva_unbind(struct iommu_sva *handle); u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id); +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id); #else /* CONFIG_ARM_SMMU_V3_SVA */ static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) { @@ -804,5 +808,15 @@ static inline u32 arm_smmu_sva_get_pasid(struct iommu_= sva *handle) } =20 static inline void arm_smmu_sva_notifier_synchronize(void) {} + +static inline int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domai= n, + struct device *dev, ioasid_t id) +{ + return -ENODEV; +} + +static inline void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *doma= in, + struct device *dev, + ioasid_t id) {} #endif /* CONFIG_ARM_SMMU_V3_SVA */ #endif /* _ARM_SMMU_V3_H */ diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 22ddd05bbdcd..1e114b9dc17f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -534,3 +534,48 @@ void arm_smmu_sva_notifier_synchronize(void) */ mmu_notifier_synchronize(); } + +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id) +{ + int ret =3D 0; + struct iommu_sva *handle; + struct mm_struct *mm =3D domain->sva_cookie; + struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); + + if (smmu_domain->stage !=3D ARM_SMMU_DOMAIN_S1 || + domain->type !=3D IOMMU_DOMAIN_SVA || !mm) + return -EINVAL; + + mutex_lock(&sva_lock); + handle =3D __arm_smmu_sva_bind(dev, mm); + if (IS_ERR_OR_NULL(handle)) + ret =3D PTR_ERR(handle); + mutex_unlock(&sva_lock); + + return ret; +} + +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, + struct device *dev, ioasid_t id) +{ + struct arm_smmu_bond *bond =3D NULL, *t; + struct mm_struct *mm =3D domain->sva_cookie; + struct arm_smmu_master *master =3D dev_iommu_priv_get(dev); + + mutex_lock(&sva_lock); + list_for_each_entry(t, &master->bonds, list) { + if (t->mm =3D=3D mm) { + bond =3D t; + break; + } + } + + if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) { + list_del(&bond->list); + arm_smmu_mmu_notifier_put(bond->smmu_mn); + iommu_sva_free_pasid(bond->mm); + kfree(bond); + } + mutex_unlock(&sva_lock); +} diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 8e262210b5ad..2e9d3cd30510 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -88,6 +88,8 @@ static struct arm_smmu_option_prop arm_smmu_options[] =3D= { { 0, NULL}, }; =20 +static void arm_smmu_domain_free(struct iommu_domain *domain); + static void parse_driver_options(struct arm_smmu_device *smmu) { int i =3D 0; @@ -1995,6 +1997,12 @@ static bool arm_smmu_capable(enum iommu_cap cap) } } =20 +static const struct iommu_domain_ops arm_smmu_sva_domain_ops =3D { + .attach_dev_pasid =3D arm_smmu_sva_attach_dev_pasid, + .detach_dev_pasid =3D arm_smmu_sva_detach_dev_pasid, + .free =3D arm_smmu_domain_free, +}; + static struct iommu_domain *arm_smmu_domain_alloc(unsigned type) { struct arm_smmu_domain *smmu_domain; @@ -2002,7 +2010,8 @@ static struct iommu_domain *arm_smmu_domain_alloc(uns= igned type) if (type !=3D IOMMU_DOMAIN_UNMANAGED && type !=3D IOMMU_DOMAIN_DMA && type !=3D IOMMU_DOMAIN_DMA_FQ && - type !=3D IOMMU_DOMAIN_IDENTITY) + type !=3D IOMMU_DOMAIN_IDENTITY && + type !=3D IOMMU_DOMAIN_SVA) return NULL; =20 /* @@ -2018,6 +2027,8 @@ static struct iommu_domain *arm_smmu_domain_alloc(uns= igned type) INIT_LIST_HEAD(&smmu_domain->devices); spin_lock_init(&smmu_domain->devices_lock); INIT_LIST_HEAD(&smmu_domain->mmu_notifiers); + if (type =3D=3D IOMMU_DOMAIN_SVA) + smmu_domain->domain.ops =3D &arm_smmu_sva_domain_ops; =20 return &smmu_domain->domain; } --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62DACC433EF for ; Sun, 20 Mar 2022 06:43:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244862AbiCTGo6 (ORCPT ); Sun, 20 Mar 2022 02:44:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51192 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244870AbiCTGoa (ORCPT ); Sun, 20 Mar 2022 02:44:30 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5CC92DC9 for ; Sat, 19 Mar 2022 23:42:59 -0700 (PDT) DKIM-Signature: v=1; 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19 Mar 2022 23:42:56 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 06/11] iommu/sva: Use attach/detach_pasid_dev in SVA interfaces Date: Sun, 20 Mar 2022 14:40:25 +0800 Message-Id: <20220320064030.2936936-7-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The existing iommu SVA interfaces are implemented by calling the SVA specific iommu ops provided by the IOMMU drivers. There's no need for any SVA specific ops in iommu_ops vector anymore as we can achieve this through the generic attach/detach_dev_pasid domain ops. This refactors the IOMMU SVA interfaces implementation by using the attach/detach_pasid_dev ops and align them with the concept of the iommu domain. Put the new SVA code in the sva related file in order to make it self-contained. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 46 +++++++++------- drivers/iommu/iommu-sva-lib.c | 100 ++++++++++++++++++++++++++++++++++ drivers/iommu/iommu.c | 92 ------------------------------- 3 files changed, 125 insertions(+), 113 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index e51845b9a146..1c7db6a94022 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -629,6 +629,8 @@ struct iommu_fwspec { */ struct iommu_sva { struct device *dev; + ioasid_t pasid; + struct iommu_domain *domain; }; =20 int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwno= de, @@ -671,12 +673,6 @@ int iommu_dev_enable_feature(struct device *dev, enum = iommu_dev_features f); int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features = f); bool iommu_dev_feature_enabled(struct device *dev, enum iommu_dev_features= f); =20 -struct iommu_sva *iommu_sva_bind_device(struct device *dev, - struct mm_struct *mm, - void *drvdata); -void iommu_sva_unbind_device(struct iommu_sva *handle); -u32 iommu_sva_get_pasid(struct iommu_sva *handle); - int iommu_device_use_default_domain(struct device *dev); void iommu_device_unuse_default_domain(struct device *dev); =20 @@ -1014,21 +1010,6 @@ iommu_dev_disable_feature(struct device *dev, enum i= ommu_dev_features feat) return -ENODEV; } =20 -static inline struct iommu_sva * -iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvd= ata) -{ - return NULL; -} - -static inline void iommu_sva_unbind_device(struct iommu_sva *handle) -{ -} - -static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) -{ - return IOMMU_PASID_INVALID; -} - static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { return NULL; @@ -1070,6 +1051,29 @@ static inline void iommu_detach_device_pasid(struct = iommu_domain *domain, } #endif /* CONFIG_IOMMU_API */ =20 +#ifdef CONFIG_IOMMU_SVA +struct iommu_sva *iommu_sva_bind_device(struct device *dev, + struct mm_struct *mm, + void *drvdata); +void iommu_sva_unbind_device(struct iommu_sva *handle); +u32 iommu_sva_get_pasid(struct iommu_sva *handle); +#else /* CONFIG_IOMMU_SVA */ +static inline struct iommu_sva * +iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvd= ata) +{ + return NULL; +} + +static inline void iommu_sva_unbind_device(struct iommu_sva *handle) +{ +} + +static inline u32 iommu_sva_get_pasid(struct iommu_sva *handle) +{ + return IOMMU_PASID_INVALID; +} +#endif /* CONFIG_IOMMU_SVA */ + /** * iommu_map_sgtable - Map the given buffer to the IOMMU domain * @domain: The IOMMU domain to perform the mapping diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c index 106506143896..47cf98e661ff 100644 --- a/drivers/iommu/iommu-sva-lib.c +++ b/drivers/iommu/iommu-sva-lib.c @@ -3,6 +3,8 @@ * Helpers for IOMMU drivers implementing SVA */ #include +#include +#include #include =20 #include "iommu-sva-lib.h" @@ -69,3 +71,101 @@ struct mm_struct *iommu_sva_find(ioasid_t pasid) return ioasid_find(&iommu_sva_pasid, pasid, __mmget_not_zero); } EXPORT_SYMBOL_GPL(iommu_sva_find); + +static struct iommu_domain *iommu_sva_domain_alloc(struct device *dev) +{ + struct bus_type *bus =3D dev->bus; + struct iommu_domain *domain; + + if (!bus || !bus->iommu_ops) + return NULL; + + domain =3D bus->iommu_ops->domain_alloc(IOMMU_DOMAIN_SVA); + if (domain) + domain->type =3D IOMMU_DOMAIN_SVA; + + return domain; +} + +/** + * iommu_sva_bind_device() - Bind a process address space to a device + * @dev: the device + * @mm: the mm to bind, caller must hold a reference to it + * @drvdata: opaque data pointer to pass to bind callback + * + * Create a bond between device and address space, allowing the device to = access + * the mm using the returned PASID. If a bond already exists between @devi= ce and + * @mm, it is returned and an additional reference is taken. Caller must c= all + * iommu_sva_unbind_device() to release each reference. + * + * iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first,= to + * initialize the required SVA features. + * + * On error, returns an ERR_PTR value. + */ +struct iommu_sva * +iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvd= ata) +{ + int ret =3D -EINVAL; + struct iommu_sva *handle; + struct iommu_domain *domain; + + handle =3D kzalloc(sizeof(*handle), GFP_KERNEL); + if (!handle) + return ERR_PTR(-ENOMEM); + + ret =3D iommu_sva_alloc_pasid(mm, 1, (1U << dev->iommu->pasid_bits) - 1); + if (ret) + goto out; + + domain =3D iommu_sva_domain_alloc(dev); + if (!domain) { + ret =3D -ENOMEM; + goto out; + } + domain->sva_cookie =3D mm; + + ret =3D iommu_attach_device_pasid(domain, dev, mm->pasid); + if (ret) + goto out_free_domain; + + handle->dev =3D dev; + handle->domain =3D domain; + handle->pasid =3D mm->pasid; + + return handle; + +out_free_domain: + iommu_domain_free(domain); +out: + kfree(handle); + + return ERR_PTR(ret); +} +EXPORT_SYMBOL_GPL(iommu_sva_bind_device); + +/** + * iommu_sva_unbind_device() - Remove a bond created with iommu_sva_bind_d= evice + * @handle: the handle returned by iommu_sva_bind_device() + * + * Put reference to a bond between device and address space. The device sh= ould + * not be issuing any more transaction for this PASID. All outstanding page + * requests for this PASID must have been flushed to the IOMMU. + */ +void iommu_sva_unbind_device(struct iommu_sva *handle) +{ + struct device *dev =3D handle->dev; + struct iommu_domain *domain =3D handle->domain; + struct mm_struct *mm =3D domain->sva_cookie; + + iommu_detach_device_pasid(domain, dev, mm->pasid); + iommu_domain_free(domain); + kfree(handle); +} +EXPORT_SYMBOL_GPL(iommu_sva_unbind_device); + +u32 iommu_sva_get_pasid(struct iommu_sva *handle) +{ + return handle->pasid; +} +EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 78c71ee15f36..c0966fc9b686 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2706,98 +2706,6 @@ bool iommu_dev_feature_enabled(struct device *dev, e= num iommu_dev_features feat) } EXPORT_SYMBOL_GPL(iommu_dev_feature_enabled); =20 -/** - * iommu_sva_bind_device() - Bind a process address space to a device - * @dev: the device - * @mm: the mm to bind, caller must hold a reference to it - * @drvdata: opaque data pointer to pass to bind callback - * - * Create a bond between device and address space, allowing the device to = access - * the mm using the returned PASID. If a bond already exists between @devi= ce and - * @mm, it is returned and an additional reference is taken. Caller must c= all - * iommu_sva_unbind_device() to release each reference. - * - * iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) must be called first,= to - * initialize the required SVA features. - * - * On error, returns an ERR_PTR value. - */ -struct iommu_sva * -iommu_sva_bind_device(struct device *dev, struct mm_struct *mm, void *drvd= ata) -{ - struct iommu_group *group; - struct iommu_sva *handle =3D ERR_PTR(-EINVAL); - const struct iommu_ops *ops =3D dev_iommu_ops(dev); - - if (!ops->sva_bind) - return ERR_PTR(-ENODEV); - - group =3D iommu_group_get(dev); - if (!group) - return ERR_PTR(-ENODEV); - - /* Ensure device count and domain don't change while we're binding */ - mutex_lock(&group->mutex); - - /* - * To keep things simple, SVA currently doesn't support IOMMU groups - * with more than one device. Existing SVA-capable systems are not - * affected by the problems that required IOMMU groups (lack of ACS - * isolation, device ID aliasing and other hardware issues). - */ - if (iommu_group_device_count(group) !=3D 1) - goto out_unlock; - - handle =3D ops->sva_bind(dev, mm, drvdata); - -out_unlock: - mutex_unlock(&group->mutex); - iommu_group_put(group); - - return handle; -} -EXPORT_SYMBOL_GPL(iommu_sva_bind_device); - -/** - * iommu_sva_unbind_device() - Remove a bond created with iommu_sva_bind_d= evice - * @handle: the handle returned by iommu_sva_bind_device() - * - * Put reference to a bond between device and address space. The device sh= ould - * not be issuing any more transaction for this PASID. All outstanding page - * requests for this PASID must have been flushed to the IOMMU. - */ -void iommu_sva_unbind_device(struct iommu_sva *handle) -{ - struct iommu_group *group; - struct device *dev =3D handle->dev; - const struct iommu_ops *ops =3D dev_iommu_ops(dev); - - if (!ops->sva_unbind) - return; - - group =3D iommu_group_get(dev); - if (!group) - return; - - mutex_lock(&group->mutex); - ops->sva_unbind(handle); - mutex_unlock(&group->mutex); - - iommu_group_put(group); -} -EXPORT_SYMBOL_GPL(iommu_sva_unbind_device); - -u32 iommu_sva_get_pasid(struct iommu_sva *handle) -{ - const struct iommu_ops *ops =3D dev_iommu_ops(handle->dev); - - if (!ops->sva_get_pasid) - return IOMMU_PASID_INVALID; - - return ops->sva_get_pasid(handle); -} -EXPORT_SYMBOL_GPL(iommu_sva_get_pasid); - /* * Changes the default domain of an iommu group that has *only* one device * --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 69165C433EF for ; Sun, 20 Mar 2022 06:44:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244852AbiCTGqC (ORCPT ); Sun, 20 Mar 2022 02:46:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244896AbiCTGox (ORCPT ); Sun, 20 Mar 2022 02:44:53 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7E27665D0 for ; Sat, 19 Mar 2022 23:43:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758591; x=1679294591; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=i48PsSFDn9P9SUcu6pxPrab+KNIby29bArypa5yzeIs=; b=T2EmIkHM4+SP/ELHhrMg42HgVTtLUV0imZ9Bp2JgyfQRwXf8zi5Ita8f zSz7slHv0qAefD11qGd/AThFgY/xTCW/Ygn4GOYXpvNQwf7a2X5shm8K6 ofCoVemV+3sIc0kpuUbvoUQ5JHRyWZMDQJOaGVX0M9r9valE5XbpYRIwA OUN09IlY4nWqDzUcBUL5UkyLdIwsai0AtAqOKaA915267kux7wtKQwNIx oZfbqBrXilXRqYumbuQLw5gbi1uPBejFO6sQO4aV4QlxwW4HSnX/MmZ2D FJ7+kiGwDPxX/jq4+7TLbaxTq6otqmWWsrGJkzKc1pDkSnMhM+iFS3dlR Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924036" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924036" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:43:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839943" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:43:00 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 07/11] iommu: Remove SVA related callbacks from iommu ops Date: Sun, 20 Mar 2022 14:40:26 +0800 Message-Id: <20220320064030.2936936-8-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" These ops'es have been replaced with the dev_attach/detach_pasid domain ops'es. There's no need for them anymore. Remove them to avoid dead code. Signed-off-by: Lu Baolu --- include/linux/intel-iommu.h | 4 -- include/linux/iommu.h | 8 --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 17 ------- .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 36 -------------- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 3 -- drivers/iommu/intel/iommu.c | 3 -- drivers/iommu/intel/svm.c | 49 ------------------- 7 files changed, 120 deletions(-) diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h index c14283137fb5..7ce12590ce0f 100644 --- a/include/linux/intel-iommu.h +++ b/include/linux/intel-iommu.h @@ -738,10 +738,6 @@ struct intel_iommu *device_to_iommu(struct device *dev= , u8 *bus, u8 *devfn); extern void intel_svm_check(struct intel_iommu *iommu); extern int intel_svm_enable_prq(struct intel_iommu *iommu); extern int intel_svm_finish_prq(struct intel_iommu *iommu); -struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm, - void *drvdata); -void intel_svm_unbind(struct iommu_sva *handle); -u32 intel_svm_get_pasid(struct iommu_sva *handle); int intel_svm_page_response(struct device *dev, struct iommu_fault_event *= evt, struct iommu_page_response *msg); extern const struct iommu_domain_ops intel_svm_domain_ops; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 1c7db6a94022..47c9aa5aa9c8 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -212,9 +212,6 @@ struct iommu_iotlb_gather { * @dev_has/enable/disable_feat: per device entries to check/enable/disable * iommu specific features. * @dev_feat_enabled: check enabled feature - * @sva_bind: Bind process address space to device - * @sva_unbind: Unbind process address space from device - * @sva_get_pasid: Get PASID associated to a SVA handle * @page_response: handle page request response * @def_domain_type: device default domain type, return value: * - IOMMU_DOMAIN_IDENTITY: must use an identity domain @@ -248,11 +245,6 @@ struct iommu_ops { int (*dev_enable_feat)(struct device *dev, enum iommu_dev_features f); int (*dev_disable_feat)(struct device *dev, enum iommu_dev_features f); =20 - struct iommu_sva *(*sva_bind)(struct device *dev, struct mm_struct *mm, - void *drvdata); - void (*sva_unbind)(struct iommu_sva *handle); - u32 (*sva_get_pasid)(struct iommu_sva *handle); - int (*page_response)(struct device *dev, struct iommu_fault_event *evt, struct iommu_page_response *msg); diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.h index 7631c00fdcbd..2513309ec0db 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h @@ -754,10 +754,6 @@ bool arm_smmu_master_sva_enabled(struct arm_smmu_maste= r *master); int arm_smmu_master_enable_sva(struct arm_smmu_master *master); int arm_smmu_master_disable_sva(struct arm_smmu_master *master); bool arm_smmu_master_iopf_supported(struct arm_smmu_master *master); -struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *= mm, - void *drvdata); -void arm_smmu_sva_unbind(struct iommu_sva *handle); -u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); void arm_smmu_sva_notifier_synchronize(void); int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t id); @@ -794,19 +790,6 @@ static inline bool arm_smmu_master_iopf_supported(stru= ct arm_smmu_master *master return false; } =20 -static inline struct iommu_sva * -arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void *drvdata) -{ - return ERR_PTR(-ENODEV); -} - -static inline void arm_smmu_sva_unbind(struct iommu_sva *handle) {} - -static inline u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle) -{ - return IOMMU_PASID_INVALID; -} - static inline void arm_smmu_sva_notifier_synchronize(void) {} =20 static inline int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domai= n, diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 1e114b9dc17f..3537a2291d7c 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -351,42 +351,6 @@ __arm_smmu_sva_bind(struct device *dev, struct mm_stru= ct *mm) return ERR_PTR(ret); } =20 -struct iommu_sva * -arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm, void *drvdata) -{ - struct iommu_sva *handle; - struct iommu_domain *domain =3D iommu_get_domain_for_dev(dev); - struct arm_smmu_domain *smmu_domain =3D to_smmu_domain(domain); - - if (smmu_domain->stage !=3D ARM_SMMU_DOMAIN_S1) - return ERR_PTR(-EINVAL); - - mutex_lock(&sva_lock); - handle =3D __arm_smmu_sva_bind(dev, mm); - mutex_unlock(&sva_lock); - return handle; -} - -void arm_smmu_sva_unbind(struct iommu_sva *handle) -{ - struct arm_smmu_bond *bond =3D sva_to_bond(handle); - - mutex_lock(&sva_lock); - if (refcount_dec_and_test(&bond->refs)) { - list_del(&bond->list); - arm_smmu_mmu_notifier_put(bond->smmu_mn); - kfree(bond); - } - mutex_unlock(&sva_lock); -} - -u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle) -{ - struct arm_smmu_bond *bond =3D sva_to_bond(handle); - - return bond->mm->pasid; -} - bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) { unsigned long reg, fld; diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 2e9d3cd30510..026b783d602f 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2864,9 +2864,6 @@ static struct iommu_ops arm_smmu_ops =3D { .dev_feat_enabled =3D arm_smmu_dev_feature_enabled, .dev_enable_feat =3D arm_smmu_dev_enable_feature, .dev_disable_feat =3D arm_smmu_dev_disable_feature, - .sva_bind =3D arm_smmu_sva_bind, - .sva_unbind =3D arm_smmu_sva_unbind, - .sva_get_pasid =3D arm_smmu_sva_get_pasid, .page_response =3D arm_smmu_page_response, .pgsize_bitmap =3D -1UL, /* Restricted during device attach */ .owner =3D THIS_MODULE, diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index d55dca3eacf8..8781305b9a02 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4892,9 +4892,6 @@ const struct iommu_ops intel_iommu_ops =3D { .def_domain_type =3D device_def_domain_type, .pgsize_bitmap =3D SZ_4K, #ifdef CONFIG_INTEL_IOMMU_SVM - .sva_bind =3D intel_svm_bind, - .sva_unbind =3D intel_svm_unbind, - .sva_get_pasid =3D intel_svm_get_pasid, .page_response =3D intel_svm_page_response, #endif .default_domain_ops =3D &(const struct iommu_domain_ops) { diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index b9f4dd7057d1..7a43ed4c0a27 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -313,14 +313,6 @@ static int pasid_to_svm_sdev(struct device *dev, unsig= ned int pasid, return 0; } =20 -static int intel_svm_alloc_pasid(struct device *dev, struct mm_struct *mm) -{ - ioasid_t max_pasid =3D dev_is_pci(dev) ? - pci_max_pasids(to_pci_dev(dev)) : intel_pasid_max_id; - - return iommu_sva_alloc_pasid(mm, PASID_MIN, max_pasid - 1); -} - static struct iommu_sva *intel_svm_bind_mm(struct intel_iommu *iommu, struct device *dev, struct mm_struct *mm) @@ -810,47 +802,6 @@ static irqreturn_t prq_event_thread(int irq, void *d) return IRQ_RETVAL(handled); } =20 -struct iommu_sva *intel_svm_bind(struct device *dev, struct mm_struct *mm,= void *drvdata) -{ - struct intel_iommu *iommu =3D device_to_iommu(dev, NULL, NULL); - struct iommu_sva *sva; - int ret; - - mutex_lock(&pasid_mutex); - ret =3D intel_svm_alloc_pasid(dev, mm); - if (ret) { - mutex_unlock(&pasid_mutex); - return ERR_PTR(ret); - } - - sva =3D intel_svm_bind_mm(iommu, dev, mm); - mutex_unlock(&pasid_mutex); - - return sva; -} - -void intel_svm_unbind(struct iommu_sva *sva) -{ - struct intel_svm_dev *sdev =3D to_intel_svm_dev(sva); - - mutex_lock(&pasid_mutex); - intel_svm_unbind_mm(sdev->dev, sdev->pasid); - mutex_unlock(&pasid_mutex); -} - -u32 intel_svm_get_pasid(struct iommu_sva *sva) -{ - struct intel_svm_dev *sdev; - u32 pasid; - - mutex_lock(&pasid_mutex); - sdev =3D to_intel_svm_dev(sva); - pasid =3D sdev->pasid; - mutex_unlock(&pasid_mutex); - - return pasid; -} - int intel_svm_page_response(struct device *dev, struct iommu_fault_event *evt, struct iommu_page_response *msg) --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92015C433F5 for ; Sun, 20 Mar 2022 06:44:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244909AbiCTGp5 (ORCPT ); Sun, 20 Mar 2022 02:45:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244895AbiCTGox (ORCPT ); Sun, 20 Mar 2022 02:44:53 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA598DCA for ; Sat, 19 Mar 2022 23:43:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758590; x=1679294590; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e9Arp02M+Z+kYGcAnrD0NPhVZDhy+//PQc/OW3MJBzw=; b=W9KmMWEFPoQSbBg+/5ncuT4Fn+CZoZDAa0GoM4Pq4Vm7Zp369pGu9T1P lz7zHGcFwTONOfC/a2qoBMipN3oPwOyV1dGifGRHt6xhh+k6bPMOtcWKM 6101tr0qIj8+rnyv6ldwUyPBrEepVatvpNh24I+sB3C6sn8cPT8ibWxMG ZzmkbPmvpannPE++eJzsoxm5VWegQDUuz99GiDAGhOgI8k1L/7MzfBmc3 XbnqP4KnQA3zkdwNTn8ZhyNqjvsCWXgKhvvHIV/Z85UJ7HCjhv1PyWT4B D0NO2ISb0u1YI9byE90uq7i2VnLjzU50VAr/9iKhoFV/b0pPX7NlE4chK g==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924038" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924038" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:43:07 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839952" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:43:03 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 08/11] iommu: Handle IO page faults directly Date: Sun, 20 Mar 2022 14:40:27 +0800 Message-Id: <20220320064030.2936936-9-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Directly call the IO page fault handler in iommu_report_device_fault() unless the device driver registered its own page fault handler. There is no need to explicitly register the fault handler in IOMMU drivers. Signed-off-by: Lu Baolu --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 13 +------------ drivers/iommu/intel/iommu.c | 14 ++------------ drivers/iommu/iommu.c | 11 ++++++++--- 3 files changed, 11 insertions(+), 27 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 3537a2291d7c..8497425f3c13 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -426,7 +426,6 @@ bool arm_smmu_master_sva_enabled(struct arm_smmu_master= *master) =20 static int arm_smmu_master_sva_enable_iopf(struct arm_smmu_master *master) { - int ret; struct device *dev =3D master->dev; =20 /* @@ -439,16 +438,7 @@ static int arm_smmu_master_sva_enable_iopf(struct arm_= smmu_master *master) if (!master->iopf_enabled) return -EINVAL; =20 - ret =3D iopf_queue_add_device(master->smmu->evtq.iopf, dev); - if (ret) - return ret; - - ret =3D iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev); - if (ret) { - iopf_queue_remove_device(master->smmu->evtq.iopf, dev); - return ret; - } - return 0; + return iopf_queue_add_device(master->smmu->evtq.iopf, dev); } =20 static void arm_smmu_master_sva_disable_iopf(struct arm_smmu_master *maste= r) @@ -458,7 +448,6 @@ static void arm_smmu_master_sva_disable_iopf(struct arm= _smmu_master *master) if (!master->iopf_enabled) return; =20 - iommu_unregister_device_fault_handler(dev); iopf_queue_remove_device(master->smmu->evtq.iopf, dev); } =20 diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 8781305b9a02..8f9cc66787c3 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4760,7 +4760,6 @@ static int intel_iommu_enable_sva(struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu; - int ret; =20 if (!info || dmar_disabled) return -EINVAL; @@ -4778,24 +4777,15 @@ static int intel_iommu_enable_sva(struct device *de= v) if (!info->pasid_enabled || !info->pri_enabled || !info->ats_enabled) return -EINVAL; =20 - ret =3D iopf_queue_add_device(iommu->iopf_queue, dev); - if (!ret) - ret =3D iommu_register_device_fault_handler(dev, iommu_queue_iopf, dev); - - return ret; + return iopf_queue_add_device(iommu->iopf_queue, dev); } =20 static int intel_iommu_disable_sva(struct device *dev) { struct device_domain_info *info =3D dev_iommu_priv_get(dev); struct intel_iommu *iommu =3D info->iommu; - int ret; - - ret =3D iommu_unregister_device_fault_handler(dev); - if (!ret) - ret =3D iopf_queue_remove_device(iommu->iopf_queue, dev); =20 - return ret; + return iopf_queue_remove_device(iommu->iopf_queue, dev); } =20 static int intel_iommu_enable_iopf(struct device *dev) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index c0966fc9b686..4f90b71c6f6e 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -27,6 +27,8 @@ #include #include =20 +#include "iommu-sva-lib.h" + static struct kset *iommu_group_kset; static DEFINE_IDA(iommu_group_ida); =20 @@ -1177,10 +1179,9 @@ int iommu_report_device_fault(struct device *dev, st= ruct iommu_fault_event *evt) if (!param || !evt) return -EINVAL; =20 - /* we only report device fault if there is a handler registered */ mutex_lock(¶m->lock); fparam =3D param->fault_param; - if (!fparam || !fparam->handler) { + if (!fparam) { ret =3D -EINVAL; goto done_unlock; } @@ -1198,7 +1199,11 @@ int iommu_report_device_fault(struct device *dev, st= ruct iommu_fault_event *evt) mutex_unlock(&fparam->lock); } =20 - ret =3D fparam->handler(&evt->fault, fparam->data); + if (fparam->handler) + ret =3D fparam->handler(&evt->fault, fparam->data); + else + ret =3D iommu_queue_iopf(&evt->fault, fparam->data); + if (ret && evt_pending) { mutex_lock(&fparam->lock); list_del(&evt_pending->list); --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 664C4C433EF for ; Sun, 20 Mar 2022 06:43:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S244939AbiCTGpS (ORCPT ); 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X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924040" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924040" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:43:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839965" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:43:07 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 09/11] iommu: Add iommu_get_domain_for_dev_pasid() Date: Sun, 20 Mar 2022 14:40:28 +0800 Message-Id: <20220320064030.2936936-10-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This adds a helper to retrieve the iommu_domain which has been attached to a {device, pasid}. One usage scenario of this helper exists in the I/O page fault handling framework, where {device, pasid} was reported by hardware, and software needs to retrieve the attached domain for further routing. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 8 ++++++++ drivers/iommu/iommu.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 47c9aa5aa9c8..803e7b07605e 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -676,6 +676,8 @@ int iommu_attach_device_pasid(struct iommu_domain *doma= in, struct device *dev, ioasid_t pasid); void iommu_detach_device_pasid(struct iommu_domain *domain, struct device *dev, ioasid_t pasid); +struct iommu_domain * +iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid); =20 #else /* CONFIG_IOMMU_API */ =20 @@ -1041,6 +1043,12 @@ static inline void iommu_detach_device_pasid(struct = iommu_domain *domain, struct device *dev, ioasid_t pasid) { } + +static inline struct iommu_domain * +iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid) +{ + return NULL; +} #endif /* CONFIG_IOMMU_API */ =20 #ifdef CONFIG_IOMMU_SVA diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 4f90b71c6f6e..508fdcabda5c 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -40,6 +40,7 @@ struct iommu_group { struct kobject kobj; struct kobject *devices_kobj; struct list_head devices; + struct xarray pasid_array; struct mutex mutex; void *iommu_data; void (*iommu_data_release)(void *iommu_data); @@ -632,6 +633,7 @@ struct iommu_group *iommu_group_alloc(void) mutex_init(&group->mutex); INIT_LIST_HEAD(&group->devices); INIT_LIST_HEAD(&group->entry); + xa_init(&group->pasid_array); =20 ret =3D ida_simple_get(&iommu_group_ida, 0, 0, GFP_KERNEL); if (ret < 0) { @@ -3086,6 +3088,7 @@ int iommu_attach_device_pasid(struct iommu_domain *do= main, { struct iommu_group *group; int ret =3D -EINVAL; + void *curr; =20 if (!domain->ops->attach_dev_pasid) return -EINVAL; @@ -3098,7 +3101,16 @@ int iommu_attach_device_pasid(struct iommu_domain *d= omain, if (iommu_group_device_count(group) !=3D 1) goto out_unlock; =20 + xa_lock(&group->pasid_array); + curr =3D __xa_cmpxchg(&group->pasid_array, pasid, NULL, + domain, GFP_KERNEL); + xa_unlock(&group->pasid_array); + if (curr) + goto out_unlock; + ret =3D domain->ops->attach_dev_pasid(domain, dev, pasid); + if (ret) + xa_erase(&group->pasid_array, pasid); =20 out_unlock: mutex_unlock(&group->mutex); @@ -3118,6 +3130,25 @@ void iommu_detach_device_pasid(struct iommu_domain *= domain, =20 mutex_lock(&group->mutex); domain->ops->detach_dev_pasid(domain, dev, pasid); + xa_erase(&group->pasid_array, pasid); + mutex_unlock(&group->mutex); + iommu_group_put(group); +} + +struct iommu_domain * +iommu_get_domain_for_dev_pasid(struct device *dev, ioasid_t pasid) +{ + struct iommu_domain *domain; + struct iommu_group *group; + + group =3D iommu_group_get(dev); + if (!group) + return NULL; + + mutex_lock(&group->mutex); + domain =3D xa_load(&group->pasid_array, pasid); mutex_unlock(&group->mutex); iommu_group_put(group); + + return domain; } --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 625A0C433F5 for ; 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X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924047" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924047" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:43:14 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839978" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:43:11 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 10/11] iommu: Make IOPF handling framework generic Date: Sun, 20 Mar 2022 14:40:29 +0800 Message-Id: <20220320064030.2936936-11-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The existing IOPF handling framework only handles the I/O page faults for SVA. Ginven that we are able to link iommu domain with each I/O page fault, we can now make the I/O page fault handling framework more general for more types of page faults. Signed-off-by: Lu Baolu --- include/linux/iommu.h | 4 +++ drivers/iommu/io-pgfault.c | 67 ++++++----------------------------- drivers/iommu/iommu-sva-lib.c | 59 ++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+), 57 deletions(-) diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 803e7b07605e..11c65a7bed88 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -50,6 +50,8 @@ struct iommu_dma_cookie; typedef int (*iommu_fault_handler_t)(struct iommu_domain *, struct device *, unsigned long, int, void *); typedef int (*iommu_dev_fault_handler_t)(struct iommu_fault *, void *); +typedef enum iommu_page_response_code (*iommu_domain_iopf_handler_t) + (struct iommu_fault *, void *); =20 struct iommu_domain_geometry { dma_addr_t aperture_start; /* First address that can be mapped */ @@ -101,6 +103,8 @@ struct iommu_domain { struct iommu_domain_geometry geometry; struct iommu_dma_cookie *iova_cookie; struct mm_struct *sva_cookie; + iommu_domain_iopf_handler_t fault_handler; + void *fault_data; }; =20 static inline bool iommu_is_dma_domain(struct iommu_domain *domain) diff --git a/drivers/iommu/io-pgfault.c b/drivers/iommu/io-pgfault.c index 1df8c1dcae77..dad0e40cd8d2 100644 --- a/drivers/iommu/io-pgfault.c +++ b/drivers/iommu/io-pgfault.c @@ -69,62 +69,6 @@ static int iopf_complete_group(struct device *dev, struc= t iopf_fault *iopf, return iommu_page_response(dev, &resp); } =20 -static enum iommu_page_response_code -iopf_handle_single(struct iopf_fault *iopf) -{ - vm_fault_t ret; - struct mm_struct *mm; - struct vm_area_struct *vma; - unsigned int access_flags =3D 0; - unsigned int fault_flags =3D FAULT_FLAG_REMOTE; - struct iommu_fault_page_request *prm =3D &iopf->fault.prm; - enum iommu_page_response_code status =3D IOMMU_PAGE_RESP_INVALID; - - if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID)) - return status; - - mm =3D iommu_sva_find(prm->pasid); - if (IS_ERR_OR_NULL(mm)) - return status; - - mmap_read_lock(mm); - - vma =3D find_extend_vma(mm, prm->addr); - if (!vma) - /* Unmapped area */ - goto out_put_mm; - - if (prm->perm & IOMMU_FAULT_PERM_READ) - access_flags |=3D VM_READ; - - if (prm->perm & IOMMU_FAULT_PERM_WRITE) { - access_flags |=3D VM_WRITE; - fault_flags |=3D FAULT_FLAG_WRITE; - } - - if (prm->perm & IOMMU_FAULT_PERM_EXEC) { - access_flags |=3D VM_EXEC; - fault_flags |=3D FAULT_FLAG_INSTRUCTION; - } - - if (!(prm->perm & IOMMU_FAULT_PERM_PRIV)) - fault_flags |=3D FAULT_FLAG_USER; - - if (access_flags & ~vma->vm_flags) - /* Access fault */ - goto out_put_mm; - - ret =3D handle_mm_fault(vma, prm->addr, fault_flags, NULL); - status =3D ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID : - IOMMU_PAGE_RESP_SUCCESS; - -out_put_mm: - mmap_read_unlock(mm); - mmput(mm); - - return status; -} - static void iopf_handle_group(struct work_struct *work) { struct iopf_group *group; @@ -134,12 +78,21 @@ static void iopf_handle_group(struct work_struct *work) group =3D container_of(work, struct iopf_group, work); =20 list_for_each_entry_safe(iopf, next, &group->faults, list) { + struct iommu_domain *domain; + + domain =3D iommu_get_domain_for_dev_pasid(group->dev, + iopf->fault.prm.pasid); + + if (!domain || !domain->fault_handler) + status =3D IOMMU_PAGE_RESP_INVALID; + /* * For the moment, errors are sticky: don't handle subsequent * faults in the group if there is an error. */ if (status =3D=3D IOMMU_PAGE_RESP_SUCCESS) - status =3D iopf_handle_single(iopf); + status =3D domain->fault_handler(&iopf->fault, + domain->fault_data); =20 if (!(iopf->fault.prm.flags & IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE)) diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva-lib.c index 47cf98e661ff..01fa8096bd02 100644 --- a/drivers/iommu/iommu-sva-lib.c +++ b/drivers/iommu/iommu-sva-lib.c @@ -87,6 +87,63 @@ static struct iommu_domain *iommu_sva_domain_alloc(struc= t device *dev) return domain; } =20 +static enum iommu_page_response_code +iommu_sva_handle_iopf(struct iommu_fault *fault, void *data) +{ + vm_fault_t ret; + struct mm_struct *mm; + struct vm_area_struct *vma; + unsigned int access_flags =3D 0; + struct iommu_domain *domain =3D data; + unsigned int fault_flags =3D FAULT_FLAG_REMOTE; + struct iommu_fault_page_request *prm =3D &fault->prm; + enum iommu_page_response_code status =3D IOMMU_PAGE_RESP_INVALID; + + if (!(prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID)) + return status; + + mm =3D domain->sva_cookie; + if (IS_ERR_OR_NULL(mm)) + return status; + + mmap_read_lock(mm); + + vma =3D find_extend_vma(mm, prm->addr); + if (!vma) + /* Unmapped area */ + goto out_put_mm; + + if (prm->perm & IOMMU_FAULT_PERM_READ) + access_flags |=3D VM_READ; + + if (prm->perm & IOMMU_FAULT_PERM_WRITE) { + access_flags |=3D VM_WRITE; + fault_flags |=3D FAULT_FLAG_WRITE; + } + + if (prm->perm & IOMMU_FAULT_PERM_EXEC) { + access_flags |=3D VM_EXEC; + fault_flags |=3D FAULT_FLAG_INSTRUCTION; + } + + if (!(prm->perm & IOMMU_FAULT_PERM_PRIV)) + fault_flags |=3D FAULT_FLAG_USER; + + if (access_flags & ~vma->vm_flags) + /* Access fault */ + goto out_put_mm; + + ret =3D handle_mm_fault(vma, prm->addr, fault_flags, NULL); + status =3D ret & VM_FAULT_ERROR ? IOMMU_PAGE_RESP_INVALID : + IOMMU_PAGE_RESP_SUCCESS; + +out_put_mm: + mmap_read_unlock(mm); + mmput(mm); + + return status; +} + /** * iommu_sva_bind_device() - Bind a process address space to a device * @dev: the device @@ -124,6 +181,8 @@ iommu_sva_bind_device(struct device *dev, struct mm_str= uct *mm, void *drvdata) goto out; } domain->sva_cookie =3D mm; + domain->fault_handler =3D iommu_sva_handle_iopf; + domain->fault_data =3D domain; =20 ret =3D iommu_attach_device_pasid(domain, dev, mm->pasid); if (ret) --=20 2.25.1 From nobody Mon Jun 22 18:08:54 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27EFBC433F5 for ; Sun, 20 Mar 2022 06:44:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239394AbiCTGpc (ORCPT ); Sun, 20 Mar 2022 02:45:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244925AbiCTGoy (ORCPT ); Sun, 20 Mar 2022 02:44:54 -0400 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31555DE83 for ; Sat, 19 Mar 2022 23:43:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1647758600; x=1679294600; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=0X2YVzf+sDfeu2kx9NB2Zauu7zoYmAaJE6MiIXyRrhs=; b=b9opBdruBU0aX43zPMcEwIO+OFkUsVXzi0Uxu2DJ2OKzix6zuUZhZeQH fF0UbrSDngnjAd1imaK9bS1jEl0URpXYEgAvcMZn91epY8waEHctIWrIm vgFOYglN3aq/xo7E0a2N+EMGLa6EV2r8syNsbpuwiQsImR0JPdhsPCk9S 3It1xLtiUvMSVCNAm0PeOD14/visc0n+FA97tkReCV6TJwpVbzyRSuUgx wdT35KK9ez+3l+Bq90wUPxJ8mjtC9B7V7FukEcQRtmEW9j+YlFBYwPPLO YP8pC0P1ddxDJydQabwmFL3OBMFhnm5i4TMLm5oqxsF0jbIkKujKcztbF Q==; X-IronPort-AV: E=McAfee;i="6200,9189,10291"; a="254924059" X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="254924059" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 19 Mar 2022 23:43:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.90,195,1643702400"; d="scan'208";a="691839984" Received: from allen-box.sh.intel.com ([10.239.159.48]) by fmsmga001.fm.intel.com with ESMTP; 19 Mar 2022 23:43:14 -0700 From: Lu Baolu To: Joerg Roedel , Jason Gunthorpe , Christoph Hellwig , Kevin Tian , Ashok Raj , Will Deacon , Robin Murphy , Jean-Philippe Brucker Cc: Eric Auger , Liu Yi L , Jacob jun Pan , iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Lu Baolu Subject: [PATCH RFC 11/11] iommu: Rename iommu-sva-lib.{c,h} Date: Sun, 20 Mar 2022 14:40:30 +0800 Message-Id: <20220320064030.2936936-12-baolu.lu@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220320064030.2936936-1-baolu.lu@linux.intel.com> References: <20220320064030.2936936-1-baolu.lu@linux.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Rename iommu-sva-lib.c[h] to iommu-sva.c[h] as it contains all code for SVA implementation in iommu core. Signed-off-by: Lu Baolu --- drivers/iommu/{iommu-sva-lib.h =3D> iommu-sva.h} | 0 drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 2 +- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 +- drivers/iommu/intel/iommu.c | 2 +- drivers/iommu/intel/svm.c | 2 +- drivers/iommu/io-pgfault.c | 2 +- drivers/iommu/{iommu-sva-lib.c =3D> iommu-sva.c} | 2 +- drivers/iommu/iommu.c | 2 +- drivers/iommu/Makefile | 2 +- 9 files changed, 8 insertions(+), 8 deletions(-) rename drivers/iommu/{iommu-sva-lib.h =3D> iommu-sva.h} (100%) rename drivers/iommu/{iommu-sva-lib.c =3D> iommu-sva.c} (99%) diff --git a/drivers/iommu/iommu-sva-lib.h b/drivers/iommu/iommu-sva.h similarity index 100% rename from drivers/iommu/iommu-sva-lib.h rename to drivers/iommu/iommu-sva.h diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iomm= u/arm/arm-smmu-v3/arm-smmu-v3-sva.c index 8497425f3c13..a6505a6619f8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c @@ -9,7 +9,7 @@ #include =20 #include "arm-smmu-v3.h" -#include "../../iommu-sva-lib.h" +#include "../../iommu-sva.h" #include "../../io-pgtable-arm.h" =20 struct arm_smmu_mmu_notifier { diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/ar= m/arm-smmu-v3/arm-smmu-v3.c index 026b783d602f..62de69a01456 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -31,7 +31,7 @@ #include =20 #include "arm-smmu-v3.h" -#include "../../iommu-sva-lib.h" +#include "../../iommu-sva.h" =20 static bool disable_bypass =3D true; module_param(disable_bypass, bool, 0444); diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 8f9cc66787c3..0a46b3b923eb 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -27,7 +27,7 @@ #include =20 #include "../irq_remapping.h" -#include "../iommu-sva-lib.h" +#include "../iommu-sva.h" #include "pasid.h" #include "cap_audit.h" =20 diff --git a/drivers/iommu/intel/svm.c b/drivers/iommu/intel/svm.c index 7a43ed4c0a27..4195ea9aad5f 100644 --- a/drivers/iommu/intel/svm.c +++ b/drivers/iommu/intel/svm.c @@ -25,7 +25,7 @@ =20 #include "pasid.h" #include "perf.h" -#include "../iommu-sva-lib.h" +#include "../iommu-sva.h" =20 static irqreturn_t prq_event_thread(int irq, void *d); static void intel_svm_drain_prq(struct device *dev, u32 pasid); diff --git a/drivers/iommu/io-pgfault.c b/drivers/iommu/io-pgfault.c index dad0e40cd8d2..c162d9d2a5c9 100644 --- a/drivers/iommu/io-pgfault.c +++ b/drivers/iommu/io-pgfault.c @@ -11,7 +11,7 @@ #include #include =20 -#include "iommu-sva-lib.h" +#include "iommu-sva.h" =20 /** * struct iopf_queue - IO Page Fault queue diff --git a/drivers/iommu/iommu-sva-lib.c b/drivers/iommu/iommu-sva.c similarity index 99% rename from drivers/iommu/iommu-sva-lib.c rename to drivers/iommu/iommu-sva.c index 01fa8096bd02..8b92ce4b0807 100644 --- a/drivers/iommu/iommu-sva-lib.c +++ b/drivers/iommu/iommu-sva.c @@ -7,7 +7,7 @@ #include #include =20 -#include "iommu-sva-lib.h" +#include "iommu-sva.h" =20 static DEFINE_MUTEX(iommu_sva_lock); static DECLARE_IOASID_SET(iommu_sva_pasid); diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 508fdcabda5c..0b5f0eee3ca6 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -27,7 +27,7 @@ #include #include =20 -#include "iommu-sva-lib.h" +#include "iommu-sva.h" =20 static struct kset *iommu_group_kset; static DEFINE_IDA(iommu_group_ida); diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index 44475a9b3eea..c1763476162b 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -27,6 +27,6 @@ obj-$(CONFIG_FSL_PAMU) +=3D fsl_pamu.o fsl_pamu_domain.o obj-$(CONFIG_S390_IOMMU) +=3D s390-iommu.o obj-$(CONFIG_HYPERV_IOMMU) +=3D hyperv-iommu.o obj-$(CONFIG_VIRTIO_IOMMU) +=3D virtio-iommu.o -obj-$(CONFIG_IOMMU_SVA) +=3D iommu-sva-lib.o io-pgfault.o +obj-$(CONFIG_IOMMU_SVA) +=3D iommu-sva.o io-pgfault.o obj-$(CONFIG_SPRD_IOMMU) +=3D sprd-iommu.o obj-$(CONFIG_APPLE_DART) +=3D apple-dart.o --=20 2.25.1