From nobody Mon Jun 22 19:22:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D5B9C433EF for ; Fri, 18 Mar 2022 01:55:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231630AbiCRB4Q (ORCPT ); Thu, 17 Mar 2022 21:56:16 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231605AbiCRB4M (ORCPT ); Thu, 17 Mar 2022 21:56:12 -0400 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD42F21DF04 for ; Thu, 17 Mar 2022 18:54:54 -0700 (PDT) Received: by mail-pf1-x435.google.com with SMTP id h2so8316907pfh.6 for ; Thu, 17 Mar 2022 18:54:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=U+oN2PkESqB41nkMUnSgEXHs7aUpmXvqHqu6nMf9ygI=; b=e9WddNIUJiPhK0Y81FA/RAxuWrUeVracIXuSi3Py1u61KIblEyW1HbOKaisIMnBTi8 TDwzciOOyCOYx0UUy/P3oZnZ7JJRHI6lzJskdLBCaZK0+h7qSdeVxqLbgaNpoQELVCkU 0zwHRWxvBUzUMAQFsx6V+6ZI0gsKLXAUjhI7g= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=U+oN2PkESqB41nkMUnSgEXHs7aUpmXvqHqu6nMf9ygI=; b=GM+/laTzaEJpSRr48T7Bv/N8noxeBjnNKUG5oy6Ko1nCPt2h6ERY62TRHNPTuTzYiM sR3y7WOhiCE1wq4MWUwMVX5byHauQid0iRla2y6F4+t3EHsHk3OOS+JnFQDJKscTwWMN PH4OsubDYWfR/u52dVOs4zQwwOu7SXCtHIFO0D59L+pY9dUEQEPrAm0ii/QVB44rWSLU FVKWyeCtxvRiNZSInPdCq+pPvRRmQQfhvaF/2Xc0YhU4Le1P9mwIcl52lytQYL69aqC/ cxzlpZuzPmoArlA/XBxOZQeF0z4WZ8j4vR88iSjOSI7BxocjmkukKa6+8/+16Zgzfggb Wiwg== X-Gm-Message-State: AOAM532jMPS6E8yXGo3CR9wbNtzxBIHlpPjeRFCf/I+0pvK/SDfavVF8 Gsl1qF1ubc9SAYBwLrjLSy2z6Q== X-Google-Smtp-Source: ABdhPJw+tLB09E1yBm6TENEEbz+loQSPysQXCshfbFNSGsjCJDorbQbkjCs89FjWuc0TJkwWng5j9Q== X-Received: by 2002:a65:45c8:0:b0:380:352e:825b with SMTP id m8-20020a6545c8000000b00380352e825bmr5937245pgr.509.1647568494348; Thu, 17 Mar 2022 18:54:54 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:49cf:7701:359e:b28f]) by smtp.gmail.com with ESMTPSA id u10-20020a056a00124a00b004f783abfa0esm8050201pfi.28.2022.03.17.18.54.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 18:54:53 -0700 (PDT) From: Stephen Boyd To: Benson Leung Cc: linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev, Rob Herring , devicetree@vger.kernel.org, Guenter Roeck , Douglas Anderson , Craig Hesling , Tom Hughes , Alexandru M Stan , Tzung-Bi Shih , Matthias Kaehlcke Subject: [PATCH v3 1/3] dt-bindings: chrome: Add ChromeOS fingerprint binding Date: Thu, 17 Mar 2022 18:54:48 -0700 Message-Id: <20220318015451.2869388-2-swboyd@chromium.org> X-Mailer: git-send-email 2.35.1.894.gb6a874cedc-goog In-Reply-To: <20220318015451.2869388-1-swboyd@chromium.org> References: <20220318015451.2869388-1-swboyd@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add a binding to describe the fingerprint processor found on Chromebooks with a fingerprint sensor. Cc: Rob Herring Cc: Cc: Guenter Roeck Cc: Douglas Anderson Cc: Craig Hesling Cc: Tom Hughes Cc: Alexandru M Stan Cc: Tzung-Bi Shih Cc: Matthias Kaehlcke Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson --- .../bindings/chrome/google,cros-ec-fp.yaml | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 Documentation/devicetree/bindings/chrome/google,cros-ec= -fp.yaml diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-fp.yam= l b/Documentation/devicetree/bindings/chrome/google,cros-ec-fp.yaml new file mode 100644 index 000000000000..b7fbaaa94d65 --- /dev/null +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-fp.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/chrome/google,cros-ec-fp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ChromeOS Embedded Fingerprint Controller + +description: + Google's ChromeOS embedded fingerprint controller is a device which + implements fingerprint functionality such as unlocking a Chromebook + without typing a password. + +maintainers: + - Tom Hughes + +properties: + compatible: + const: google,cros-ec-fp + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 3000000 + + interrupts: + maxItems: 1 + + reset-gpios: true + boot0-gpios: + maxItems: 1 + description: Assert for bootloader mode. + + vdd-supply: true + +required: + - compatible + - reg + - interrupts + - reset-gpios + - boot0-gpios + - vdd-supply + - spi-max-frequency + +additionalProperties: false + +examples: + - | + #include + #include + spi { + #address-cells =3D <0x1>; + #size-cells =3D <0x0>; + ec@0 { + compatible =3D "google,cros-ec-fp"; + reg =3D <0>; + interrupt-parent =3D <&gpio_controller>; + interrupts =3D <4 IRQ_TYPE_LEVEL_LOW>; + spi-max-frequency =3D <3000000>; + reset-gpios =3D <&gpio_controller 5 GPIO_ACTIVE_LOW>; + boot0-gpios =3D <&gpio_controller 10 GPIO_ACTIVE_HIGH>; + vdd-supply =3D <&pp3300_fp_mcu>; + }; + }; +... --=20 https://chromeos.dev From nobody Mon Jun 22 19:22:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46D70C433EF for ; Fri, 18 Mar 2022 01:55:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231649AbiCRB4U (ORCPT ); Thu, 17 Mar 2022 21:56:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230315AbiCRB4N (ORCPT ); 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charset="utf-8" Add the fingerprint cros-ec compatible and spi_device_id so that we can pro= be fingerprint devices. Cc: Guenter Roeck Cc: Douglas Anderson Cc: Craig Hesling Cc: Tom Hughes Cc: Alexandru M Stan Cc: Tzung-Bi Shih Reviewed-by: Matthias Kaehlcke Signed-off-by: Stephen Boyd Reviewed-by: Douglas Anderson --- drivers/platform/chrome/cros_ec_spi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrom= e/cros_ec_spi.c index 14c4046fa04d..d0f9496076d6 100644 --- a/drivers/platform/chrome/cros_ec_spi.c +++ b/drivers/platform/chrome/cros_ec_spi.c @@ -813,12 +813,14 @@ static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_= spi_suspend, cros_ec_spi_resume); =20 static const struct of_device_id cros_ec_spi_of_match[] =3D { + { .compatible =3D "google,cros-ec-fp", }, { .compatible =3D "google,cros-ec-spi", }, { /* sentinel */ }, }; MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match); =20 static const struct spi_device_id cros_ec_spi_id[] =3D { + { "cros-ec-fp", 0 }, { "cros-ec-spi", 0 }, { } }; --=20 https://chromeos.dev From nobody Mon Jun 22 19:22:47 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23178C433F5 for ; Fri, 18 Mar 2022 01:55:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231637AbiCRB4Y (ORCPT ); Thu, 17 Mar 2022 21:56:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231622AbiCRB4O (ORCPT ); Thu, 17 Mar 2022 21:56:14 -0400 Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEF3D21C049 for ; Thu, 17 Mar 2022 18:54:56 -0700 (PDT) Received: by mail-pl1-x62c.google.com with SMTP id w8so5901593pll.10 for ; Thu, 17 Mar 2022 18:54:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rxw3CHXEYejW4ccJG856QD+F55RYD67woHuYROci7qY=; b=gdTMA0vCi7X9A9ohLapQh8US+e2d60RkEr7Ib9edeaFroKoB6x/9n4A2lU7+WQAyHN RG3T/kFfoEUYbF+516owpmIn1SCozFbWiENSEdpZZy9ic7B3fct2h/MsymuMu6CSprIN vvMEKt/rUdC02qRyHrDTf7YBzfefl9DjJ/0Pc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rxw3CHXEYejW4ccJG856QD+F55RYD67woHuYROci7qY=; b=eSzz+H5uaOxRWjwVONEOa6neqzpGyjYfYnaWBfTwqPO+TkYCVpOWd/Cziii5F5JqnR nbGcaPkmsD5ByfyAAB+1Pe/Gy5Yi3pAwIMl7kPD2ylGTYMzmoGRt3D8VkUfLuG5HOkXx /rUvExlD0FoZ9klEf5kHEp1yQ9HZdAjAjp9uHgG8uLpgLnE0BzJiom9Ng4gZ63LfVO8o ik+AoJHVYH24L/GcuYwjOCP5BJOFBaDdfDCbZdC+Tz4fvnx0hGslwcxtyAS6HRgkheOo qC3LVi0WME1IzYV9/y8DOcx+VAqR57pZQsd4EnuKeLvCCqqrMtOagKI12tPm3fnRos2u Z2dQ== X-Gm-Message-State: AOAM5312isdoR/MRsQtn6aVXsZuw6whbmtprqjkoZE9sAblDG/L3E1Hn PMc3QbVINQqjfv+d8aPfwy7hkwsGw2PsMw== X-Google-Smtp-Source: ABdhPJzsh0bkMdgCWzUa/NDTDzi6Tr0Yq5+hHOgXzbSg+iFkiCEFp5CxVi6Hfu8LOVgcVvbVf8NmmA== X-Received: by 2002:a17:902:f686:b0:151:d866:f657 with SMTP id l6-20020a170902f68600b00151d866f657mr7708777plg.112.1647568496456; Thu, 17 Mar 2022 18:54:56 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:201:49cf:7701:359e:b28f]) by smtp.gmail.com with ESMTPSA id u10-20020a056a00124a00b004f783abfa0esm8050201pfi.28.2022.03.17.18.54.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Mar 2022 18:54:56 -0700 (PDT) From: Stephen Boyd To: Benson Leung Cc: linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev, Guenter Roeck , Douglas Anderson , Craig Hesling , Tom Hughes , Alexandru M Stan , Tzung-Bi Shih , Matthias Kaehlcke Subject: [PATCH v3 3/3] platform/chrome: cros_ec_spi: Boot fingerprint processor during probe Date: Thu, 17 Mar 2022 18:54:50 -0700 Message-Id: <20220318015451.2869388-4-swboyd@chromium.org> X-Mailer: git-send-email 2.35.1.894.gb6a874cedc-goog In-Reply-To: <20220318015451.2869388-1-swboyd@chromium.org> References: <20220318015451.2869388-1-swboyd@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add gpio control to this driver so that the fingerprint device can be booted if the BIOS isn't doing it already. This eases bringup of new hardware as we don't have to wait for the BIOS to be ready, supports kexec where the GPIOs may not be configured by the previous boot stage, and is all around good hygiene because we control GPIOs for this device from the device driver. Cc: Guenter Roeck Cc: Douglas Anderson Cc: Craig Hesling Cc: Tom Hughes Cc: Alexandru M Stan Cc: Tzung-Bi Shih Reviewed-by: Matthias Kaehlcke Signed-off-by: Stephen Boyd --- drivers/platform/chrome/cros_ec_spi.c | 42 +++++++++++++++++++++++++-- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_spi.c b/drivers/platform/chrom= e/cros_ec_spi.c index d0f9496076d6..13d413a2fe46 100644 --- a/drivers/platform/chrome/cros_ec_spi.c +++ b/drivers/platform/chrome/cros_ec_spi.c @@ -4,6 +4,7 @@ // Copyright (C) 2012 Google, Inc =20 #include +#include #include #include #include @@ -77,6 +78,8 @@ struct cros_ec_spi { unsigned int start_of_msg_delay; unsigned int end_of_msg_delay; struct kthread_worker *high_pri_worker; + struct gpio_desc *boot0; + struct gpio_desc *reset; }; =20 typedef int (*cros_ec_xfer_fn_t) (struct cros_ec_device *ec_dev, @@ -690,7 +693,7 @@ static int cros_ec_cmd_xfer_spi(struct cros_ec_device *= ec_dev, return cros_ec_xfer_high_pri(ec_dev, ec_msg, do_cros_ec_cmd_xfer_spi); } =20 -static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device= *dev) +static int cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device = *dev) { struct device_node *np =3D dev->of_node; u32 val; @@ -703,6 +706,37 @@ static void cros_ec_spi_dt_probe(struct cros_ec_spi *e= c_spi, struct device *dev) ret =3D of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val); if (!ret) ec_spi->end_of_msg_delay =3D val; + + if (!of_device_is_compatible(np, "google,cros-ec-fp")) + return 0; + + ec_spi->boot0 =3D devm_gpiod_get(dev, "boot0", 0); + if (IS_ERR(ec_spi->boot0)) + return PTR_ERR(ec_spi->boot0); + + ec_spi->reset =3D devm_gpiod_get(dev, "reset", 0); + if (IS_ERR(ec_spi->reset)) + return PTR_ERR(ec_spi->reset); + + /* + * Take the FPMCU out of reset and wait for it to boot if it's in + * bootloader mode or held in reset. This isn't the normal flow because + * typically the BIOS has already powered on the device to avoid the + * multi-second delay waiting for the FPMCU to boot and be responsive. + */ + if (gpiod_get_value(ec_spi->boot0) || gpiod_get_value(ec_spi->reset)) { + /* Boot0 is sampled on reset deassertion */ + gpiod_set_value(ec_spi->boot0, 0); + gpiod_set_value(ec_spi->reset, 1); + usleep_range(1000, 2000); + gpiod_set_value(ec_spi->reset, 0); + + /* Wait for boot; there isn't a "boot done" signal */ + dev_info(dev, "Waiting for FPMCU to boot\n"); + msleep(2000); + } + + return 0; } =20 static void cros_ec_spi_high_pri_release(void *worker) @@ -754,8 +788,10 @@ static int cros_ec_spi_probe(struct spi_device *spi) if (!ec_dev) return -ENOMEM; =20 - /* Check for any DT properties */ - cros_ec_spi_dt_probe(ec_spi, dev); + /* Check for any DT properties and boot FPMCU if applicable */ + err =3D cros_ec_spi_dt_probe(ec_spi, dev); + if (err) + return err; =20 spi_set_drvdata(spi, ec_dev); ec_dev->dev =3D dev; --=20 https://chromeos.dev