From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34AB0C433FE for ; Mon, 14 Mar 2022 16:30:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243016AbiCNQb2 (ORCPT ); Mon, 14 Mar 2022 12:31:28 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238700AbiCNQbZ (ORCPT ); Mon, 14 Mar 2022 12:31:25 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48DD213D1C; Mon, 14 Mar 2022 09:30:14 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id k8-20020a05600c1c8800b003899c7ac55dso9028wms.1; Mon, 14 Mar 2022 09:30:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mm5BPHHve/qDzxBF84siO+rAM1VKpcqsQMTnWzDJDFQ=; b=NFm6j70jtZAWm3BgKx+ZAlXiH6JL5ckNesHN4Hbu5p/ZpKKpDfrs1h9v1UFnbWCXAB uVmK9WvTzP86Hhdk0MgFqIt6X1elglNSg66gJzHKkx0XmI4XMkBYqINeJhTVDv0KEa+x /KmI0cg3rd3BUHfAL7+rYOKl4FqYN5Ts+E2Mp/knvkX2Y1HPRQr/+oOwdAtk2TC3ckwh ZhgiHVCLHttYMY+7e5KLUxFIcL78X0P5kEP4WqNlqfoyEcxFgL3x0sEXWVfd6wI+5+u2 ypeV29SWx+BKw7VcwLqbhFKsF1cE/Ql0KbAoQMQ61hrrFzODEwA/eeB1X407//JjaK3y ydnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mm5BPHHve/qDzxBF84siO+rAM1VKpcqsQMTnWzDJDFQ=; b=l8630tknASrKq1vhMUHa4WiDNoFbp+VzYyrARXp5zMQp7erOAGSn0Yfy2WsHsv17mz GXmO1h/32LJQzSZ1Jbh51roPAMKqfr8973nPt9lb8dhNrVqP8HaA8Dh0Nj7dJasDqChl Fq4bjwcrjSz5pCcaL+J00T3s8SkLqlWck+tmzG51N5GBpdlbawHHfpU1pFivOx71Zq15 /YxNS25VW452P0bOqkwoD+Jud7sN9hSbWE2vKi/uYJ8kJajo8merWMAVfSZgY+V11p9u 8/8ObMRofErVDKHrClbkY9Vade3t0cKeWjtbQeacdu0aWM0jeP4koeCtZXjT1HicYGGz IKPw== X-Gm-Message-State: AOAM531yxoXDWI4OO98dIsBbsILP9/qE1Ud7b3W6yYti0ETQuJcdWtvJ nOl3MxrhDPdUD4bxRLdsbaI= X-Google-Smtp-Source: ABdhPJywK/BLx3YOys/rp6f5E+efWbOOiPp0/7zXiQwgcx1fqiQZl3eQmVe5G6ljwDu2+yuKYSWTQQ== X-Received: by 2002:a05:600c:a53:b0:38a:fc5:3a90 with SMTP id c19-20020a05600c0a5300b0038a0fc53a90mr20448wmq.15.1647275412844; Mon, 14 Mar 2022 09:30:12 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:12 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Alexander Stein , Ariel D'Alessandro , Christoph Niedermaier , Fabio Estevam , Krzysztof Kozlowski , Li Yang , Lucas Stach , Marcel Ziswiler , Matthias Schiffer , Oleksij Rempel , Rob Herring , Sebastian Reichel , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 01/14] dt-bindings: arm: fsl: imx6dl-colibri: Drop dedicated v1.1 bindings Date: Mon, 14 Mar 2022 17:29:45 +0100 Message-Id: <20220314162958.40361-2-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The dedicated device tree for V1.1 modules has been dropped. Remove its bindings too. Signed-off-by: Max Krummenacher Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 8 -------- 1 file changed, 8 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 97f6eebad76a..cf854203bfb1 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -411,7 +411,6 @@ properties: - technologic,imx6dl-ts4900 - technologic,imx6dl-ts7970 - toradex,colibri_imx6dl # Colibri iMX6 Modules - - toradex,colibri_imx6dl-v1_1 # Colibri iMX6 V1.1 Modules - udoo,imx6dl-udoo # Udoo i.MX6 Dual-lite Board - vdl,lanmcu # Van der Laan LANMCU board - wand,imx6dl-wandboard # Wandboard i.MX6 Dual Lite Board @@ -492,13 +491,6 @@ properties: - const: toradex,colibri_imx6dl # Colibri iMX6DL/S Mod= ule - const: fsl,imx6dl =20 - - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S V1.1 Mod= ules - items: - - enum: - - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6DL/S V1.= 1 M. on Colibri Evaluation Board V3 - - const: toradex,colibri_imx6dl-v1_1 # Colibri iMX6DL/S V1.= 1 Module - - const: fsl,imx6dl - - description: i.MX6S DHCOM DRC02 Board items: - const: dh,imx6s-dhcom-drc02 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 531C3C433F5 for ; Mon, 14 Mar 2022 16:30:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243030AbiCNQbc (ORCPT ); Mon, 14 Mar 2022 12:31:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243007AbiCNQb1 (ORCPT ); Mon, 14 Mar 2022 12:31:27 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 484E013CC6; Mon, 14 Mar 2022 09:30:16 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id r6so24470246wrr.2; Mon, 14 Mar 2022 09:30:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PMc3hS2nDWt/VXm5icHS8ZJSiGOmlimiAqvNkgMungw=; b=FWhw21EHb3m7gdC6Uw0D41cyneQjt8svu9OnP66NKKCG5bsYZglzbotQaPr9ch9rhJ fYyknDE1iR2b6HM1B74m/J3IzO7xP7bMj3qsQ7oPWU1S9Jkzx+hmaPbk2uekuTLrsyRD FnT51d/5GtMr0wrkkpMth2GCHjQWlE/Ui1gJ2pdfGhg3lHM7vDetGzHUTLe5ArpYztji PnKvjMHjbFG9PGltFvxg+JH3/ODsWPApXbB191L5VEx5f4aXeFaATy4h7pqtlltZfhZP BO5HXs8bE31Fk4MBUkBdmIxnGZPt8n9nhNFnFOAzXCjGmG4jTe0SDC5SbyH8KufKZqOD ihPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=PMc3hS2nDWt/VXm5icHS8ZJSiGOmlimiAqvNkgMungw=; b=B8y1Ov8U8Khmkp+O16xbBRY+17yCGPWIkwGuOoHOvS3QaGepCg4OJGFic0fQIhP2HL 9+QAb05rvmOfSOKnv5MU3a7LjQDEURZDFOWCh1vsYTRugxs1mGxvtQ4n1dURwvsxVju7 d2Pygm0d5jYOwhMne4OWqe+GuNZi0TZrffCwKVriGDr4y9alyZbpoAHmOdQD5zEjMagw utWCDF0HBGIvKyit/eZkgjUJt4EWSjtZs7ex3FWhe3nLhwqsg3r+unQa5nZaxLPWdKGo HI+a5NiTh0YvrvihDu9syp4nE2mv7roum4M/vpENXDHH987Tt1+fcqKbn3GRQnJvMvnO TBdw== X-Gm-Message-State: AOAM533Nrn9TO4Ng8ZwMqUbNYP/uBdhKKnzLU384JumkwkrmGOTS0SZW h9MDpCYe8te2VjzHQAg/0fY= X-Google-Smtp-Source: ABdhPJziYFYPW1Mgb5QuOeK4LqzQRP8CBE70psNXE7EhaFJ5MTl7KLaHGhs5KX1ppQG3v/sg4Rgo4w== X-Received: by 2002:a05:6000:144c:b0:1f1:f24b:a70b with SMTP id v12-20020a056000144c00b001f1f24ba70bmr17595685wrx.541.1647275414911; Mon, 14 Mar 2022 09:30:14 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:14 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Alexander Stein , Ariel D'Alessandro , Christoph Niedermaier , Fabio Estevam , Krzysztof Kozlowski , Li Yang , Marcel Ziswiler , Matthias Schiffer , Oleksij Rempel , Rob Herring , Sebastian Reichel , Shawn Guo , Tim Harvey , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 02/14] dt-bindings: arm: fsl: Add carriers for toradex,colibri-imx6dl Date: Mon, 14 Mar 2022 17:29:46 +0100 Message-Id: <20220314162958.40361-3-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add bindings for Aster, Iris and Iris V2 carrier boards our Colibri iMX6S/DL may be mated with. Signed-off-by: Max Krummenacher Acked-by: Rob Herring --- Documentation/devicetree/bindings/arm/fsl.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index cf854203bfb1..fefbc13f3928 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -487,7 +487,10 @@ properties: - description: i.MX6DL Boards with Toradex Colibri iMX6DL/S Modules items: - enum: + - toradex,colibri_imx6dl-aster # Colibri iMX6DL/S Mod= ule on Aster Board - toradex,colibri_imx6dl-eval-v3 # Colibri iMX6DL/S Mod= ule on Colibri Evaluation Board V3 + - toradex,colibri_imx6dl-iris # Colibri iMX6DL/S Mod= ule on Iris Board + - toradex,colibri_imx6dl-iris-v2 # Colibri iMX6DL/S Mod= ule on Iris Board V2 - const: toradex,colibri_imx6dl # Colibri iMX6DL/S Mod= ule - const: fsl,imx6dl =20 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DAC22C433F5 for ; Mon, 14 Mar 2022 16:30:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243044AbiCNQbg (ORCPT ); Mon, 14 Mar 2022 12:31:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243025AbiCNQb3 (ORCPT ); Mon, 14 Mar 2022 12:31:29 -0400 Received: from mail-wr1-x430.google.com (mail-wr1-x430.google.com [IPv6:2a00:1450:4864:20::430]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7207B13D22; Mon, 14 Mar 2022 09:30:19 -0700 (PDT) Received: by mail-wr1-x430.google.com with SMTP id k24so24891752wrd.7; Mon, 14 Mar 2022 09:30:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=5IWZB7lm0OS7hiJCt1Fk8L1gWisKBN/knOKbVeilPF4=; b=qtRhVzP1IotAGcXO6C1pZ75A5P6fJYQT2aa4yaBaaO8cSA0oFTOOXGiv6aygKri+Gu AsVWM1naLcA7ZxVTBMsZOLRzj4PWFStGxyigAA78jh+aoomI0Gfbgh2YrZM2e8JaM9nP tBc68SqXLeMIZFurb3umP394DC2Y1tyLwF4MeQH8KszoEt1LG5XxdoOdTlc40ByS7MbS vmqVU4rku9gtSRWFSOvxR1DJ/re/xuuA8XjnLooWpjmW7z17RVdosqwbD17WzSvC3Par rYAo3nT/d7mbJNevolJNW+UnwznP87XmB7uaLtzvdcg/X7kOJCxn2qLd5giIbEB7K8DH RnLA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=5IWZB7lm0OS7hiJCt1Fk8L1gWisKBN/knOKbVeilPF4=; b=KgqdyWH7E94DBS9VvqE9Pc1tCxGRLoMsphJOQoLqcHzYlK1Tjjr0pHIJNpHLWNS3Kr Mp0/oUdwLj+39geZky/5uQ3PmX6sjTRSnabkBX8mAJm8M8nExlGwKdcGdjGmiSnfos58 hDLGN7SFpiPLqxfGK7WoqRGUOQic0a4z/HBZ6JTLieL2MXE7cooA0bIsdl+j/vM6acoD t6ZJPWEqh+6/XoDK8S+BNn80Cme7VdhWq9RPUJn6qAPWMA4tfPwkpl9G+agPkxDZ1fuE rlwYGmwI3BzB9uOwZLJzOEbFyC8NbsPNn1JIhIlJlOq/Z33f7GHEEP4yhUekimE7WKsp QTVw== X-Gm-Message-State: AOAM5323vTyAvEdiGUI1VrKveMyMWqouPr6FF30ebrJ/eIDSG4Rf67hG gWZbegTkG3DFUf9EFcwNEaU= X-Google-Smtp-Source: ABdhPJziNtwZGkbnwKeDXdTEo5ctpjTFFpNoIz9NasiUJKQ7pee9Wro4ag+vWU1HLo1Kje0ACVTm4g== X-Received: by 2002:a5d:5888:0:b0:203:6974:968a with SMTP id n8-20020a5d5888000000b002036974968amr17829324wrf.339.1647275418067; Mon, 14 Mar 2022 09:30:18 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:17 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 03/14] ARM: dts: imx6dl-colibri: Drop dedicated v1.1 device tree Date: Mon, 14 Mar 2022 17:29:47 +0100 Message-Id: <20220314162958.40361-4-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Drop Colibri V1.1 device tree, this is just a duplicate of Colibri V1.0 with the possibility to use SD cards in UHS mode if the carrier board does not have 3.3V pull up resistor. The dedicated device tree kept the feature switched of by setting the no-1-8-v property and thus does not offer anything different than what the regular device tree does. Thus drop the dedicated device tree and merge the preparation to allow enabling the feature should a carrier without pull ups be used into the regular device tree. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/Makefile | 1 - .../boot/dts/imx6dl-colibri-v1_1-eval-v3.dts | 31 ------------- .../boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi | 44 ------------------- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 29 +++++++++++- 4 files changed, 27 insertions(+), 78 deletions(-) delete mode 100644 arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts delete mode 100644 arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 235ad559acb2..ee27bafa69be 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -453,7 +453,6 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ imx6dl-colibri-eval-v3.dtb \ - imx6dl-colibri-v1_1-eval-v3.dtb \ imx6dl-cubox-i.dtb \ imx6dl-cubox-i-emmc-som-v15.dtb \ imx6dl-cubox-i-som-v15.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts b/arch/arm/b= oot/dts/imx6dl-colibri-v1_1-eval-v3.dts deleted file mode 100644 index 223275f028f1..000000000000 --- a/arch/arm/boot/dts/imx6dl-colibri-v1_1-eval-v3.dts +++ /dev/null @@ -1,31 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -/dts-v1/; - -#include "imx6dl-colibri-eval-v3.dts" -#include "imx6qdl-colibri-v1_1-uhs.dtsi" - -/ { - model =3D "Toradex Colibri iMX6DL/S V1.1 on Colibri Evaluation Board V3"; - compatible =3D "toradex,colibri_imx6dl-v1_1-eval-v3", - "toradex,colibri_imx6dl-v1_1", - "toradex,colibri_imx6dl-eval-v3", - "toradex,colibri_imx6dl", - "fsl,imx6dl"; -}; - -/* Colibri MMC */ -&usdhc1 { - status =3D "okay"; - /* - * Please make sure your carrier board does not pull-up any of - * the MMC/SD signals to 3.3 volt before attempting to activate - * UHS-I support. - * To let signaling voltage be changed to 1.8V, please - * delete no-1-8-v property (example below): - * /delete-property/no-1-8-v; - */ -}; diff --git a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi b/arch/arm/boo= t/dts/imx6qdl-colibri-v1_1-uhs.dtsi deleted file mode 100644 index 7672fbfc29be..000000000000 --- a/arch/arm/boot/dts/imx6qdl-colibri-v1_1-uhs.dtsi +++ /dev/null @@ -1,44 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT -/* - * Copyright 2020 Toradex - */ - -&iomuxc { - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { - fsl,pins =3D < - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1 - >; - }; - - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { - fsl,pins =3D < - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1 - >; - }; -}; - -/* Colibri MMC */ -&usdhc1 { - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; - pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; - pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; - pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; - vmmc-supply =3D <®_module_3v3>; - vqmmc-supply =3D <&vgen3_reg>; - wakeup-source; - keep-power-in-suspend; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; -}; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 4e2a309c93fa..16d38bc78b2a 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -370,11 +370,14 @@ =20 /* Colibri MMC */ &usdhc1 { - pinctrl-names =3D "default"; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; + pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ disable-wp; - vqmmc-supply =3D <®_module_3v3>; + vmmc-supply =3D <®_module_3v3>; + vqmmc-supply =3D <&vgen3_reg>; bus-width =3D <4>; no-1-8-v; status =3D "disabled"; @@ -692,6 +695,28 @@ >; }; =20 + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170b1 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170b1 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170b1 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170b1 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f1 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f1 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f1 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f1 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C9E10C433EF for ; Mon, 14 Mar 2022 16:31:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234064AbiCNQca (ORCPT ); Mon, 14 Mar 2022 12:32:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59822 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238700AbiCNQbd (ORCPT ); Mon, 14 Mar 2022 12:31:33 -0400 Received: from mail-wr1-x42d.google.com (mail-wr1-x42d.google.com [IPv6:2a00:1450:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 646C213D4E; Mon, 14 Mar 2022 09:30:20 -0700 (PDT) Received: by mail-wr1-x42d.google.com with SMTP id h15so24869487wrc.6; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:18 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Philippe Schenker , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 04/14] ARM: dts: imx6dl-colibri: Fix I2C pinmuxing Date: Mon, 14 Mar 2022 17:29:48 +0100 Message-Id: <20220314162958.40361-5-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Fix names of extra pingroup node and property for gpio bus recovery. Without the change i2c2 is not functional. Fixes: 56f0df6b6b58 ("ARM: dts: imx*(colibri|apalis): add missing recovery modes to i2c") Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 16d38bc78b2a..c6112b1bffd4 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -132,7 +132,7 @@ clock-frequency =3D <100000>; pinctrl-names =3D "default", "gpio"; pinctrl-0 =3D <&pinctrl_i2c2>; - pinctrl-0 =3D <&pinctrl_i2c2_gpio>; + pinctrl-1 =3D <&pinctrl_i2c2_gpio>; scl-gpios =3D <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios =3D <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; @@ -491,7 +491,7 @@ >; }; =20 - pinctrl_i2c2_gpio: i2c2grp { + pinctrl_i2c2_gpio: i2c2gpiogrp { fsl,pins =3D < MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10424C43217 for ; Mon, 14 Mar 2022 16:30:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243050AbiCNQbn (ORCPT ); Mon, 14 Mar 2022 12:31:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59780 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243048AbiCNQbk (ORCPT ); Mon, 14 Mar 2022 12:31:40 -0400 Received: from mail-wr1-x434.google.com (mail-wr1-x434.google.com [IPv6:2a00:1450:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 39BA313E3E; Mon, 14 Mar 2022 09:30:21 -0700 (PDT) Received: by mail-wr1-x434.google.com with SMTP id i8so24903513wrr.8; Mon, 14 Mar 2022 09:30:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=AzsIbe/VyQDZhQv3en/oGFWMkVwLL9AvbOE+B5m6rmM=; b=oluAmZ1AbProoVNTpi90HZvl0fwZzZZa4vLOh9Kw7RedFNCTQ+C2fpFTKnXJ1mDjmZ duGVfXlvqLBAzdKe9hKrZKq72KmCLmS28/3Tm/T8V7jgRsSIs7OzVwv65iWIHtL9+xib mNqhEvzO3LDIioC55gLFc8WxjlBOE60HswL6BxEksEBB7fuHtfcTOn1dyiG7YpTMjXV4 qX8bSeZagaIiUBD+UQOxe0FCoXDvi+HkX4YHJvLcEUA2h6S/S9tTE++UQ12D85vDwdsL PB4mpdyn5bDrzzXUi3MM9WJEgEI2gO2/7pPkUnJrcpRhoP4Zc+A7w7eHYfarrUmHB4Ky 2e+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=AzsIbe/VyQDZhQv3en/oGFWMkVwLL9AvbOE+B5m6rmM=; b=DfHGdoRQbnkbqewtyp5t5Spi7mgSZm1b5SbSVYMqt2jZF3mGGUVXNdHrzumuBO1zXd pAk1QhXLqByqG62vxr+R9HzMVyoYJ6zHAs/OSMjQEujgGPZ4yf9IE7zoLiBI6/xVCrnC yAzt1p5vOK5sFxSrA9IX3h5mZ4t1UNNyNyqusSSWnuCnJHdLJlUV1QBLFQEcyX5olqDv ZJSb7xMKe1clSO79atrXp1Uealx895QpmcLboFqtdQ4I7vqd8ZvqVmq8QhOHtFDDG7jc DextNZV+wZ72N+2D4NZmzncYM8Krg4SN+qyJPZ/K+Xnd5DI3ONrk8Y9wF9Av0UIPxGyA wdbg== X-Gm-Message-State: AOAM533zsEvz7zS+zceKFpW8PFwYKHv3ABzx5NmfDRN4gxnUZKFAL55I kW1QVVaD0hl+WPhW1YFTTdo= X-Google-Smtp-Source: ABdhPJy5zV2RXw6618ozXkF+A8aLhNgnnHiahwhVyrGmH9IHJNHt1h6EQhbUi1N+zsOVFCxtMP8lsA== X-Received: by 2002:a05:6000:1548:b0:203:7a50:315d with SMTP id 8-20020a056000154800b002037a50315dmr17318360wry.41.1647275419825; Mon, 14 Mar 2022 09:30:19 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:19 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Oleksandr Suvorov , Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 05/14] ARM: dts: imx6dl-colibri: Add gpio-line-names Date: Mon, 14 Mar 2022 17:29:49 +0100 Message-Id: <20220314162958.40361-6-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Oleksandr Suvorov Add GPIO line names on module level. Those are all GPIOs which a user might use on his custom carrier board. If more meaningful names are available on the carrier board, the user can overwrite the line names in the carrier board level device tree. Signed-off-by: Oleksandr Suvorov Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 218 +++++++++++++++++++++++++ 1 file changed, 218 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index c6112b1bffd4..c92887f6af61 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -118,6 +118,224 @@ }; }; =20 +&gpio1 { + gpio-line-names =3D "", + "SODIMM_67", + "SODIMM_180", + "SODIMM_196", + "SODIMM_174", + "SODIMM_176", + "SODIMM_194", + "SODIMM_55", + "SODIMM_63", + "SODIMM_28", + "SODIMM_93", + "SODIMM_69", + "SODIMM_99", + "SODIMM_130", + "SODIMM_106", + "SODIMM_98", + "SODIMM_192", + "SODIMM_49", + "SODIMM_190", + "SODIMM_51", + "SODIMM_47", + "SODIMM_53", + "", + "SODIMM_22"; +}; + +&gpio2 { + gpio-line-names =3D "SODIMM_132", + "SODIMM_134", + "SODIMM_135", + "SODIMM_133", + "SODIMM_102", + "SODIMM_43", + "SODIMM_127", + "SODIMM_37", + "SODIMM_104", + "SODIMM_59", + "SODIMM_30", + "SODIMM_100", + "SODIMM_38", + "SODIMM_34", + "SODIMM_32", + "SODIMM_36", + "SODIMM_59", + "SODIMM_67", + "SODIMM_97", + "SODIMM_79", + "SODIMM_103", + "SODIMM_101", + "SODIMM_45", + "SODIMM_105", + "SODIMM_107", + "SODIMM_91", + "SODIMM_89", + "SODIMM_150", + "SODIMM_126", + "SODIMM_128", + "", + "SODIMM_94"; +}; + +&gpio3 { + gpio-line-names =3D "SODIMM_111", + "SODIMM_113", + "SODIMM_115", + "SODIMM_117", + "SODIMM_119", + "SODIMM_121", + "SODIMM_123", + "SODIMM_125", + "SODIMM_110", + "SODIMM_112", + "SODIMM_114", + "SODIMM_116", + "SODIMM_118", + "SODIMM_120", + "SODIMM_122", + "SODIMM_124", + "", + "SODIMM_96", + "SODIMM_77", + "SODIMM_25", + "SODIMM_27", + "SODIMM_88", + "SODIMM_90", + "SODIMM_31", + "SODIMM_23", + "SODIMM_29", + "SODIMM_71", + "SODIMM_73", + "SODIMM_92", + "SODIMM_81", + "SODIMM_131", + "SODIMM_129"; +}; + +&gpio4 { + gpio-line-names =3D "", + "", + "", + "", + "", + "SODIMM_168", + "", + "", + "", + "", + "SODIMM_184", + "SODIMM_186", + "HDMI_15", + "HDMI_16", + "SODIMM_178", + "SODIMM_188", + "SODIMM_56", + "SODIMM_44", + "SODIMM_68", + "SODIMM_82", + "SODIMM_24", + "SODIMM_76", + "SODIMM_70", + "SODIMM_60", + "SODIMM_58", + "SODIMM_78", + "SODIMM_72", + "SODIMM_80", + "SODIMM_46", + "SODIMM_62", + "SODIMM_48", + "SODIMM_74"; +}; + +&gpio5 { + gpio-line-names =3D "SODIMM_95", + "", + "SODIMM_86", + "", + "SODIMM_65", + "SODIMM_50", + "SODIMM_52", + "SODIMM_54", + "SODIMM_66", + "SODIMM_64", + "SODIMM_57", + "SODIMM_61", + "SODIMM_136", + "SODIMM_138", + "SODIMM_140", + "SODIMM_142", + "SODIMM_144", + "SODIMM_146", + "SODIMM_172", + "SODIMM_170", + "SODIMM_149", + "SODIMM_151", + "SODIMM_153", + "SODIMM_155", + "SODIMM_157", + "SODIMM_159", + "SODIMM_161", + "SODIMM_163", + "SODIMM_33", + "SODIMM_35", + "SODIMM_165", + "SODIMM_167"; +}; + +&gpio6 { + gpio-line-names =3D "SODIMM_169", + "SODIMM_171", + "SODIMM_173", + "SODIMM_175", + "SODIMM_177", + "SODIMM_179", + "SODIMM_85", + "SODIMM_166", + "SODIMM_160", + "SODIMM_162", + "SODIMM_158", + "SODIMM_164", + "", + "", + "SODIMM_156", + "SODIMM_75", + "SODIMM_154", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_152"; +}; + +&gpio7 { + gpio-line-names =3D "", + "", + "", + "", + "", + "", + "", + "", + "", + "SODIMM_19", + "SODIMM_21", + "", + "SODIMM_137"; +}; + &hdmi { pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_hdmi_ddc>; --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 82BD7C433F5 for ; Mon, 14 Mar 2022 16:31:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243162AbiCNQcS (ORCPT ); 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:20 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 06/14] ARM: dts: imx6dl-colibri: Disable add-on accessories Date: Mon, 14 Mar 2022 17:29:50 +0100 Message-Id: <20220314162958.40361-7-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Toradex Colibri family is composed of SoM that can be plugged in various carrier board, with carrier boards allowing multiple optional add-on (e.g. display, camera, ...). Keep all the SoM specific part into the module .dtsi, disabling everything that is not self-contained on the board. The carrier board dts can reuse/enable anything that is defined in the module dtsi. Additional device tree overlays can be used for any accessories that are plugged in the carrier board. Disable parallel RGB: The parallel RGB interface (lcd_display) and all related nodes can be enabled in an overlay if used. Keep all nodes disabled in the module-level device tree. Rename display interface node to match imx6qdl-apalis to make it easier to use overlays. The pwm-backlight binding now requires the power-supply property, add it. Disable stmpe touchscreen: The touchscreen can be enabled in an overlay if used. Add labels to the stmpe sub nodes. Disable hdmi interface: HDMI can be enabled in an overlay if used. Update SPDX-License spelling to latest convention. Update Copyright year. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 59 +------------------- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 57 ++++++++++++++++++- 2 files changed, 56 insertions(+), 60 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index 7da74e6f46d9..535b5c156229 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0+ OR MIT +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* - * Copyright 2014-2020 Toradex + * Copyright 2014-2022 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ @@ -58,53 +58,6 @@ wakeup-source; }; }; - - lcd_display: disp0 { - compatible =3D "fsl,imx-parallel-display"; - #address-cells =3D <1>; - #size-cells =3D <0>; - interface-pix-fmt =3D "bgr666"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_ipu1_lcdif>; - status =3D "okay"; - - port@0 { - reg =3D <0>; - - lcd_display_in: endpoint { - remote-endpoint =3D <&ipu1_di0_disp0>; - }; - }; - - port@1 { - reg =3D <1>; - - lcd_display_out: endpoint { - remote-endpoint =3D <&lcd_panel_in>; - }; - }; - }; - - panel: panel { - /* - * edt,et057090dhu: EDT 5.7" LCD TFT - * edt,et070080dh6: EDT 7.0" LCD TFT - */ - compatible =3D "edt,et057090dhu"; - backlight =3D <&backlight>; - - port { - lcd_panel_in: endpoint { - remote-endpoint =3D <&lcd_display_out>; - }; - }; - }; -}; - -&backlight { - brightness-levels =3D <0 127 191 223 239 247 251 255>; - default-brightness-level =3D <1>; - status =3D "okay"; }; =20 /* Colibri SSP */ @@ -122,10 +75,6 @@ }; }; =20 -&hdmi { - status =3D "okay"; -}; - /* * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */ @@ -178,10 +127,6 @@ }; }; =20 -&ipu1_di0_disp0 { - remote-endpoint =3D <&lcd_display_in>; -}; - &pwm1 { status =3D "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index c92887f6af61..f6243762e918 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -13,13 +13,59 @@ =20 backlight: backlight { compatible =3D "pwm-backlight"; + brightness-levels =3D <0 127 191 223 239 247 251 255>; + default-brightness-level =3D <1>; + enable-gpios =3D <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_gpio_bl_on>; + power-supply =3D <®_module_3v3>; pwms =3D <&pwm3 0 5000000>; - enable-gpios =3D <&gpio3 26 GPIO_ACTIVE_HIGH>; /* Colibri BL_ON */ status =3D "disabled"; }; =20 + lcd_display: disp0 { + compatible =3D "fsl,imx-parallel-display"; + interface-pix-fmt =3D "bgr666"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ipu1_lcdif>; + status =3D "disabled"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + + lcd_display_in: endpoint { + remote-endpoint =3D <&ipu1_di0_disp0>; + }; + }; + + port@1 { + reg =3D <1>; + + lcd_display_out: endpoint { + remote-endpoint =3D <&lcd_panel_in>; + }; + }; + }; + + panel_dpi: panel-dpi { + /* + * edt,et057090dhu: EDT 5.7" LCD TFT + * edt,et070080dh6: EDT 7.0" LCD TFT + */ + compatible =3D "edt,et057090dhu"; + backlight =3D <&backlight>; + status =3D "disabled"; + + port { + lcd_panel_in: endpoint { + remote-endpoint =3D <&lcd_display_out>; + }; + }; + }; + reg_module_3v3: regulator-module-3v3 { compatible =3D "regulator-fixed"; regulator-name =3D "+V3.3"; @@ -476,7 +522,7 @@ /* ADC converstion time: 80 clocks */ st,sample-time =3D <4>; =20 - stmpe_touchscreen { + stmpe_ts: stmpe_touchscreen { compatible =3D "st,stmpe-ts"; /* 8 sample average control */ st,ave-ctrl =3D <3>; @@ -491,9 +537,10 @@ st,settling =3D <3>; /* 5 ms touch detect interrupt delay */ st,touch-det-delay =3D <5>; + status =3D "disabled"; }; =20 - stmpe_adc { + stmpe_adc: stmpe_adc { compatible =3D "st,stmpe-adc"; /* forbid to use ADC channels 3-0 (touch) */ st,norequest-mask =3D <0x0F>; @@ -514,6 +561,10 @@ status =3D "disabled"; }; =20 +&ipu1_di0_disp0 { + remote-endpoint =3D <&lcd_display_in>; +}; + /* Colibri PWM */ &pwm1 { pinctrl-names =3D "default"; --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A0076C433FE for ; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:21 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 07/14] ARM: dts: imx6dl-colibri: Command pmic to standby for poweroff Date: Mon, 14 Mar 2022 17:29:51 +0100 Message-Id: <20220314162958.40361-8-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Colibri iMX6 HW doesn't allow to use the PWR_ON_REQ signal for poweroff. Use the fsl,pmic-stby-poweroff property to command the PMIC into a low power mode in poweroff. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index f6243762e918..da52a71bb6e7 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -138,6 +138,10 @@ status =3D "disabled"; }; =20 +&clks { + fsl,pmic-stby-poweroff; +}; + /* Colibri SSP */ &ecspi4 { cs-gpios =3D <&gpio5 2 GPIO_ACTIVE_LOW>; @@ -403,6 +407,7 @@ =20 pmic: pfuze100@8 { compatible =3D "fsl,pfuze100"; + fsl,pmic-stby-poweroff; reg =3D <0x08>; =20 regulators { --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D585C433EF for ; Mon, 14 Mar 2022 16:31:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243166AbiCNQcW (ORCPT ); Mon, 14 Mar 2022 12:32:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243058AbiCNQbk (ORCPT ); Mon, 14 Mar 2022 12:31:40 -0400 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB8311A807; Mon, 14 Mar 2022 09:30:23 -0700 (PDT) Received: by mail-wr1-x435.google.com with SMTP id p9so24863006wra.12; Mon, 14 Mar 2022 09:30:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8BQc4OLG/fXKfwXIOJU2y/64eF1b0BRzKQ6czfrvnc0=; b=ZQAbFdrM8EX5U3VDL5EdlWNxlojepthplnVDHIIGI79L0tlXvQAKOKVi2s5xWjj9bS 61J8v/tpkNeVzDhDRPupqm27GsCza4777Uf+ZD+DTmn+coUu6DV1brhxIReR0fKijRFP p8G+1pSyU3IsSCqvGhohW3NClb4Bw41UVjEc74RYz7qCcbuI8SG5oCRFfmqVtRmq1qvy aC+/VEX/kzd+3SvypUYqBDUMAaCl9rnC+MgVepThB0jR/I7GxIo4e/lU4THVEiE6szH/ h5QtElto8Rf528cNdaVasQFs/J0gU+7vfcVDgB4RBZguXSRMxUMt+oVbRxrXDfOHPPGS nStQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=8BQc4OLG/fXKfwXIOJU2y/64eF1b0BRzKQ6czfrvnc0=; b=C8Rwm8E+P6kP/7s0S0fo728B8LbSr1Kcs6Fyw9IxMOeekQUmKsWEg18dy2Fpietzlg rLlqR4YHsYFd7lmaCiWvKEKKBzjkfHMVQJ+Klk0ti9XaAWJzajnr1TSDc0bfwjxMmoWA K6hyOnH4nRBaXxZ86NouElJ+fqA2gxHxmp7WmZ/WH7l8J9eGAJP11Uc/uaVpCAXcL93k fWlGy3UziRboQzBukcGX/oKlmSSxBqkfWVFyroghRNWZqaYXtcAi+RSBXMTkTKKamgJZ u19cBDW4claeJNWFaT1eXuNyndl2KBfKQIlDLYpjy+qiTUeZmPnJJU95W2CJDB+8G5tk 3GmQ== X-Gm-Message-State: AOAM5308bLRD3JtTc+YvHgQRhgpgZ603SeghvQz6ZxAY/nLRfIS6g4Yu I1MHeqgS5+stS+MVwYY/kTM= X-Google-Smtp-Source: ABdhPJz42yZOcArKLcysEgjWPOTJ5/YeaSZNHz68DrjZagWMxM+1CbmokJERc0A3ID6IRJf7D9A8UQ== X-Received: by 2002:adf:d1eb:0:b0:203:9349:12b5 with SMTP id g11-20020adfd1eb000000b00203934912b5mr13604584wrd.285.1647275422428; Mon, 14 Mar 2022 09:30:22 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:22 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 08/14] ARM: dts: imx6dl-colibri: Add additional pingroups Date: Mon, 14 Mar 2022 17:29:52 +0100 Message-Id: <20220314162958.40361-9-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Toradex board Iris V2 has an LVDS transceiver which is configured with 4 signals. Add corresponding pins into the separate pingroup to be able to manage the transceiver. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 52 ++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index da52a71bb6e7..3459bfb5c60b 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -700,6 +700,30 @@ >; }; =20 + /* CSI pins used as GPIOs */ + pinctrl_csi_gpio_1: csigpio1grp { + fsl,pins =3D < + MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x130b0 + MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 + MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 + MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x1b0b0 + MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x1b0b0 + MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x1b0b0 + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + + pinctrl_csi_gpio_2: csigpio2grp { + fsl,pins =3D < + MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b0b0 + >; + }; + pinctrl_ecspi4: ecspi4grp { fsl,pins =3D < MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 @@ -739,6 +763,25 @@ >; }; =20 + pinctrl_gpio_1: gpio1grp { + fsl,pins =3D < + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x1b0b0 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; + pinctrl_gpio_2: gpio2grp { + fsl,pins =3D < + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 + >; + }; + pinctrl_gpio_bl_on: gpioblon { fsl,pins =3D < MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 @@ -832,6 +875,15 @@ >; }; =20 + pinctrl_lvds_transceiver: lvdstxgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x03030 /* SODIMM 95 */ + MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0b030 /* SODIMM 55 */ + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x03030 /* SODIMM 63 */ + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x03030 /* SODIMM 99 */ + >; + }; + pinctrl_mic_gnd: gpiomicgnd { fsl,pins =3D < /* Controls Mic GND, PU or '1' pull Mic GND to GND */ --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B616EC433F5 for ; Mon, 14 Mar 2022 16:31:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243098AbiCNQc0 (ORCPT ); Mon, 14 Mar 2022 12:32:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60098 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243059AbiCNQbk (ORCPT ); Mon, 14 Mar 2022 12:31:40 -0400 Received: from mail-wm1-x32e.google.com (mail-wm1-x32e.google.com [IPv6:2a00:1450:4864:20::32e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C42171DA46; Mon, 14 Mar 2022 09:30:24 -0700 (PDT) Received: by mail-wm1-x32e.google.com with SMTP id k8-20020a05600c1c8800b003899c7ac55dso9247wms.1; Mon, 14 Mar 2022 09:30:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=erJKWfBVOPAC7/YbLDzpdnGH/84KxFdomOjrDboBHfI=; b=cZCKVB8t8KSxqaj37vNnTAYOOXjtoVKGCKEf45FO/JhqDkD4X1fmmhYmJTvGzZeIqJ YgEXV+OfhEWS+TaNVEt+qLIkzv+0RuGMEjQqndI/t23z3OZvg8bh56CZ7Q2GEPmX0XAT 4Du/N+CcT1mWqYBI9x/UJaXPb5BShIcnen/XjH7DDwUCU48cVbC0d3/cFEa+X8D6APHx tD2sqJU3I7q41mByFWHZHQjlO0blSonXRBDjwQ1L0HARLaN+3BWaTagZbY05hTexYasE 68p3jCSehZESe79but0Dom54DDr9/CcqdqoGH6d46a5ntjU3fw0eMVg4HYlq1Pv5Rcsl Uc+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=erJKWfBVOPAC7/YbLDzpdnGH/84KxFdomOjrDboBHfI=; b=smtF+yfcbJBc1a1EpA8bLRIqqkP3MnFwSQFR1IqCp1FSUGYBHQhm2I9rZM1ISKw3wY Z0g6h99VYbvtMUo8rkcFE6ileErZmQgo5DgWUNgio1wX7haMPNKOde7wX9AFncCLQ7Ob Dwzk8yc2cvDZzhnNcwifOE7DNCjty7i+DA/pj2D3oT8MetedYs1ZJP+v7/7ot8vxMh1z Eje9kB1VJvWRcyYRtGNPVvPznb4JTYJobE+NfaWYKa84HrH31UPG3sBCR1hHw+G6Rd2F IqA2FAPlla8GIarUiCq1Ukck0LMl/VEW1/FQQtaEEeDoEdJ3kNIky9MyvsjGKZabMfkt N4xA== X-Gm-Message-State: AOAM531ZkhJQU6PvwPGACwi++smc7NSiVt/4egB77LTypInyqsibxpw4 MQEd320/8psYsCR5bv3x4OA= X-Google-Smtp-Source: ABdhPJzg8REEfcJlApAVgv6ga/UP1lVc3QKJ2cYQrHVEOYgQPeWLyQU56sDjkT5peLsoa/G6IPt66w== X-Received: by 2002:a05:600c:21d1:b0:381:4fed:159a with SMTP id x17-20020a05600c21d100b003814fed159amr5422wmj.143.1647275423287; Mon, 14 Mar 2022 09:30:23 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:22 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 09/14] ARM: dts: imx6dl-colibri: Move common nodes to SoM dtsi Date: Mon, 14 Mar 2022 17:29:53 +0100 Message-Id: <20220314162958.40361-10-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The following two nodes define module level functionality, move them from the carrier board dts file to the SoM file. While at it, reorder the properties in the gpio-keys node alphabetical. - gpio-keys defining the wakeup pin - memory node The atmel touchscreen node can be used on any carrier board. Move it from the carrier board to the module-level device tree and keep it disabled. Set the default pinmuxing to the dedicated connector available on newer carrier boards and rename the pinctrl labels specifying the INT/Reset signal to a common pattern. pinctrl_atmel_conn - uses 107/106 pins as used on dedicated connector pinctrl_atmel_adap - uses 28/30 pins as used with jumper wires Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 49 ------------------ arch/arm/boot/dts/imx6qdl-colibri.dtsi | 53 ++++++++++++++++++++ 2 files changed, 53 insertions(+), 49 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index 535b5c156229..dff2d35e693b 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -17,12 +17,6 @@ compatible =3D "toradex,colibri_imx6dl-eval-v3", "toradex,colibri_imx6dl", "fsl,imx6dl"; =20 - /* Will be filled by the bootloader */ - memory@10000000 { - device_type =3D "memory"; - reg =3D <0x10000000 0>; - }; - aliases { i2c0 =3D &i2c2; i2c1 =3D &i2c3; @@ -44,20 +38,6 @@ clock-frequency =3D <16000000>; clock-output-names =3D "clk16m"; }; - - gpio-keys { - compatible =3D "gpio-keys"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_gpio_keys>; - - wakeup { - label =3D "Wake-Up"; - gpios =3D <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ - linux,code =3D ; - debounce-interval =3D <10>; - wakeup-source; - }; - }; }; =20 /* Colibri SSP */ @@ -81,21 +61,6 @@ &i2c3 { status =3D "okay"; =20 - /* - * Touchscreen is using SODIMM 28/30, also used for PWM, PWM, - * aka pwm2, pwm3. so if you enable touchscreen, disable the pwms - */ - touchscreen@4a { - compatible =3D "atmel,maxtouch"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_pcap_1>; - reg =3D <0x4a>; - interrupt-parent =3D <&gpio1>; - interrupts =3D <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ - reset-gpios =3D <&gpio2 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 */ - status =3D "disabled"; - }; - /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible =3D "st,m41t0"; @@ -111,20 +76,6 @@ &pinctrl_weim_gpio_5 &pinctrl_weim_gpio_6 &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1 >; - - pinctrl_pcap_1: pcap1grp { - fsl,pins =3D < - MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 /* SODIMM 28 */ - MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x1b0b0 /* SODIMM 30 */ - >; - }; - - pinctrl_mxt_ts: mxttsgrp { - fsl,pins =3D < - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x130b0 /* SODIMM 107 */ - MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x130b0 /* SODIMM 106 */ - >; - }; }; =20 &pwm1 { diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 3459bfb5c60b..1c49fd3e6286 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -23,6 +23,20 @@ status =3D "disabled"; }; =20 + gpio-keys { + compatible =3D "gpio-keys"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_keys>; + + wakeup { + debounce-interval =3D <10>; + gpios =3D <&gpio2 22 GPIO_ACTIVE_HIGH>; /* SODIMM 45 */ + label =3D "Wake-Up"; + linux,code =3D ; + wakeup-source; + }; + }; + lcd_display: disp0 { compatible =3D "fsl,imx-parallel-display"; interface-pix-fmt =3D "bgr666"; @@ -50,6 +64,12 @@ }; }; =20 + /* Will be filled by the bootloader */ + memory@10000000 { + device_type =3D "memory"; + reg =3D <0x10000000 0>; + }; + panel_dpi: panel-dpi { /* * edt,et057090dhu: EDT 5.7" LCD TFT @@ -564,6 +584,17 @@ scl-gpios =3D <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; sda-gpios =3D <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "disabled"; + + atmel_mxt_ts: touchscreen@4a { + compatible =3D "atmel,maxtouch"; + interrupt-parent =3D <&gpio2>; + interrupts =3D <24 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_atmel_conn>; + reg =3D <0x4a>; + reset-gpios =3D <&gpio1 14 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */ + status =3D "disabled"; + }; }; =20 &ipu1_di0_disp0 { @@ -682,6 +713,28 @@ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_usbh_oc_1>; =20 + /* Atmel MXT touchsceen + Capacitive Touch Adapter */ + /* NOTE: This pin group conflicts with pin groups + * pinctrl_pwm1/pinctrl_pwm4. Don't use them simultaneously. + */ + pinctrl_atmel_adap: atmeladaptergrp { + fsl,pins =3D < + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0xb0b1 /* SODIMM 28 */ + MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0xb0b1 /* SODIMM 30 */ + >; + }; + + /* Atmel MXT touchsceen + boards with built-in Capacitive Touch Connector= */ + /* NOTE: This pin group conflicts with pin groups pinctrl_weim_cs1 and + * pinctrl_weim_cs2. Don't use them simultaneously. + */ + pinctrl_atmel_conn: atmelconnectorgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0xb0b1 /* SODIMM_107 */ + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0xb0b1 /* SODIMM_106 */ + >; + }; + pinctrl_audmux: audmuxgrp { fsl,pins =3D < MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C5F80C433EF for ; Mon, 14 Mar 2022 16:30:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243094AbiCNQcH (ORCPT ); Mon, 14 Mar 2022 12:32:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243070AbiCNQbl (ORCPT ); Mon, 14 Mar 2022 12:31:41 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B2E901EED6; Mon, 14 Mar 2022 09:30:25 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id k8-20020a05600c1c8800b003899c7ac55dso9272wms.1; Mon, 14 Mar 2022 09:30:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WKAUlapM9Ue2jO3Q2xiTio2w9xS0lPx3DYyzg85dbEU=; b=TDIWX1ysQa+aEtYog9XUd7utsIHsggXYO0lIPw4UyD4wszytPYYf4XXsuHVC3bfpA0 8vprL4d9kqCEKM/QIk8KegcmG30teT5GQy6vaWvtNQAIS+Xx4KRVx5WKv7euUn2LEE5a vZHufzbJ9NasURD/sGR+PyUwWqlri5icMH1Ci/LYLVtro79KMqCQpsjeSsG0IcliMkL6 Epx/jqeZutNisJ0aDJwzxiEBWCldJSLSzZr031XvjZTmQfdz6bPl4K7QjKJy5To7h56x VohdzNCIjbbwH+HwOP+FM/F3nvBJzCARMAsw09x1n5b1jxH68Vjy7IaI+deimSP5krkt G7Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WKAUlapM9Ue2jO3Q2xiTio2w9xS0lPx3DYyzg85dbEU=; b=Tds5Ot6xS4Bcjn4TVqxWzp3hsQYIeSR2xVmV2AeFBlazLRacyywDqhtDB3kp2HSr3V +XrIX0yWFkKav0zYvHjnjzU0nJarT/tKc6rKTwJmdgLocsgnqMgESGfzG3qcjbEKIGvp jQkgu8FnfzlDJxQFyO6cjt4BAXxUBk6UsLB453b8lYNd6OsQdV5zM7UFjh6dal4wTib+ lvH+Hag5Uf1nBftpecPBfWWLPng+Z/PujQFOR308GOI0xjVuglqtYby+Xh1PHNBRsDR8 qZkykBXGfn4InbUnFPyr5j3FaaKr+7ckcG4d1hXiISDMRgULVwSnnnDMe9/KKCAtPGmc GSHg== X-Gm-Message-State: AOAM531p6ZoSy6h17BAq1I/yS8C7aNb0jKPaUvCAIaAjOZIakzeALvaS 0l8SWwX25zvxXdA8RFAALbc= X-Google-Smtp-Source: ABdhPJyXanWhCxJgY2M0uomUxjAs38DwvzR7Kt0aGVJZsq0lAPMZKM1vVLPTEQj9SHgN6k8zGcwNbg== X-Received: by 2002:a05:600c:2846:b0:389:9347:9aaf with SMTP id r6-20020a05600c284600b0038993479aafmr25625308wmb.87.1647275424149; Mon, 14 Mar 2022 09:30:24 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:23 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 10/14] ARM: dts: imx6dl-colibri: Cleanup Date: Mon, 14 Mar 2022 17:29:54 +0100 Message-Id: <20220314162958.40361-11-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" - Sort pinctrl nodes alphabetically - End all pinctrl node names in grp and avoid using dashes - Change pinctrl_usbc_id_1's node name to not use underscores - Change the pmic's node name to pmic@8 per binding requirement - Add sound-dai-cells to the codec node per binding requirement Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts | 2 +- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 340 ++++++++++--------- 2 files changed, 172 insertions(+), 170 deletions(-) diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/d= ts/imx6dl-colibri-eval-v3.dts index dff2d35e693b..7272edd85a49 100644 --- a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts +++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts @@ -46,10 +46,10 @@ =20 mcp251x0: mcp251x@0 { compatible =3D "microchip,mcp2515"; - reg =3D <0>; clocks =3D <&clk16m>; interrupt-parent =3D <&gpio3>; interrupts =3D <27 0x2>; + reg =3D <0>; spi-max-frequency =3D <10000000>; status =3D "okay"; }; diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 1c49fd3e6286..1c3c34bbfe98 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -104,36 +104,36 @@ =20 reg_usb_host_vbus: regulator-usb-host-vbus { compatible =3D "regulator-fixed"; + gpio =3D <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */ pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_regulator_usbh_pwr>; - regulator-name =3D "usb_host_vbus"; - regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; - gpio =3D <&gpio3 31 GPIO_ACTIVE_HIGH>; /* USBH_PEN */ + regulator-min-microvolt =3D <5000000>; + regulator-name =3D "usb_host_vbus"; status =3D "disabled"; }; =20 sound { compatible =3D "fsl,imx-audio-sgtl5000"; - model =3D "imx6dl-colibri-sgtl5000"; - ssi-controller =3D <&ssi1>; audio-codec =3D <&codec>; audio-routing =3D "Headphone Jack", "HP_OUT", "LINE_IN", "Line In Jack", "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias"; + model =3D "imx6dl-colibri-sgtl5000"; mux-int-port =3D <1>; mux-ext-port =3D <5>; + ssi-controller =3D <&ssi1>; }; =20 /* Optional S/PDIF in on SODIMM 88 and out on SODIMM 90, 137 or 168 */ sound_spdif: sound-spdif { compatible =3D "fsl,imx-audio-spdif"; - model =3D "imx-spdif"; spdif-controller =3D <&spdif>; spdif-in; spdif-out; + model =3D "imx-spdif"; status =3D "disabled"; }; }; @@ -171,10 +171,10 @@ }; =20 &fec { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_enet>; phy-mode =3D "rmii"; phy-handle =3D <ðphy>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enet>; status =3D "okay"; =20 mdio { @@ -425,61 +425,61 @@ sda-gpios =3D <&gpio3 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status =3D "okay"; =20 - pmic: pfuze100@8 { + pmic: pmic@8 { compatible =3D "fsl,pfuze100"; fsl,pmic-stby-poweroff; reg =3D <0x08>; =20 regulators { sw1a_reg: sw1ab { - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1875000>; + regulator-min-microvolt =3D <300000>; regulator-ramp-delay =3D <6250>; }; =20 sw1c_reg: sw1c { - regulator-min-microvolt =3D <300000>; - regulator-max-microvolt =3D <1875000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1875000>; + regulator-min-microvolt =3D <300000>; regulator-ramp-delay =3D <6250>; }; =20 sw3a_reg: sw3a { - regulator-min-microvolt =3D <400000>; - regulator-max-microvolt =3D <1975000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1975000>; + regulator-min-microvolt =3D <400000>; }; =20 swbst_reg: swbst { - regulator-min-microvolt =3D <5000000>; - regulator-max-microvolt =3D <5150000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <5150000>; + regulator-min-microvolt =3D <5000000>; }; =20 snvs_reg: vsnvs { - regulator-min-microvolt =3D <1000000>; - regulator-max-microvolt =3D <3000000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3000000>; + regulator-min-microvolt =3D <1000000>; }; =20 vref_reg: vrefddr { - regulator-boot-on; regulator-always-on; + regulator-boot-on; }; =20 /* vgen1: unused */ =20 vgen2_reg: vgen2 { - regulator-min-microvolt =3D <800000>; - regulator-max-microvolt =3D <1550000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1550000>; + regulator-min-microvolt =3D <800000>; }; =20 /* @@ -487,57 +487,58 @@ * the i.MX 6 NVCC_SD1. */ vgen3_reg: vgen3 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen4_reg: vgen4 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen5_reg: vgen5 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; =20 vgen6_reg: vgen6 { - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; }; }; }; =20 codec: sgtl5000@a { compatible =3D "fsl,sgtl5000"; - reg =3D <0x0a>; clocks =3D <&clks IMX6QDL_CLK_CKO>; + lrclk-strength =3D <3>; + reg =3D <0x0a>; + #sound-dai-cells =3D <0>; VDDA-supply =3D <®_module_3v3_audio>; VDDIO-supply =3D <®_module_3v3>; VDDD-supply =3D <&vgen4_reg>; - lrclk-strength =3D <3>; }; =20 /* STMPE811 touch screen controller */ stmpe811@41 { compatible =3D "st,stmpe811"; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_touch_int>; - reg =3D <0x41>; + blocks =3D <0x5>; interrupts =3D <20 IRQ_TYPE_LEVEL_LOW>; interrupt-parent =3D <&gpio6>; interrupt-controller; id =3D <0>; - blocks =3D <0x5>; irq-trigger =3D <0x1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_touch_int>; + reg =3D <0x41>; /* 3.25 MHz ADC clock speed */ st,adc-freq =3D <1>; /* 12-bit ADC */ @@ -643,27 +644,27 @@ =20 /* Colibri UART_A */ &uart1 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>; - fsl,dte-mode; uart-has-rtscts; status =3D "disabled"; }; =20 /* Colibri UART_B */ &uart2 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart2_dte>; - fsl,dte-mode; uart-has-rtscts; status =3D "disabled"; }; =20 /* Colibri UART_C */ &uart3 { + fsl,dte-mode; pinctrl-names =3D "default"; pinctrl-0 =3D <&pinctrl_uart3_dte>; - fsl,dte-mode; status =3D "disabled"; }; =20 @@ -675,27 +676,27 @@ =20 /* Colibri MMC */ &usdhc1 { + cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ + bus-width =3D <4>; + no-1-8-v; + disable-wp; pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; - cd-gpios =3D <&gpio2 5 GPIO_ACTIVE_LOW>; /* MMCD */ - disable-wp; vmmc-supply =3D <®_module_3v3>; vqmmc-supply =3D <&vgen3_reg>; - bus-width =3D <4>; - no-1-8-v; status =3D "disabled"; }; =20 /* eMMC */ &usdhc3 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&pinctrl_usdhc3>; - vqmmc-supply =3D <®_module_3v3>; bus-width =3D <8>; no-1-8-v; non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc3>; + vqmmc-supply =3D <®_module_3v3>; status =3D "okay"; }; =20 @@ -737,12 +738,12 @@ =20 pinctrl_audmux: audmuxgrp { fsl,pins =3D < + /* SGTL5000 sys_mclk */ + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0 MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0 MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0 MX6QDL_PAD_KEY_ROW1__AUD5_RXD 0x130b0 - /* SGTL5000 sys_mclk */ - MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0 >; }; =20 @@ -779,26 +780,26 @@ =20 pinctrl_ecspi4: ecspi4grp { fsl,pins =3D < + /* SPI CS */ + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1 MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1 MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1 - /* SPI CS */ - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x000b1 >; }; =20 pinctrl_enet: enetgrp { fsl,pins =3D < + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) + MX6QDL_PAD_GPIO_16__ENET_REF_CLK ((1<<30) | 0x1b0b0) >; }; =20 @@ -835,13 +836,13 @@ >; }; =20 - pinctrl_gpio_bl_on: gpioblon { + pinctrl_gpio_bl_on: gpioblongrp { fsl,pins =3D < MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x1b0b0 >; }; =20 - pinctrl_gpio_keys: gpiokeys { + pinctrl_gpio_keys: gpiokeysgrp { fsl,pins =3D < MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0 >; @@ -856,15 +857,15 @@ =20 pinctrl_i2c2: i2c2grp { fsl,pins =3D < - MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 >; }; =20 pinctrl_i2c2_gpio: i2c2gpiogrp { fsl,pins =3D < - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 MX6QDL_PAD_EIM_D16__GPIO3_IO16 0x4001b8b1 + MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x4001b8b1 >; }; =20 @@ -896,8 +897,8 @@ MX6QDL_PAD_EIM_EB3__IPU1_CSI1_HSYNC 0xb0b1 MX6QDL_PAD_EIM_D29__IPU1_CSI1_VSYNC 0xb0b1 /* Disable PWM pins on camera interface */ - MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40 MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x40 + MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x40 >; }; =20 @@ -937,14 +938,14 @@ >; }; =20 - pinctrl_mic_gnd: gpiomicgnd { + pinctrl_mic_gnd: micgndgrp { fsl,pins =3D < /* Controls Mic GND, PU or '1' pull Mic GND to GND */ MX6QDL_PAD_RGMII_TD1__GPIO6_IO21 0x1b0b0 >; }; =20 - pinctrl_mmc_cd: gpiommccd { + pinctrl_mmc_cd: mmccdgrp { fsl,pins =3D < MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x1b0b1 >; @@ -958,15 +959,15 @@ =20 pinctrl_pwm2: pwm2grp { fsl,pins =3D < - MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x00040 + MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1 >; }; =20 pinctrl_pwm3: pwm3grp { fsl,pins =3D < - MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x00040 + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 >; }; =20 @@ -983,13 +984,6 @@ >; }; =20 - pinctrl_usbh_oc_1: usbhoc1grp { - fsl,pins =3D < - /* USBH_OC */ - MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 - >; - }; - pinctrl_spdif: spdifgrp { fsl,pins =3D < MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 @@ -1032,9 +1026,9 @@ pinctrl_uart2_dte: uart2dtegrp { fsl,pins =3D < MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 - MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1 + MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA 0x1b0b1 >; }; =20 @@ -1049,20 +1043,27 @@ fsl,pins =3D < /* USBC_DET */ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 - /* USBC_DET_EN */ - MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058 /* USBC_DET_OVERWRITE */ MX6QDL_PAD_RGMII_RXC__GPIO6_IO30 0x0f058 + /* USBC_DET_EN */ + MX6QDL_PAD_RGMII_TX_CTL__GPIO6_IO26 0x0f058 >; }; =20 - pinctrl_usbc_id_1: usbc_id-1 { + pinctrl_usbc_id_1: usbcid1grp { fsl,pins =3D < /* USBC_ID */ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 >; }; =20 + pinctrl_usbh_oc_1: usbhoc1grp { + fsl,pins =3D < + /* USBH_OC */ + MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x1b0b0 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 @@ -1074,7 +1075,7 @@ >; }; =20 - pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170b1 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100b1 @@ -1085,7 +1086,7 @@ >; }; =20 - pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { fsl,pins =3D < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f1 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f1 @@ -1134,135 +1135,136 @@ >; }; =20 - pinctrl_weim_sram: weimsramgrp { - fsl,pins =3D < - MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 - MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 - /* Data */ - MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0 - MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0 - MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0 - MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0 - MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0 - MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0 - MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0 - MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0 - MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0 - MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0 - MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0 - MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0 - MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0 - MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0 - MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0 - MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0 - /* Address */ - MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 - MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 - MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 - MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 - MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 - MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 - MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 - MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 - MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 - MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 - MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 - MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 - MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 - MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 - MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 - MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 - >; - }; - - pinctrl_weim_rdnwr: weimrdnwr { - fsl,pins =3D < - MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040 - MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0 - >; - }; - - pinctrl_weim_npwe: weimnpwe { - fsl,pins =3D < - MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040 - MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0 - >; - }; - /* ADDRESS[16:18] [25] used as GPIO */ - pinctrl_weim_gpio_1: weimgpio-1 { + pinctrl_weim_gpio_1: weimgpio1grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 - MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 >; }; =20 /* ADDRESS[19:24] used as GPIO */ - pinctrl_weim_gpio_2: weimgpio-2 { + pinctrl_weim_gpio_2: weimgpio2grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 - MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 - MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 - MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 - MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 - MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 - MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x1b0b0 + MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x1b0b0 + MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x1b0b0 + MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x1b0b0 + MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x1b0b0 + MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 >; }; =20 /* DATA[16:31] used as GPIO */ - pinctrl_weim_gpio_3: weimgpio-3 { + pinctrl_weim_gpio_3: weimgpio3grp { fsl,pins =3D < + MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 MX6QDL_PAD_EIM_LBA__GPIO2_IO27 0x1b0b0 MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0 - MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 - MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 - MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 + MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x1b0b0 - MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x1b0b0 + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0 + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x1b0b0 MX6QDL_PAD_NANDF_CLE__GPIO6_IO07 0x1b0b0 - MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 - MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x1b0b0 - MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b0 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b0b0 + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09 0x1b0b0 >; }; =20 /* DQM[0:3] used as GPIO */ - pinctrl_weim_gpio_4: weimgpio-4 { + pinctrl_weim_gpio_4: weimgpio4grp { fsl,pins =3D < MX6QDL_PAD_EIM_EB0__GPIO2_IO28 0x1b0b0 MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x1b0b0 - MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 + MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 0x1b0b0 >; }; =20 /* RDY used as GPIO */ - pinctrl_weim_gpio_5: weimgpio-5 { + pinctrl_weim_gpio_5: weimgpio5grp { fsl,pins =3D < MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x1b0b0 >; }; =20 /* ADDRESS[16] DATA[30] used as GPIO */ - pinctrl_weim_gpio_6: weimgpio-6 { + pinctrl_weim_gpio_6: weimgpio6grp { fsl,pins =3D < - MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + >; + }; + + pinctrl_weim_npwe: weimnpwegrp { + fsl,pins =3D < + MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 0x130b0 + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x0040 + >; + }; + + pinctrl_weim_sram: weimsramgrp { + fsl,pins =3D < + /* Data */ + MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0 + MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0 + MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0 + MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0 + MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0 + MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0 + MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0 + MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0 + MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0 + MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0 + MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0 + MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0 + MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0 + MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0 + MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0 + MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0 + /* Address */ + MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 + MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 + MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 + MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 + MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 + MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 + MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 + MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 + MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 + MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 + MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 + MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 + MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 + MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 + MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 + MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 + /* Ctrl */ + MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 + MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 + >; + }; + + pinctrl_weim_rdnwr: weimrdnwrgrp { + fsl,pins =3D < + MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x130b0 + MX6QDL_PAD_SD2_CLK__GPIO1_IO10 0x0040 >; }; }; --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AFB1BC433EF for ; Mon, 14 Mar 2022 16:30:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243067AbiCNQbu (ORCPT ); Mon, 14 Mar 2022 12:31:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60072 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243026AbiCNQbl (ORCPT ); Mon, 14 Mar 2022 12:31:41 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 95D1C1F62A; Mon, 14 Mar 2022 09:30:26 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id q20so9652192wmq.1; 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:24 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Fabio Estevam , NXP Linux Team , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 11/14] ARM: dts: imx6dl-colibri: Add usdhc1 sleep pin configuration Date: Mon, 14 Mar 2022 17:29:55 +0100 Message-Id: <20220314162958.40361-12-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The Toradex board Iris V2 has a SD-card slot with switchable power. Add a pinctrl sleep used when the card power is off to avoid backfeeding to the card and add the "sleep" pinctrl to the usdhc1 controller. Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/imx6qdl-colibri.dtsi | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx= 6qdl-colibri.dtsi index 1c3c34bbfe98..c383e0e4110c 100644 --- a/arch/arm/boot/dts/imx6qdl-colibri.dtsi +++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi @@ -680,10 +680,11 @@ bus-width =3D <4>; no-1-8-v; disable-wp; - pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; pinctrl-0 =3D <&pinctrl_usdhc1 &pinctrl_mmc_cd>; pinctrl-1 =3D <&pinctrl_usdhc1_100mhz &pinctrl_mmc_cd>; pinctrl-2 =3D <&pinctrl_usdhc1_200mhz &pinctrl_mmc_cd>; + pinctrl-3 =3D <&pinctrl_usdhc1_sleep &pinctrl_mmc_cd_sleep>; vmmc-supply =3D <®_module_3v3>; vqmmc-supply =3D <&vgen3_reg>; status =3D "disabled"; @@ -951,6 +952,12 @@ >; }; =20 + pinctrl_mmc_cd_sleep: mmccdslpgrp { + fsl,pins =3D < + MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x0 + >; + }; + pinctrl_pwm1: pwm1grp { fsl,pins =3D < MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 @@ -1097,6 +1104,18 @@ >; }; =20 + /* avoid backfeeding with removed card power */ + pinctrl_usdhc1_sleep: usdhc1sleepgrp { + fsl,pins =3D < + MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000 + MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000 + MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000 + MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000 + MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000 + MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000 + >; + }; + pinctrl_usdhc3: usdhc3grp { fsl,pins =3D < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C657C433F5 for ; Mon, 14 Mar 2022 16:30:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243106AbiCNQbz (ORCPT ); Mon, 14 Mar 2022 12:31:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59818 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243052AbiCNQbm (ORCPT ); Mon, 14 Mar 2022 12:31:42 -0400 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AFD5021E27; Mon, 14 Mar 2022 09:30:27 -0700 (PDT) Received: by mail-wm1-x333.google.com with SMTP id r190-20020a1c2bc7000000b0038a1013241dso2070607wmr.1; Mon, 14 Mar 2022 09:30:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sUiuL/SLTL5qZDZc0QyDeYZA2leqxHPH8yxtrmp6gNU=; b=mzBDZbPOnbtPVfj2Q8lifvmkN3ZTae9fpCvwJ5+1nGIW1wYJRW1ceOvOaZ+T57mARS HLhTxCDRU5tQEWRTLkTqmwWSgzUbNMBCZaQs6YzyhaJdWqf31pIjl2H09Vvs3HHTemoY cN9fT1Z1iZG33dKkr77BC4gqfxGuCdGykN+mvwV7L2Byl7WUr9Nur/D8Tq6XC2OH+rvy xaB9BkY6CTkEMa7zc04FXYqKyxgh59Un66jJYwoA5zi/4CE1AzYlRVnA4xHIsIS+//GC 5CxlyiuVOvd8UGS3X3C4KVpAOXLkWA3KgIZk8+z1NCAyhTv2exTGvNa1yLf75NYgmoRf uqcA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sUiuL/SLTL5qZDZc0QyDeYZA2leqxHPH8yxtrmp6gNU=; b=PqYEqCylNO6Hiu6ogBsWvXPph5cAQFicyiegbfbO8/44FyS7tKe0qR67z/8TZOWaTB r9PGOW7u2ugfh+KiEm0dJeh7xmKeUOOFB7O14kALf20BpmcPrGlzDoc+PC8SwGftPfj8 eMat0+bkJVBZm1hRd2dGsC/Yy1ob7ZKjUwjCbriBoWI4BRvB6F+uGYZ1nXlL5z/MLGSz BV0vlYyNOaRsGggO1KiFdK0o26777J7A20F/bYzJM/uzzMwT8H0gmnrDSz378Eb4P97I ZhKpb63p/DZGNG/bwy7vEnfSZ1tW2kuZbAI2cpeKP5qVx7R7kJQFm9ZBHvwOYYE6hw34 F0Vg== X-Gm-Message-State: AOAM530iMTIigcAjt07RL7yHPdp2/J6ABkZKUFADKz4YkHl9Pij54e8q dAqSUIrgkFiQU6m+kxlRy/k= X-Google-Smtp-Source: ABdhPJx3oNhVBMlq7IA3vdNtCp52Q09BFBnwfbLHCrliBUGCmAQwSQ3NCqEaxXRQAJuVfv93hTUGkQ== X-Received: by 2002:a1c:7708:0:b0:381:f18b:29ca with SMTP id t8-20020a1c7708000000b00381f18b29camr30405wmi.140.1647275426193; Mon, 14 Mar 2022 09:30:26 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:25 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 12/14] ARM: dts: imx6dl-colibri: Add support for Toradex Iris carrier boards Date: Mon, 14 Mar 2022 17:29:56 +0100 Message-Id: <20220314162958.40361-13-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for Toradex Iris, small form-factor Pico-ITX Colibri Arm Computer Module family Carrier Board. Additional details available at https://www.toradex.com/products/carrier-board/iris-carrier-board Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts | 46 ++++++ arch/arm/boot/dts/imx6dl-colibri-iris.dts | 152 +++++++++++++++++++ 3 files changed, 200 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts create mode 100644 arch/arm/boot/dts/imx6dl-colibri-iris.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ee27bafa69be..b636bae2b281 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -453,6 +453,8 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ imx6dl-colibri-eval-v3.dtb \ + imx6dl-colibri-iris.dtb \ + imx6dl-colibri-iris-v2.dtb \ imx6dl-cubox-i.dtb \ imx6dl-cubox-i-emmc-som-v15.dtb \ imx6dl-cubox-i-som-v15.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts b/arch/arm/boot/d= ts/imx6dl-colibri-iris-v2.dts new file mode 100644 index 000000000000..3a6d3889760d --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-iris-v2.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include "imx6dl-colibri-iris.dts" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board"; + compatible =3D "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + reg_3v3_vmmc: regulator-3v3-vmmc { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enable_3v3_vmmc>; + regulator-name =3D "3v3_vmmc"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + gpio =3D <&gpio2 11 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <100>; + enable-active-high; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>; + + pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp { + fsl,pins =3D < + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; +}; + +/* Colibri MMC */ +&usdhc1 { + cap-power-off-card; + /* uncomment the following to enable SD card UHS mode if you have a V1.1 = module */ + /* /delete-property/ no-1-8-v; */ + vmmc-supply =3D <®_3v3_vmmc>; + status =3D "okay"; +}; diff --git a/arch/arm/boot/dts/imx6dl-colibri-iris.dts b/arch/arm/boot/dts/= imx6dl-colibri-iris.dts new file mode 100644 index 000000000000..cf77d894f6d7 --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-iris.dts @@ -0,0 +1,152 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include +#include +#include "imx6dl.dtsi" +#include "imx6qdl-colibri.dtsi" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Iris Board"; + compatible =3D "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + aliases { + i2c0 =3D &i2c2; + i2c1 =3D &i2c3; + }; + + aliases { + rtc0 =3D &rtc_i2c; + rtc1 =3D &snvs_rtc; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; +}; + +/* Colibri SSP */ +&ecspi4 { + status =3D "okay"; +}; + +&gpio2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>; + + /* + * uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one + * wants to turn the transceiver off, that property has to be deleted + * and the gpio handled in userspace. + * The same applies to uart-b-c-on-x14-enable where the UART_B and + * UART_C transceiver is turned on. + */ + uart-a-on-x13-enable-hog { + gpio-hog; + gpios =3D <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */ + output-high; + }; + + uart-b-c-on-x14-enable-hog { + gpio-hog; + gpios =3D <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */ + output-high; + }; +}; + +/* + * Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) + */ +&i2c3 { + status =3D "okay"; + + rtc_i2c: rtc@68 { + compatible =3D "st,m41t0"; + reg =3D <0x68>; + }; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D < + &pinctrl_gpio_iris + &pinctrl_usbh_oc_1 + &pinctrl_usbc_id_1 + >; + + pinctrl_gpio_iris: gpioirisgrp { + fsl,pins =3D < + MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 + MX6QDL_PAD_EIM_A18__GPIO2_IO20 0x1b0b0 + MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x1b0b0 + MX6QDL_PAD_EIM_A20__GPIO2_IO18 0x1b0b0 + MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x1b0b0 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + >; + }; + + pinctrl_uart1_forceoff: uart1forceoffgrp { + fsl,pins =3D < + MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x1b0b0 + >; + }; + + pinctrl_uart23_forceoff: uart23forceoffgrp { + fsl,pins =3D < + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + >; + }; +}; + +&pwm1 { + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +&pwm3 { + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +®_usb_host_vbus { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart3 { + status =3D "okay"; +}; + +&usbh1 { + vbus-supply =3D <®_usb_host_vbus>; + status =3D "okay"; +}; + +&usbotg { + status =3D "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + status =3D "okay"; +}; --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8F9BC433EF for ; Mon, 14 Mar 2022 16:30:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243113AbiCNQcB (ORCPT ); Mon, 14 Mar 2022 12:32:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243078AbiCNQbm (ORCPT ); Mon, 14 Mar 2022 12:31:42 -0400 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AB65427FE8; Mon, 14 Mar 2022 09:30:28 -0700 (PDT) Received: by mail-wm1-x329.google.com with SMTP id l10so9671115wmb.0; Mon, 14 Mar 2022 09:30:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WuVI0nPhGtQzp4CrtyVyV4ed7h4ZcDvX7476/A1+K3w=; b=BJM1L64z93lfJaq5ARjBD2zPT+o3YIM2ZT8AWwwuy8IY86hKQeF9Aev0rlGdEnhpH/ jSh5x5FXVGYtCl3RoUM1UbwSmnWEgZn2AesZhJHG4yw7JiL62m0HQetjRtwaY9NerHCI 9mzBsMAW+1gp7cl/GY7DxqgAzUY2qRdRe9qwdthKh5RcyboL7nFrFsVXPhCbl8gfqP56 mn4LyOhQp2hYsmH/2EEaBuDYtlonFD4v+qAOtW7AttiMg/o1Ep1CKIbcFrlxo17fAORM KXiZgvyvovxoJ5XylyQlj/BoBp/i4yxC98yf9bj2eCVxd+7QkmwR/VQXX8tk4iZTDH6y zO2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WuVI0nPhGtQzp4CrtyVyV4ed7h4ZcDvX7476/A1+K3w=; b=xUKRH/NgP+yGreK0gAZlwgXQ55p0F7MKAG6K1HQBI0POfgLEKw3rMF+0RL8IpiqEc3 D5KfdGoK7LZQiJvDt6Z0tci7pRGKKwGkoSt7nEwvEcAcdndIGXNvbI5Y615v6r/AthKy CHhdWt4Jz8iqo9Z7aPXCyEUT0Gy6oO5IIvkRnW+W/+/sAkvrcE0CX+hz7NCrLo1I5+k/ jbDZAGn5qduOoAgL/WM6a0+m5EF2k3F/q9C5c6Cc9ZSiQeoCYN/Ab14nm2oVnCHdkhDz bNxh7iCSNfwn8gWFyaPPzAkydgW/zLjpgkRfLU3oVy/1PvZjoMbOQv4gDmp7IK43q9K2 CP9w== X-Gm-Message-State: AOAM532GjEqSdXOodV6Fnt2Ow6wZQUdKDx5U+A2nprFTqeTVbxAlhKjj zWDSYasp+X/8K0mT5ZAGslc= X-Google-Smtp-Source: ABdhPJyL/rCC47v7tOuZQq1uNrbhEHitNTUFBF+E9bWYFtmGL+8VEoCbg/ucrkd/XwVNcBFMuPC+0Q== X-Received: by 2002:a1c:f312:0:b0:387:8bf:bd3 with SMTP id q18-20020a1cf312000000b0038708bf0bd3mr34440wmq.112.1647275427159; Mon, 14 Mar 2022 09:30:27 -0700 (PDT) Received: from linuxdev2.toradex.int (31-10-206-124.static.upc.ch. [31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:26 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Arnd Bergmann , Fabio Estevam , NXP Linux Team , Olof Johansson , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, soc@kernel.org Subject: [PATCH v1 13/14] ARM: dts: imx6dl-colibri: Add support for Toradex Aster carrier board Date: Mon, 14 Mar 2022 17:29:57 +0100 Message-Id: <20220314162958.40361-14-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add support for Toradex Aster, small form-factor with header compatible with Arduino Uno and Raspberry Pi (RPi) maker boards. Additional detail available at https://www.toradex.com/products/carrier-boards/aster-carrier-board Signed-off-by: Max Krummenacher --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6dl-colibri-aster.dts | 113 +++++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 arch/arm/boot/dts/imx6dl-colibri-aster.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b636bae2b281..4802c8b0ee1a 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -452,6 +452,7 @@ dtb-$(CONFIG_SOC_IMX6Q) +=3D \ imx6dl-aristainetos_7.dtb \ imx6dl-aristainetos2_4.dtb \ imx6dl-aristainetos2_7.dtb \ + imx6dl-colibri-aster.dtb \ imx6dl-colibri-eval-v3.dtb \ imx6dl-colibri-iris.dtb \ imx6dl-colibri-iris-v2.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-colibri-aster.dts b/arch/arm/boot/dts= /imx6dl-colibri-aster.dts new file mode 100644 index 000000000000..74e8a6cd8bed --- /dev/null +++ b/arch/arm/boot/dts/imx6dl-colibri-aster.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2022 Toradex + */ + +/dts-v1/; + +#include +#include +#include "imx6dl.dtsi" +#include "imx6qdl-colibri.dtsi" + +/ { + model =3D "Toradex Colibri iMX6DL/S on Colibri Aster Board"; + compatible =3D "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl", + "fsl,imx6dl"; + + aliases { + i2c0 =3D &i2c2; + i2c1 =3D &i2c3; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; +}; + +/* Colibri SSP */ +&ecspi4 { + cs-gpios =3D < + &gpio5 2 GPIO_ACTIVE_HIGH + &gpio5 4 GPIO_ACTIVE_HIGH + >; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>; + status =3D "okay"; +}; + +/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */ +&i2c3 { + status =3D "okay"; +}; + +&iomuxc { + pinctrl-names =3D "default"; + pinctrl-0 =3D < + &pinctrl_csi_gpio_1 + &pinctrl_gpio_2 + &pinctrl_gpio_aster + &pinctrl_usbh_oc_1 + &pinctrl_usbc_id_1 + &pinctrl_weim_gpio_5 + >; + + pinctrl_gpio_aster: gpioaster { + fsl,pins =3D < + MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0 + >; + }; +}; + +&pwm1 { + status =3D "okay"; +}; + +&pwm2 { + status =3D "okay"; +}; + +&pwm3 { + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +®_usb_host_vbus { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; +}; + +&uart2 { + status =3D "okay"; +}; + +&uart3 { + status =3D "okay"; +}; + +&usbh1 { + vbus-supply =3D <®_usb_host_vbus>; + status =3D "okay"; +}; + +&usbotg { + status =3D "okay"; +}; + +/* Colibri MMC */ +&usdhc1 { + status =3D "okay"; +}; --=20 2.20.1 From nobody Tue Jun 23 01:18:08 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4B7EC433EF for ; Mon, 14 Mar 2022 16:31:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243136AbiCNQcN (ORCPT ); Mon, 14 Mar 2022 12:32:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60222 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243068AbiCNQbn (ORCPT ); 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[31.10.206.124]) by smtp.gmail.com with ESMTPSA id w10-20020a5d680a000000b001f1dabec837sm13476817wru.113.2022.03.14.09.30.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Mar 2022 09:30:27 -0700 (PDT) From: Max Krummenacher X-Google-Original-From: Max Krummenacher To: max.krummenacher@toradex.com Cc: Alistair Francis , Douglas Anderson , Fabio Estevam , Johann Neuhauser , Marcel Ziswiler , NXP Linux Team , Pascal Zimmermann , Pengutronix Kernel Team , Russell King , Sascha Hauer , Shawn Guo , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 14/14] ARM: imx_v6_v7_defconfig: Enable the ADC part of the STMPE MFD Date: Mon, 14 Mar 2022 17:29:58 +0100 Message-Id: <20220314162958.40361-15-max.krummenacher@toradex.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220314162958.40361-1-max.krummenacher@toradex.com> References: <20220314162958.40361-1-max.krummenacher@toradex.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The SoM Apalis/Colibri iMX6 use the ADC of a STMPE 811. Enable its driver. Signed-off-by: Max Krummenacher --- arch/arm/configs/imx_v6_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6= _v7_defconfig index f7498df08dfe..88a3602c4e58 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -402,6 +402,7 @@ CONFIG_IIO=3Dy CONFIG_MMA8452=3Dy CONFIG_IMX7D_ADC=3Dy CONFIG_RN5T618_ADC=3Dy +CONFIG_STMPE_ADC=3Dy CONFIG_VF610_ADC=3Dy CONFIG_SENSORS_ISL29018=3Dy CONFIG_MAG3110=3Dy --=20 2.20.1