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[188.155.181.108]) by smtp.gmail.com with ESMTPSA id a9-20020a1709066d4900b006da888c3ef0sm3720444ejt.108.2022.03.06.03.11.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Mar 2022 03:11:43 -0800 (PST) From: Krzysztof Kozlowski To: Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Wei Xu , Matthias Brugger , Jan Kotas , Li Wei , Stanley Chu , Vignesh Raghavendra , linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v3 09/12] arm64: dts: hisilicon: align 'freq-table-hz' with dtschema in UFS Date: Sun, 6 Mar 2022 12:11:22 +0100 Message-Id: <20220306111125.116455-10-krzysztof.kozlowski@canonical.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220306111125.116455-1-krzysztof.kozlowski@canonical.com> References: <20220306111125.116455-1-krzysztof.kozlowski@canonical.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The DT schema expects 'freq-table-hz' property to be an uint32-matrix, which is also easier to read. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 4 ++-- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dt= s/hisilicon/hi3660.dtsi index 8bd6d7e8a474..6b3057a09251 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -1045,8 +1045,8 @@ ufs: ufs@ff3b0000 { clocks =3D <&crg_ctrl HI3660_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3660_CLK_GATE_UFSPHY_CFG>; clock-names =3D "ref_clk", "phy_clk"; - freq-table-hz =3D <0 0 - 0 0>; + freq-table-hz =3D <0 0>, + <0 0>; /* offset: 0x84; bit: 12 */ resets =3D <&crg_rst 0x84 12>; reset-names =3D "rst"; diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dt= s/hisilicon/hi3670.dtsi index 636c8817df7e..3125c3869c69 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -671,8 +671,8 @@ ufs: ufs@ff3c0000 { clocks =3D <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>, <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>; clock-names =3D "ref_clk", "phy_clk"; - freq-table-hz =3D <0 0 - 0 0>; + freq-table-hz =3D <0 0>, + <0 0>; /* offset: 0x84; bit: 12 */ resets =3D <&crg_rst 0x84 12>; reset-names =3D "rst"; --=20 2.32.0