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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id g6-20020a5d5406000000b001f049726044sm4937307wrv.79.2022.03.04.08.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Mar 2022 08:15:26 -0800 (PST) From: Alexandre Bailon To: ohad@wizery.com, bjorn.andersson@linaro.org, mathieu.poirier@linaro.org, robh+dt@kernel.or Cc: matthias.bgg@gmail.com, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, stephane.leprovost@mediatek.com, khilman@baylibre.com, Alexandre Bailon Subject: [PATCH v4 1/7] dt bindings: remoteproc: Add bindings for the MT8183 APU Date: Fri, 4 Mar 2022 17:15:08 +0100 Message-Id: <20220304161514.994128-2-abailon@baylibre.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220304161514.994128-1-abailon@baylibre.com> References: <20220304161514.994128-1-abailon@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" This adds dt bindings for the APU present in the MT8183. Signed-off-by: Alexandre Bailon --- .../bindings/remoteproc/mtk,apu.yaml | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) create mode 100644 Documentation/devicetree/bindings/remoteproc/mtk,apu.ya= ml diff --git a/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml b/Do= cumentation/devicetree/bindings/remoteproc/mtk,apu.yaml new file mode 100644 index 000000000000..b640aa96d678 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/mtk,apu.yaml @@ -0,0 +1,122 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 + +--- +$id: "http://devicetree.org/schemas/remoteproc/mtk,apu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Mediatek AI Processor Unit (APU) + +description: + This document defines the binding for the APU, a co-processor that could + offload the CPU for machine learning and neural network. + +maintainers: + - Alexandre Bailon + +properties: + compatible: + const: mediatek,mt8183-apu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: axi + - const: ipu + - const: jtag + + iommus: + maxItems: 3 + + memory-region: + maxItems: 3 + + memory-region-da: + description: + Array of APU device address. This is used to map the APU device addr= ess + to a physical address. + maxItems: 3 + + power-domains: + maxItems: 1 + + pinctrl: + description: pinctrl handles, required to configure pins for JTAG. + + pinctrl-names: + items: + - const: jtag + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - iommus + - memory-region + - memory-region-da + - power-domains + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + reserved-memory { + #address-cells =3D <1>; + #size-cells =3D <1>; + ranges; + + vdev0buffer: vdev0buffer@52900000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x52900000 0x4000>; + no-map; + }; + + vdev0vring0: vdev0vring0@52904000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x52904000 0x2000>; + no-map; + }; + + vdev0vring1: vdev0vring1@52906000 { + compatible =3D "shared-dma-pool"; + reg =3D <0x52906000 0x2000>; + no-map; + }; + }; + + apu0: apu@19100000 { + compatible =3D "mediatek,mt8183-apu"; + reg =3D <0x19180000 0x14000>; + interrupts =3D ; + + iommus =3D <&iommu M4U_PORT_IMG_IPUO>, + <&iommu M4U_PORT_IMG_IPU3O>, + <&iommu M4U_PORT_IMG_IPUI>; + + clocks =3D <&ipu_core0 CLK_IPU_CORE0_AXI>, + <&ipu_core0 CLK_IPU_CORE0_IPU>, + <&ipu_core0 CLK_IPU_CORE0_JTAG>; + + clock-names =3D "axi", "ipu", "jtag"; + + power-domains =3D <&scpsys MT8183_POWER_DOMAIN_VPU_CORE0>; + memory-region =3D <&vdev0buffer>, <&vdev0vring0>, <&vdev0vring1>; + memory-region-da =3D <0x6fff8000>, <0x6fffc000>, <0x6fffe000>; + }; +... --=20 2.34.1