From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BB19EC43219 for ; Fri, 4 Mar 2022 15:36:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240420AbiCDPhN (ORCPT ); Fri, 4 Mar 2022 10:37:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41358 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233777AbiCDPhG (ORCPT ); Fri, 4 Mar 2022 10:37:06 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 574741C60E2; Fri, 4 Mar 2022 07:36:19 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2049522247; Fri, 4 Mar 2022 16:36:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R2mmjz+Kg+zve+C9vJUel319BOl8L2+J2zRG93WOEoE=; b=eBF5ri9WplXjvZ++J5L2seyyC2gJlQA860VCgRmP2WLAbiY23uQj/Q2jmwLB5srT/Y6NZS Ua36XrALVU2oVkx0yec5AQdnmiHbUkBIUGmbVy/Hr7YxD7x8OzEhZW6GPVf1B/zQE/gzwX nBMHQTe8xzLGcbPnzkHupb4ujIdiXIU= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 1/7] ARM: dts: lan966x: swap dma channels for crypto node Date: Fri, 4 Mar 2022 16:35:42 +0100 Message-Id: <20220304153548.3364480-2-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The YAML binding (crypto/atmel,at91sam9g46-aes.yaml) mandates the order of the channels. Swap them to pass devicetree validation. Fixes: 290deaa10c50 ("ARM: dts: add DT for lan966 SoC and 2-port board pcb8= 291") Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7d2869648050..5e9cbc8cdcbc 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -114,9 +114,9 @@ aes: crypto@e004c000 { compatible =3D "atmel,at91sam9g46-aes"; reg =3D <0xe004c000 0x100>; interrupts =3D ; - dmas =3D <&dma0 AT91_XDMAC_DT_PERID(13)>, - <&dma0 AT91_XDMAC_DT_PERID(12)>; - dma-names =3D "rx", "tx"; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(12)>, + <&dma0 AT91_XDMAC_DT_PERID(13)>; + dma-names =3D "tx", "rx"; clocks =3D <&nic_clk>; clock-names =3D "aes_clk"; }; --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 87D5EC433F5 for ; Fri, 4 Mar 2022 15:36:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233910AbiCDPhQ (ORCPT ); Fri, 4 Mar 2022 10:37:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240389AbiCDPhH (ORCPT ); Fri, 4 Mar 2022 10:37:07 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F1C731C60ED; Fri, 4 Mar 2022 07:36:19 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id C6C39223ED; Fri, 4 Mar 2022 16:36:17 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408177; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RxLOGbpQNwRx2KKbHLEwXJ5hTTQqVuqevKqD6qnm1ew=; b=hYwEb5WILQ78SkPreh/lepSw5RCJxV+CoZ2b0jT2sNBsvIUyaCHnzaXsN7NwBS96R1aJF2 Ha/eFS2IBVxW+VSmpkoZpc0BjRc+o9XV0bssxQaaOZTQdnzyIHPnNFH+yvLDrtr25wxhSG VnFgWRVtjiyK9kK3MlwGZerHPGxdV3Q= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 2/7] ARM: dts: lan966x: add sgpio node Date: Fri, 4 Mar 2022 16:35:43 +0100 Message-Id: <20220304153548.3364480-3-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add the device tree node for the SGPIO IP block reused from the SparX-5. Keep the node disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 5e9cbc8cdcbc..39dfdb8e29ed 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -223,6 +223,32 @@ gpio: pinctrl@e2004064 { #interrupt-cells =3D <2>; }; =20 + sgpio: gpio@e2004190 { + compatible =3D "microchip,sparx5-sgpio"; + reg =3D <0xe2004190 0x118>; + clocks =3D <&sys_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + + sgpio_in: gpio@0 { + compatible =3D "microchip,sparx5-sgpio-bank"; + reg =3D <0>; + gpio-controller; + #gpio-cells =3D <3>; + interrupts =3D ; + interrupt-controller; + #interrupt-cells =3D <3>; + }; + + sgpio_out: gpio@1 { + compatible =3D "microchip,sparx5-sgpio-bank"; + reg =3D <1>; + gpio-controller; + #gpio-cells =3D <3>; + }; + }; + gic: interrupt-controller@e8c11000 { compatible =3D "arm,gic-400", "arm,cortex-a7-gic"; #interrupt-cells =3D <3>; --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7CFE0C433F5 for ; Fri, 4 Mar 2022 15:36:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240434AbiCDPhY (ORCPT ); Fri, 4 Mar 2022 10:37:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240390AbiCDPhH (ORCPT ); Fri, 4 Mar 2022 10:37:07 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D8861C4B3F; Fri, 4 Mar 2022 07:36:20 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 48C8C223EF; Fri, 4 Mar 2022 16:36:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408178; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=BnNAbVT0vaSgxG9HwhKDZpxUdWN7OJ8SoTprLMlFALQ=; b=tDXI74AoueOgZohRxucZHb38HHdmXWMD56uUsCYl4g/3O2Utf49Heosxc51wyOnyaGOoK+ qNaDf9a3IBCHlz2hq1Gm0g56IeJiuBhrb2eVNQwlRYHMr2iAV/k8GhdHvB4hu9t9R14yh6 ly6IV5cbo9fVWCAMQgH9cx+5sddHtcw= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 3/7] ARM: dts: lan966x: add missing uart DMA channel Date: Fri, 4 Mar 2022 16:35:44 +0100 Message-Id: <20220304153548.3364480-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" The usart node of the flexcom3 block is missing the DMA channels. Add it. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 39dfdb8e29ed..230de3bdd5f1 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -144,6 +144,9 @@ usart3: serial@200 { compatible =3D "atmel,at91sam9260-usart"; reg =3D <0x200 0x200>; interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names =3D "tx", "rx"; clocks =3D <&nic_clk>; clock-names =3D "usart"; atmel,fifo-size =3D <32>; --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 43308C433EF for ; Fri, 4 Mar 2022 15:36:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240428AbiCDPhV (ORCPT ); Fri, 4 Mar 2022 10:37:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41382 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240391AbiCDPhI (ORCPT ); Fri, 4 Mar 2022 10:37:08 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 97EEA1C60E2; Fri, 4 Mar 2022 07:36:20 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id CD1D1223F0; Fri, 4 Mar 2022 16:36:18 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408178; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lKIFBjmmiLVpbQeUcyktL1KPVgUZRlv2ySWuv2vM0eg=; b=azp2WsZwsOmopx5TPc+GxV1BQGs2pBaZmu4Hux0ZxNUKJ3eebLR3aZMZL6LAIFiIL12r8A 6KhPZ45BIdfDZH9UVE/iAWfiW9tKQXU1ZMk5oz+SXL9OaosT/44nyWHUfwz/+d2WN3HmOq Inrn4kwGUQ1xuJQZmYpmAjYyM95C34k= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 4/7] ARM: dts: lan966x: add all flexcom usart nodes Date: Fri, 4 Mar 2022 16:35:45 +0100 Message-Id: <20220304153548.3364480-5-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add all the remaining usart nodes for the flexcom block. Although the DMA channels are specified, DMA is not enabled by default because break detection doesn't work with DMA. Keep the nodes disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 52 ++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 230de3bdd5f1..d7eacb0144f5 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -92,6 +92,19 @@ flx0: flexcom@e0040000 { #size-cells =3D <1>; ranges =3D <0x0 0xe0040000 0x800>; status =3D "disabled"; + + usart0: serial@200 { + compatible =3D "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "usart"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx1: flexcom@e0044000 { @@ -102,6 +115,19 @@ flx1: flexcom@e0044000 { #size-cells =3D <1>; ranges =3D <0x0 0xe0044000 0x800>; status =3D "disabled"; + + usart1: serial@200 { + compatible =3D "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "usart"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 trng: rng@e0048000 { @@ -129,6 +155,19 @@ flx2: flexcom@e0060000 { #size-cells =3D <1>; ranges =3D <0x0 0xe0060000 0x800>; status =3D "disabled"; + + usart2: serial@200 { + compatible =3D "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "usart"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 flx3: flexcom@e0064000 { @@ -181,6 +220,19 @@ flx4: flexcom@e0070000 { #size-cells =3D <1>; ranges =3D <0x0 0xe0070000 0x800>; status =3D "disabled"; + + usart4: serial@200 { + compatible =3D "atmel,at91sam9260-usart"; + reg =3D <0x200 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "usart"; + atmel,fifo-size =3D <32>; + status =3D "disabled"; + }; }; =20 timer0: timer@e008c000 { --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B4B4BC433F5 for ; Fri, 4 Mar 2022 15:36:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240449AbiCDPhb (ORCPT ); Fri, 4 Mar 2022 10:37:31 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41396 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240394AbiCDPhJ (ORCPT ); Fri, 4 Mar 2022 10:37:09 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49FC31C60F0; Fri, 4 Mar 2022 07:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 26619223F6; Fri, 4 Mar 2022 16:36:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xMCJ+lU+MWE4vqOFR8IKh9GXlrMyHGvoO37Jb4co/D8=; b=OfvQnuzFi9WBj10hhC1dYjn6edDlZmbWNp1hPMCBq0EfGLqIxvexrSBrYzsr1n/dzqRiHM iTUFmIZSWH25/f8xp/K04SZIExeSeJG8ywnKVhSphJxoeghwKPIKYrJwRwOJOL2YfBG7py 9YHkt2aXBcmpEdKki994k/4/m9fivwM= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 5/7] ARM: dts: lan966x: add flexcom SPI nodes Date: Fri, 4 Mar 2022 16:35:46 +0100 Message-Id: <20220304153548.3364480-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add all the SPI nodes for the flexcom IP block. Keep them disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 75 ++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index d7eacb0144f5..a61d394ad04d 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -105,6 +105,21 @@ usart0: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi0: spi@400 { + compatible =3D "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 flx1: flexcom@e0044000 { @@ -128,6 +143,21 @@ usart1: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi1: spi@400 { + compatible =3D "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 trng: rng@e0048000 { @@ -168,6 +198,21 @@ usart2: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi2: spi@400 { + compatible =3D "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 flx3: flexcom@e0064000 { @@ -191,6 +236,21 @@ usart3: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi3: spi@400 { + compatible =3D "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 dma0: dma-controller@e0068000 { @@ -233,6 +293,21 @@ usart4: serial@200 { atmel,fifo-size =3D <32>; status =3D "disabled"; }; + + spi4: spi@400 { + compatible =3D "atmel,at91rm9200-spi"; + reg =3D <0x400 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + clock-names =3D "spi_clk"; + atmel,fifo-size =3D <32>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 timer0: timer@e008c000 { --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0CEAC433EF for ; Fri, 4 Mar 2022 15:36:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240443AbiCDPh0 (ORCPT ); Fri, 4 Mar 2022 10:37:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41398 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240395AbiCDPhJ (ORCPT ); Fri, 4 Mar 2022 10:37:09 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [176.9.125.105]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5F3C61C60F4; Fri, 4 Mar 2022 07:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 9B25D223F7; Fri, 4 Mar 2022 16:36:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=voApxY9YB+l3nIfRPjrWF2SozsSlzTtol4QxJ9Ny/8I=; b=v1Kt0Bddon4Irss+CIY3hlvhM/PcHiqdHY5DtfbNPDi5zLISg/FYcbBq7/egeSbQA7YGWZ pQesrK5o2uWisgOEhIZyVhnXKtkhIVwuTaebIpjQaZg3x1nxIMoVNfUeggp35g+iMSTDEH tLEAo+3mO6Y8/pO9lTcG2g/jlqBUr+w= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 6/7] ARM: dts: lan966x: add flexcom I2C nodes Date: Fri, 4 Mar 2022 16:35:47 +0100 Message-Id: <20220304153548.3364480-7-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add all I2C nodes of the flexcom IP blocks. The driver supports FIFO, DMA or both combined. But the latter isn't working correctly. Thus, skip the fifo-size property for now. DMA is doing single byte reads in this case. Keep the nodes disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 65 ++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index a61d394ad04d..95d58bdca3f0 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -120,6 +120,19 @@ spi0: spi@400 { #size-cells =3D <0>; status =3D "disabled"; }; + + i2c0: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 flx1: flexcom@e0044000 { @@ -158,6 +171,19 @@ spi1: spi@400 { #size-cells =3D <0>; status =3D "disabled"; }; + + i2c1: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 trng: rng@e0048000 { @@ -213,6 +239,19 @@ spi2: spi@400 { #size-cells =3D <0>; status =3D "disabled"; }; + + i2c2: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 flx3: flexcom@e0064000 { @@ -251,6 +290,19 @@ spi3: spi@400 { #size-cells =3D <0>; status =3D "disabled"; }; + + i2c3: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 dma0: dma-controller@e0068000 { @@ -308,6 +360,19 @@ spi4: spi@400 { #size-cells =3D <0>; status =3D "disabled"; }; + + i2c4: i2c@600 { + compatible =3D "microchip,sam9x60-i2c"; + reg =3D <0x600 0x200>; + interrupts =3D ; + dmas =3D <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names =3D "tx", "rx"; + clocks =3D <&nic_clk>; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "disabled"; + }; }; =20 timer0: timer@e008c000 { --=20 2.30.2 From nobody Tue Jun 23 13:17:33 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35ED3C433F5 for ; Fri, 4 Mar 2022 15:36:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240440AbiCDPhe (ORCPT ); Fri, 4 Mar 2022 10:37:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41420 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240399AbiCDPhK (ORCPT ); Fri, 4 Mar 2022 10:37:10 -0500 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EFF801C60F5; Fri, 4 Mar 2022 07:36:21 -0800 (PST) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 2110F2241C; Fri, 4 Mar 2022 16:36:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408180; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=50eB09uXLUfbxP4Vbgsw3GeBAsQQCWkMXzOOkk6tgQU=; b=g+cdYikDEa8cp788XRkcAvVLkm0pvm2BC0aSfFVOu7xGtZNSh3iReKAh/d5DUoAf8yjvEa t3V5Npglc77CeEiwEFuGn38H9grK+Ynrlb1o+iGhQWH2pyK7XSgXKU+8npDHGXLmcmALb3 Zq8H4BSk4+Cl95ct98tBED6U0aeOXBc= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 7/7] ARM: dts: lan966x: add basic Kontron KSwitch D10 support Date: Fri, 4 Mar 2022 16:35:48 +0100 Message-Id: <20220304153548.3364480-8-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add basic support for the Kontron KSwitch D10 MMT 6G-2GS which features 6 Gigabit copper ports and two SFP cages. For now the following is working: - Kernel console - SFP cages I2C bus and mux - SPI - SGPIO - Watchdog Signed-off-by: Michael Walle --- arch/arm/boot/dts/Makefile | 3 +- ...lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts | 159 ++++++++++++++++++ 2 files changed, 161 insertions(+), 1 deletion(-) create mode 100644 arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-6g-2g= s.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 085c43649d44..86dd0f9804ee 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -739,7 +739,8 @@ dtb-$(CONFIG_SOC_IMX7ULP) +=3D \ imx7ulp-com.dtb \ imx7ulp-evk.dtb dtb-$(CONFIG_SOC_LAN966) +=3D \ - lan966x-pcb8291.dtb + lan966x-pcb8291.dtb \ + lan966x-kontron-kswitch-d10-mmt-6g-2gs.dtb dtb-$(CONFIG_SOC_LS1021A) +=3D \ ls1021a-moxa-uc-8410a.dtb \ ls1021a-qds.dtb \ diff --git a/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts b= /arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts new file mode 100644 index 000000000000..958678dec7ad --- /dev/null +++ b/arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts @@ -0,0 +1,159 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS + */ + +/dts-v1/; +#include "lan966x.dtsi" + +/ { + model =3D "Kontron KSwitch D10 MMT 6G-2GS"; + compatible =3D "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921", + "microchip,lan9668", "microchip,lan966"; + + aliases { + serial0 =3D &usart0; + }; + + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + gpio-restart { + compatible =3D "gpio-restart"; + gpios =3D <&gpio 56 GPIO_ACTIVE_LOW>; + priority =3D <200>; + }; + + i2cmux { + compatible =3D "i2c-mux-gpio"; + #address-cells =3D <1>; + #size-cells =3D <0>; + mux-gpios =3D <&sgpio_out 3 2 GPIO_ACTIVE_HIGH>, + <&sgpio_out 3 3 GPIO_ACTIVE_HIGH>; + i2c-parent =3D <&i2c4>; + + i2c4_0: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + i2c4_1: i2c@2 { + reg =3D <2>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + + sfp0: sfp0 { + compatible =3D "sff,sfp"; + i2c-bus =3D <&i2c4_0>; + los-gpios =3D <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&sgpio_in 1 1 GPIO_ACTIVE_LOW>; + maximum-power-milliwatt =3D <2500>; + tx-disable-gpios =3D <&sgpio_out 3 0 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&sgpio_in 0 2 GPIO_ACTIVE_HIGH>; + rate-select0-gpios =3D <&sgpio_out 2 0 GPIO_ACTIVE_HIGH>; + rate-select1-gpios =3D <&sgpio_out 2 1 GPIO_ACTIVE_HIGH>; + }; + + sfp1: sfp1 { + compatible =3D "sff,sfp"; + i2c-bus =3D <&i2c4_1>; + los-gpios =3D <&sgpio_in 1 2 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&sgpio_in 1 3 GPIO_ACTIVE_LOW>; + maximum-power-milliwatt =3D <2500>; + tx-disable-gpios =3D <&sgpio_out 3 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&sgpio_in 0 3 GPIO_ACTIVE_HIGH>; + rate-select0-gpios =3D <&sgpio_out 2 2 GPIO_ACTIVE_HIGH>; + rate-select1-gpios =3D <&sgpio_out 2 3 GPIO_ACTIVE_HIGH>; + }; +}; + +&flx0 { + atmel,flexcom-mode =3D ; + status =3D "okay"; +}; + +&flx3 { + atmel,flexcom-mode =3D ; + status =3D "okay"; +}; + +&flx4 { + atmel,flexcom-mode =3D ; + status =3D "okay"; +}; + +&gpio { + usart0_pins: usart0-pins { + /* RXD, TXD */ + pins =3D "GPIO_25", "GPIO_26"; + function =3D "fc0_b"; + }; + + sgpio_a_pins: sgpio-a-pins { + /* SCK, D0, D1, LD */ + pins =3D "GPIO_32", "GPIO_33", "GPIO_34"; + function =3D "sgpio_a"; + }; + + sgpio_b_pins: sgpio-b-pins { + /* SCK, D0, D1, LD */ + pins =3D "GPIO_64"; + function =3D "sgpio_b"; + }; + + fc3_b_pins: fc3-b-spi-pins { + /* SCK, MISO, MOSI */ + pins =3D "GPIO_51", "GPIO_52", "GPIO_53"; + function =3D "fc3_b"; + }; + + fc4_b_pins: fc4-b-i2c-pins { + /* RXD, TXD */ + pins =3D "GPIO_57", "GPIO_58"; + function =3D "fc4_b"; + }; +}; + +&i2c4 { + pinctrl-0 =3D <&fc4_b_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&usart0 { + pinctrl-0 =3D <&usart0_pins>; + pinctrl-names =3D "default"; + status =3D "okay"; +}; + +&sgpio { + pinctrl-0 =3D <&sgpio_a_pins>, <&sgpio_b_pins>; + pinctrl-names =3D "default"; + bus-frequency =3D <8000000>; + /* arbitrary range because all GPIOs are in software mode */ + microchip,sgpio-port-ranges =3D <0 11>; + status =3D "okay"; +}; + +&sgpio_in { + ngpios =3D <128>; +}; + +&sgpio_out { + ngpios =3D <128>; +}; + +&spi3 { + pinctrl-0 =3D <&fc3_b_pins>; + pinctrl-names =3D "default"; + cs-gpios =3D <&gpio 46 GPIO_ACTIVE_LOW>; + status =3D "okay"; +}; + +&watchdog { + status =3D "okay"; +}; --=20 2.30.2