From nobody Sun Sep 22 09:32:17 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C252CC433EF for ; Fri, 4 Mar 2022 13:09:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239248AbiCDNJu (ORCPT ); Fri, 4 Mar 2022 08:09:50 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49304 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229482AbiCDNJN (ORCPT ); Fri, 4 Mar 2022 08:09:13 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 37A9D6D1BB; Fri, 4 Mar 2022 05:08:25 -0800 (PST) X-UUID: 51db633fc7474f3283e31b5eb2a1ce97-20220304 X-UUID: 51db633fc7474f3283e31b5eb2a1ce97-20220304 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1520759150; Fri, 04 Mar 2022 21:08:19 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 4 Mar 2022 21:08:17 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 4 Mar 2022 21:08:17 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , Chen-Yu Tsai , Ryder Lee , Hui Liu , Allen-KH Cheng Subject: [PATCH v3 06/21] arm64: dts: mt8192: Add xhci node Date: Fri, 4 Mar 2022 21:07:54 +0800 Message-ID: <20220304130809.12924-7-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> References: <20220304130809.12924-1-allen-kh.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add xhci node for mt8192 SoC. Signed-off-by: Allen-KH Cheng Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts= /mediatek/mt8192.dtsi index 28b93b76fe17..6bc36a4076f4 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include #include =20 / { @@ -718,6 +719,29 @@ status =3D "disabled"; }; =20 + xhci: usb@11200000 { + compatible =3D "mediatek,mt8192-xhci", + "mediatek,mtk-xhci"; + reg =3D <0 0x11200000 0 0x1000>, + <0 0x11203e00 0 0x0100>; + reg-names =3D "mac", "ippc"; + interrupts-extended =3D <&gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>; + interrupt-names =3D "host"; + phys =3D <&u2port0 PHY_TYPE_USB2>, + <&u3port0 PHY_TYPE_USB3>; + assigned-clocks =3D <&topckgen CLK_TOP_USB_TOP_SEL>, + <&topckgen CLK_TOP_SSUSB_XHCI_SEL>; + assigned-clock-parents =3D <&topckgen CLK_TOP_UNIVPLL_D5_D4>, + <&topckgen CLK_TOP_UNIVPLL_D5_D4>; + clocks =3D <&infracfg CLK_INFRA_SSUSB>, + <&infracfg CLK_INFRA_SSUSB_XHCI>, + <&apmixedsys CLK_APMIXED_USBPLL>; + clock-names =3D "sys_ck", "xhci_ck", "ref_ck"; + wakeup-source; + mediatek,syscon-wakeup =3D <&pericfg 0x420 102>; + status =3D "disabled"; + }; + nor_flash: spi@11234000 { compatible =3D "mediatek,mt8192-nor"; reg =3D <0 0x11234000 0 0xe0>; --=20 2.18.0