From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 685A8C433F5 for ; Thu, 3 Mar 2022 03:54:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229553AbiCCDyx (ORCPT ); Wed, 2 Mar 2022 22:54:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229436AbiCCDyv (ORCPT ); Wed, 2 Mar 2022 22:54:51 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6C0B1451F2 for ; Wed, 2 Mar 2022 19:54:06 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id s1so3379321plg.12 for ; Wed, 02 Mar 2022 19:54:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/Ch1JNDNo51YVs+vsacZ59NwHAxiNSMO9ntOA4v94+Q=; b=O3r0h/dm6t6rNSpfl/sKfCk8T0wcjUuRcpNKoUyFVzbqyINK3z1DhUkcm0DGfvluzt jR8UdaaPAAZLoFn2PZa9TdbvDz2PLohq5iDzAz6YeVAlSlttvpAp33v7V7u3yVe5HDKb zyJyQbzSLuHQfF56eRTTMcEaUJI3ClFfZ80gNK8GXAwoVJIYMZZcdrMZqxT8ZOl63F4z GKGpzG8vpY5Zyv3+SpzJp6xPWQVf9ts8z757aKXMelvRPriZzWM09vi4zrjZXYEBkOii qq7g1UGh1F2huejbiY/XlmnlQVOP74j07BqH2RNHfT/t4WvONfG4D/PQleUhtO07xknl RaBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=/Ch1JNDNo51YVs+vsacZ59NwHAxiNSMO9ntOA4v94+Q=; b=fIzLHUhI1wHcsiNVwol63FsQUOqE4qkgi1cOmYynmZ0zeZ9wHKnBDfeIqBETwHo4xi HGlHTC1KYFtO6f4IvkWuB+NC3dJ0MsX2Xwt2ChPU1ycFJV9+DoCcMQt4F4rRlixhphvH zdNxR6wi+Jcm2xu9jSoh615Cn6zInerJCEtt1h3z9yZ06j8xAwgX+2JE9975c2HcGVQX 5O4HNPQI22Z68m1uaBvgpa1DTlg5+5ZQBw8mGZcTEEeY2XYtPK2dSBL3LLNZP0p8sVYj YAa9XfMOW20OGsNPt41NI7LQL/eSEfEbPM75y7WelEchkHcIjKK9SKdwIsh0jimDN9wp ra5g== X-Gm-Message-State: AOAM531lOn0LjzJz9NUt0WrKZHj9iRoq8q1j29n6deiK6QRUYN/jmYSP BfKa9qDKdqWGmP7dfXpTOOeoicd+XWA= X-Google-Smtp-Source: ABdhPJyAZhUyzX32PUWoZ5vXF2AAfID8mqPgHlZfXnTsY31wiMC90VN0OjRbZ9KIrpr0+C+oOMdmAA== X-Received: by 2002:a17:902:da91:b0:151:8e79:8307 with SMTP id j17-20020a170902da9100b001518e798307mr8889827plx.8.1646279646003; Wed, 02 Mar 2022 19:54:06 -0800 (PST) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id mu9-20020a17090b388900b001bef86b7d92sm3620509pjb.24.2022.03.02.19.54.04 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Mar 2022 19:54:05 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Peter Zijlstra , Fenghua Yu , Joerg Roedel , "Chang S. Bae" Subject: [PATCH V2 1/7] x86/traps: Move pt_regs only in fixup_bad_iret() Date: Thu, 3 Mar 2022 11:54:28 +0800 Message-Id: <20220303035434.20471-2-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan fixup_bad_iret() and sync_regs() have similar arguments and do similar work that copies full or partial pt_regs to a place and switches stack after return. They are quite the same, but fixup_bad_iret() not only copies the pt_regs but also the return address of error_entry() while sync_regs() copies the pt_regs only and the return address of error_entry() was preserved and handled in ASM code. This patch makes fixup_bad_iret() work like sync_regs() and the handling of the return address of error_entry() is moved in ASM code. It removes the need to use the struct bad_iret_stack, simplifies fixup_bad_iret() and makes the ASM error_entry() call fixup_bad_iret() as the same as calling sync_regs() which adds readability because the calling patterns are exactly the same. It is prepared for later patch to do the stack switch after the error_entry() which simplifies the code further. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 5 ++++- arch/x86/include/asm/traps.h | 2 +- arch/x86/kernel/traps.c | 17 ++++++----------- 3 files changed, 11 insertions(+), 13 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 466df3e50276..24846284eda5 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -1039,9 +1039,12 @@ SYM_CODE_START_LOCAL(error_entry) * Pretend that the exception came from user mode: set up pt_regs * as if we faulted immediately after IRET. */ - mov %rsp, %rdi + popq %r12 /* save return addr in %12 */ + movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ call fixup_bad_iret mov %rax, %rsp + ENCODE_FRAME_POINTER + pushq %r12 jmp .Lerror_entry_from_usermode_after_swapgs SYM_CODE_END(error_entry) =20 diff --git a/arch/x86/include/asm/traps.h b/arch/x86/include/asm/traps.h index 6221be7cafc3..1cdd7e8bcba7 100644 --- a/arch/x86/include/asm/traps.h +++ b/arch/x86/include/asm/traps.h @@ -13,7 +13,7 @@ #ifdef CONFIG_X86_64 asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *ere= gs); asmlinkage __visible notrace -struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s); +struct pt_regs *fixup_bad_iret(struct pt_regs *bad_regs); void __init trap_init(void); asmlinkage __visible noinstr struct pt_regs *vc_switch_off_ist(struct pt_r= egs *eregs); #endif diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c index 7ef00dee35be..2b1f049afb14 100644 --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -816,13 +816,8 @@ asmlinkage __visible noinstr struct pt_regs *vc_switch= _off_ist(struct pt_regs *r } #endif =20 -struct bad_iret_stack { - void *error_entry_ret; - struct pt_regs regs; -}; - asmlinkage __visible noinstr -struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s) +struct pt_regs *fixup_bad_iret(struct pt_regs *bad_regs) { /* * This is called from entry_64.S early in handling a fault @@ -832,19 +827,19 @@ struct bad_iret_stack *fixup_bad_iret(struct bad_iret= _stack *s) * just below the IRET frame) and we want to pretend that the * exception came from the IRET target. */ - struct bad_iret_stack tmp, *new_stack =3D - (struct bad_iret_stack *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; + struct pt_regs tmp, *new_stack =3D + (struct pt_regs *)__this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1; =20 /* Copy the IRET target to the temporary storage. */ - __memcpy(&tmp.regs.ip, (void *)s->regs.sp, 5*8); + __memcpy(&tmp.ip, (void *)bad_regs->sp, 5*8); =20 /* Copy the remainder of the stack from the current stack. */ - __memcpy(&tmp, s, offsetof(struct bad_iret_stack, regs.ip)); + __memcpy(&tmp, bad_regs, offsetof(struct pt_regs, ip)); =20 /* Update the entry stack */ __memcpy(new_stack, &tmp, sizeof(tmp)); =20 - BUG_ON(!user_mode(&new_stack->regs)); + BUG_ON(!user_mode(new_stack)); return new_stack; } #endif --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15B8CC433F5 for ; Thu, 3 Mar 2022 03:54:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229567AbiCCDy7 (ORCPT ); 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Wed, 02 Mar 2022 19:54:12 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V2 2/7] x86/entry: Switch the stack after error_entry() returns Date: Thu, 3 Mar 2022 11:54:29 +0800 Message-Id: <20220303035434.20471-3-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan error_entry() calls sync_regs() to settle/copy the pt_regs and switches the stack directly after sync_regs(). But error_entry() itself is also a function call, the switching has to handle the return address of it together, which causes the work complicated and tangly. Switching to the stack after error_entry() makes the code simpler and intuitive. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 24846284eda5..a51cad2b7fff 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -323,6 +323,8 @@ SYM_CODE_END(ret_from_fork) .macro idtentry_body cfunc has_error_code:req =20 call error_entry + movq %rax, %rsp /* switch stack settled by sync_regs() */ + ENCODE_FRAME_POINTER UNWIND_HINT_REGS =20 movq %rsp, %rdi /* pt_regs pointer into 1st argument*/ @@ -980,14 +982,10 @@ SYM_CODE_START_LOCAL(error_entry) /* We have user CR3. Change to kernel CR3. */ SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax =20 + leaq 8(%rsp), %rdi /* arg0 =3D pt_regs pointer */ .Lerror_entry_from_usermode_after_swapgs: /* Put us onto the real thread stack. */ - popq %r12 /* save return addr in %12 */ - movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ call sync_regs - movq %rax, %rsp /* switch stack */ - ENCODE_FRAME_POINTER - pushq %r12 RET =20 /* @@ -1019,6 +1017,7 @@ SYM_CODE_START_LOCAL(error_entry) */ .Lerror_entry_done_lfence: FENCE_SWAPGS_KERNEL_ENTRY + leaq 8(%rsp), %rax /* return pt_regs pointer */ RET =20 .Lbstep_iret: @@ -1039,12 +1038,9 @@ SYM_CODE_START_LOCAL(error_entry) * Pretend that the exception came from user mode: set up pt_regs * as if we faulted immediately after IRET. */ - popq %r12 /* save return addr in %12 */ - movq %rsp, %rdi /* arg0 =3D pt_regs pointer */ + leaq 8(%rsp), %rdi /* arg0 =3D pt_regs pointer */ call fixup_bad_iret - mov %rax, %rsp - ENCODE_FRAME_POINTER - pushq %r12 + mov %rax, %rdi jmp .Lerror_entry_from_usermode_after_swapgs SYM_CODE_END(error_entry) =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 58F3EC433EF for ; Thu, 3 Mar 2022 03:54:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229565AbiCCDzK (ORCPT ); Wed, 2 Mar 2022 22:55:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34364 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229480AbiCCDzI (ORCPT ); Wed, 2 Mar 2022 22:55:08 -0500 Received: from mail-pg1-x52a.google.com (mail-pg1-x52a.google.com [IPv6:2607:f8b0:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C484145626 for ; Wed, 2 Mar 2022 19:54:19 -0800 (PST) Received: by mail-pg1-x52a.google.com with SMTP id o23so3402799pgk.13 for ; Wed, 02 Mar 2022 19:54:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=484aUuxNZc3KsETq0d0X9kiFjP9VE9iZOfI8FszPlhE=; b=eqfYaYtiJAfrMrJum4SkBgX812U6U5MPYDU9P1w7mfqX3sqhPYqFlZIJCrv91imDGz 2nT2SGfJQUdyE+MEMQBOmqiNiBgihOHyx2+JdHh+3HiwA1Yxei9cXwN1lIvyDGo7ylxK PPMRodzVSxZOiHZgLCyj7NYMsT+wUQt7M3xvtLLHvYkcZQem3zTTvNWJwNVD8aa+cCA2 dBNTyrMV09l5sYU4gOBaOjPL+shG1Sms5Zyb59iVgWnfpf3PmsC1eSUmNPAYGB/v9GzL 8D5QlQGdJasLdLVtOyx36j9Tvs9QmcrEzIiwSzgK1jrvCBrDFzzdZBjtFzT4xHvdaJRR U7sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=484aUuxNZc3KsETq0d0X9kiFjP9VE9iZOfI8FszPlhE=; b=XclY6DAEQFxVk0vXsoZUGezg58SlfImuZpVmfjuhNZXcOcyr7vPCMh9AvjGn1YZ6RQ SCDKJ1ptg4j4QEjOyCXxvEZi5vNmbNhBblI/8kAKK88dNPOw91uKT642It1QVy9+glMF bjYuhBrKy92c1ABxVxY1LUujCEBBTky9uSSU5sZO/GguV2vLiyD8N7wKqeWdDJoFcdv3 bIKn08d+8tjjf1D3GbW0wj3ZjY2sPnJcEDaXna+aJKSBesjpog1FM9u0TBALicOdNxCK uJ7TvRayjv7OjbuNQHT0kV39a43zo03lj8vVjU+oWSsnbqSQEBL01EEb1Pjwev4S3cu+ srug== X-Gm-Message-State: AOAM533JTJh5GOVCzM1TcFUTczeKwRiaLPGCE3Ionh4CTo/WIN/x6LHp 0gETXTOW1SbleX64mZ+zfZe/zGnW2Dk= X-Google-Smtp-Source: ABdhPJwqGNnwLeK/h1YzAuB+fUY8G1SroSa6VKnTnnZks/0u+o2UKlaU8+LDpauD/nfI/8YCGiu9Wg== X-Received: by 2002:a63:a66:0:b0:373:c36b:e500 with SMTP id z38-20020a630a66000000b00373c36be500mr28700968pgk.419.1646279658821; Wed, 02 Mar 2022 19:54:18 -0800 (PST) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id x42-20020a056a0018aa00b004e1bf2a3376sm676209pfh.215.2022.03.02.19.54.17 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Mar 2022 19:54:18 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V2 3/7] x86/entry: move PUSH_AND_CLEAR_REGS out of error_entry Date: Thu, 3 Mar 2022 11:54:30 +0800 Message-Id: <20220303035434.20471-4-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan Moving PUSH_AND_CLEAR_REGS out of error_entry doesn't change any functionality. It will enlarge the size: size arch/x86/entry/entry_64.o.before: text data bss dec hex filename 17916 384 0 18300 477c arch/x86/entry/entry_64.o size --format=3DSysV arch/x86/entry/entry_64.o.before: .entry.text 5528 0 .orc_unwind 6456 0 .orc_unwind_ip 4304 0 size arch/x86/entry/entry_64.o.after: text data bss dec hex filename 26868 384 0 27252 6a74 arch/x86/entry/entry_64.o size --format=3DSysV arch/x86/entry/entry_64.o.after: .entry.text 8200 0 .orc_unwind 10224 0 .orc_unwind_ip 6816 0 But .entry.text in x86_64 is 2M aligned, enlarging it to 8.2k doesn't enlarge the final text size. The tables .orc_unwind[_ip] are enlarged due to it adds many pushes. It is prepared for not calling error_entry() from XENPV in later patch and for future converting the whole error_entry into C code. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index a51cad2b7fff..3ca64bad4697 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -322,6 +322,9 @@ SYM_CODE_END(ret_from_fork) */ .macro idtentry_body cfunc has_error_code:req =20 + PUSH_AND_CLEAR_REGS + ENCODE_FRAME_POINTER + call error_entry movq %rax, %rsp /* switch stack settled by sync_regs() */ ENCODE_FRAME_POINTER @@ -968,8 +971,6 @@ SYM_CODE_END(paranoid_exit) SYM_CODE_START_LOCAL(error_entry) UNWIND_HINT_FUNC cld - PUSH_AND_CLEAR_REGS save_ret=3D1 - ENCODE_FRAME_POINTER 8 testb $3, CS+8(%rsp) jz .Lerror_kernelspace =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E0E8C433EF for ; Thu, 3 Mar 2022 03:54:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229583AbiCCDzN (ORCPT ); Wed, 2 Mar 2022 22:55:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34502 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229562AbiCCDzK (ORCPT ); Wed, 2 Mar 2022 22:55:10 -0500 Received: from mail-pl1-x62b.google.com (mail-pl1-x62b.google.com [IPv6:2607:f8b0:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B5FE1451D0 for ; Wed, 2 Mar 2022 19:54:25 -0800 (PST) Received: by mail-pl1-x62b.google.com with SMTP id e2so3386727pls.10 for ; Wed, 02 Mar 2022 19:54:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0xi68o3LflOcJSjUAfCp8Eoq36gaPXd65N0Lh9gWJYs=; b=ChfhB9Q1kgf/HK+IvTlWJSoEe7i7wRN7jW+tLSNaZYf3qVVOVUTFZ8feF9bKd47/9g avHCxxhlbyUiX169fh2S8gdAafEtssa6ara44eJCjzdXGcUSAM1jW7MAEPdTT2F4mg8p B9bUq+eeA1JwGEBoZn1+0IEulPYR8jYCZ+OE7LgPS8eI81ljAYkLxaOvF2KHwCgvGWVi KkTSh4ceX5qGSOInRyqbgRoWfXl4/tHVPHEp8XkvmlbdAujalCF2L6deYKeJLDNFdrmU JLzCmxak3kaVex5DTyt3+sxWKWJa6uGB/rc94pM/6e5hA/JimowneArLhcgOzd4HrCnD d+Iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0xi68o3LflOcJSjUAfCp8Eoq36gaPXd65N0Lh9gWJYs=; b=CvkQZhp/i05ROJQGj2kfHOsIlHE9zYZoySRLfOah84kpIMe7zipSExjcafACwy3XnN YHt5XeZd/AQzhCqVtZsCr0zmcWC/TgVU9WRrpCaSjNLjFoBXcKIfiFp8BPejjNQkTm0o JYGjyVTJg7PpZZYz8hqs1r6XjzJjMF/kPZJqlhhVwEoFuhvjhv1Dn0YhCHq1aK+4Rfpj jArPKwTPHLkB0R3hPYL2ig6PSeCo5entQJMffeKg7Tf2Tb5ks+gXt4PG1/eDSFcLFmiX pEDidpOTfNFt5xsxbyBGsw30bwjPkVK9A3qOQQLIN2Tw6X1jO/u7Sx3ylupctQd8HrDn OaRA== X-Gm-Message-State: AOAM532h+Mrs49cMgBdKxCZxeCkcbCjmJn1zW2nq2OMR3sOTFD/xQNIV 63wP+ku8mRuxmcYCMscFKj1rEkFo5/E= X-Google-Smtp-Source: ABdhPJx9vlpkZP7hoE3xxjO/freHx46CvxGDExvwku0oaXYuPlqsKDL6avcM0qFHzLzGEG9697dV5g== X-Received: by 2002:a17:90b:8d:b0:1bc:4273:251b with SMTP id bb13-20020a17090b008d00b001bc4273251bmr3190332pjb.141.1646279664726; Wed, 02 Mar 2022 19:54:24 -0800 (PST) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id a8-20020aa795a8000000b004f670c2ef2esm358174pfk.163.2022.03.02.19.54.23 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Mar 2022 19:54:24 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V2 4/7] x86/entry: Move cld to the start of idtentry Date: Thu, 3 Mar 2022 11:54:31 +0800 Message-Id: <20220303035434.20471-5-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan Make it next to CLAC Suggested-by: Peter Zijlstra Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 3ca64bad4697..630bf8164a09 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -356,6 +356,7 @@ SYM_CODE_END(ret_from_fork) SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS offset=3D\has_error_code*8 ASM_CLAC + cld =20 .if \has_error_code =3D=3D 0 pushq $-1 /* ORIG_RAX: no syscall to restart */ @@ -423,6 +424,7 @@ SYM_CODE_END(\asmsym) SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS ASM_CLAC + cld =20 pushq $-1 /* ORIG_RAX: no syscall to restart */ =20 @@ -478,6 +480,7 @@ SYM_CODE_END(\asmsym) SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS ASM_CLAC + cld =20 /* * If the entry is from userspace, switch stacks and treat it as @@ -539,6 +542,7 @@ SYM_CODE_END(\asmsym) SYM_CODE_START(\asmsym) UNWIND_HINT_IRET_REGS offset=3D8 ASM_CLAC + cld =20 /* paranoid_entry returns GS information for paranoid_exit in EBX. */ call paranoid_entry @@ -852,7 +856,6 @@ SYM_CODE_END(xen_failsafe_callback) */ SYM_CODE_START_LOCAL(paranoid_entry) UNWIND_HINT_FUNC - cld PUSH_AND_CLEAR_REGS save_ret=3D1 ENCODE_FRAME_POINTER 8 =20 @@ -970,7 +973,6 @@ SYM_CODE_END(paranoid_exit) */ SYM_CODE_START_LOCAL(error_entry) UNWIND_HINT_FUNC - cld testb $3, CS+8(%rsp) jz .Lerror_kernelspace =20 @@ -1103,6 +1105,7 @@ SYM_CODE_START(asm_exc_nmi) */ =20 ASM_CLAC + cld =20 /* Use %rdx as our temp variable throughout */ pushq %rdx @@ -1122,7 +1125,6 @@ SYM_CODE_START(asm_exc_nmi) */ =20 swapgs - cld FENCE_SWAPGS_USER_ENTRY SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rdx movq %rsp, %rdx --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7D09C433EF for ; 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Wed, 02 Mar 2022 19:54:30 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , xen-devel@lists.xenproject.org, Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" Subject: [PATCH V2 5/7] x86/entry: Don't call error_entry for XENPV Date: Thu, 3 Mar 2022 11:54:32 +0800 Message-Id: <20220303035434.20471-6-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan When in XENPV, it is already in the task stack, and it can't fault for native_iret() nor native_load_gs_index() since XENPV uses its own pvops for iret and load_gs_index(). And it doesn't need to switch CR3. So there is no reason to call error_entry() in XENPV. Cc: xen-devel@lists.xenproject.org Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 630bf8164a09..adc9f7619d1b 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -325,8 +325,17 @@ SYM_CODE_END(ret_from_fork) PUSH_AND_CLEAR_REGS ENCODE_FRAME_POINTER =20 - call error_entry - movq %rax, %rsp /* switch stack settled by sync_regs() */ + /* + * Call error_entry and switch stack settled by sync_regs(). + * + * When in XENPV, it is already in the task stack, and it can't fault + * for native_iret() nor native_load_gs_index() since XENPV uses its + * own pvops for iret and load_gs_index(). And it doesn't need to + * switch CR3. So it can skip invoking error_entry(). + */ + ALTERNATIVE "call error_entry; movq %rax, %rsp", \ + "", X86_FEATURE_XENPV + ENCODE_FRAME_POINTER UNWIND_HINT_REGS =20 --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F7D5C433EF for ; Thu, 3 Mar 2022 03:54:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229605AbiCCDze (ORCPT ); Wed, 2 Mar 2022 22:55:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35916 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229588AbiCCDzY (ORCPT ); Wed, 2 Mar 2022 22:55:24 -0500 Received: from mail-pj1-x102e.google.com (mail-pj1-x102e.google.com [IPv6:2607:f8b0:4864:20::102e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEB9A145626 for ; Wed, 2 Mar 2022 19:54:39 -0800 (PST) Received: by mail-pj1-x102e.google.com with SMTP id ge19-20020a17090b0e1300b001bcca16e2e7so6603540pjb.3 for ; Wed, 02 Mar 2022 19:54:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QM4uqobSxpcHZ2MwWSMdbi4rkeQlFurjLwJi8lu0KCY=; b=JYpMQDYmzqVeJbVhFmGS6lOnm97UZ7Qa+V8YhRgJi/JNJB6m/QF2UDX5oPsrYLMFeY lbg+bRCPOwWeUsRb/9d4OXavdYTBe6uzWSQ/gJge4Bto6Pwxt5P3erkRv11Sb4PsD0wG 2UIw33m6EuUQcv4G0V4pBKFL5S5od8SuzWhj4leZ8EN3ySdZZrWeLTCJd4uQKl1qeoRX wcnhoMMsH5WqnKBD4f/IxrH0ZbbrsHDqlHC2Ch/g7vjaNvt8XwoKKKwN5vB3oRKCN1Zj P1m9nKILLOHxAiWeRLU4vBq+8CtEsjZvNMa2DNw8IK7fqjfBdVNyunLF4lw1uGBDMkh7 Jk5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QM4uqobSxpcHZ2MwWSMdbi4rkeQlFurjLwJi8lu0KCY=; b=QvzQYa3mnFxZQ1eDgl2d3R0BAXoGAnyLsN+H/I68JzIUhjYv18LzaL2reIVSgMbRlY wMlbTc7J0njzJCr91v3DLoGXpmJkt9kXeOnrTOeu06IDGt2cpVXQeTwyGgSxNg4H6qnh A8OWET8w2Jd7fAz1m8usjBvCxhlXVWUxEZ/kGvre+8xpAMNwqA79ggLT+gR2yOmNwNxo W1lnSQnzsCUG7T3nvKeObWYlcxy6VaCKWRY90IdWlgurN1bRe6IlxvwWzmMuXXwBmmtK eI68cJ/TZV6Y9W4hTyZAmJiJw3TqmJsqnISG+TgM+g+FmDI4KVl3xAK2GSPKKnhga/Ip wQdQ== X-Gm-Message-State: AOAM530K1CtH+NQZncjmBx3edzZXkxt8hm25G9A+eXz+2w7QXKKb92b0 6M8Yq5qUn+F/VoZM9hZZXp3Ee894asc= X-Google-Smtp-Source: ABdhPJyDUtmejzGJtbp+1hm9qyCe2tA/8FObh1ude01fnCTZSkr/+f3brn4ijPSCcg+2uT7F2Qn1fQ== X-Received: by 2002:a17:902:7298:b0:151:842b:a241 with SMTP id d24-20020a170902729800b00151842ba241mr11104204pll.115.1646279679194; Wed, 02 Mar 2022 19:54:39 -0800 (PST) Received: from localhost ([47.251.4.198]) by smtp.gmail.com with ESMTPSA id s14-20020a056a0008ce00b004f66dcd4f1csm627897pfu.32.2022.03.02.19.54.38 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Mar 2022 19:54:38 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Joerg Roedel , "Chang S. Bae" , Jan Kiszka Subject: [PATCH V2 6/7] x86/entry: Use idtentry macro for entry_INT80_compat Date: Thu, 3 Mar 2022 11:54:33 +0800 Message-Id: <20220303035434.20471-7-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan entry_INT80_compat is identical to idtentry macro except a special handling for %rax in the prolog. Add the prolog to idtentry and use idtentry for entry_INT80_compat. Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 18 ++++++ arch/x86/entry/entry_64_compat.S | 102 ------------------------------- arch/x86/include/asm/idtentry.h | 47 ++++++++++++++ arch/x86/include/asm/proto.h | 4 -- 4 files changed, 65 insertions(+), 106 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index adc9f7619d1b..88b61f310289 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -371,6 +371,24 @@ SYM_CODE_START(\asmsym) pushq $-1 /* ORIG_RAX: no syscall to restart */ .endif =20 + .if \vector =3D=3D IA32_SYSCALL_VECTOR + /* + * User tracing code (ptrace or signal handlers) might assume + * that the saved RAX contains a 32-bit number when we're + * invoking a 32-bit syscall. Just in case the high bits are + * nonzero, zero-extend the syscall number. (This could almost + * certainly be deleted with no ill effects.) + */ + movl %eax, %eax + + /* + * do_int80_syscall_32() expects regs->orig_ax to be user ax, + * and regs->ax to be $-ENOSYS. + */ + movq %rax, (%rsp) + movq $-ENOSYS, %rax + .endif + .if \vector =3D=3D X86_TRAP_BP /* * If coming from kernel space, create a 6-word gap to allow the diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_com= pat.S index 0051cf5c792d..a4fcea0cab14 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -311,105 +311,3 @@ sysret32_from_system_call: swapgs sysretl SYM_CODE_END(entry_SYSCALL_compat) - -/* - * 32-bit legacy system call entry. - * - * 32-bit x86 Linux system calls traditionally used the INT $0x80 - * instruction. INT $0x80 lands here. - * - * This entry point can be used by 32-bit and 64-bit programs to perform - * 32-bit system calls. Instances of INT $0x80 can be found inline in - * various programs and libraries. It is also used by the vDSO's - * __kernel_vsyscall fallback for hardware that doesn't support a faster - * entry method. Restarted 32-bit system calls also fall back to INT - * $0x80 regardless of what instruction was originally used to do the - * system call. - * - * This is considered a slow path. It is not used by most libc - * implementations on modern hardware except during process startup. - * - * Arguments: - * eax system call number - * ebx arg1 - * ecx arg2 - * edx arg3 - * esi arg4 - * edi arg5 - * ebp arg6 - */ -SYM_CODE_START(entry_INT80_compat) - UNWIND_HINT_EMPTY - /* - * Interrupts are off on entry. - */ - ASM_CLAC /* Do this early to minimize exposure */ - SWAPGS - - /* - * User tracing code (ptrace or signal handlers) might assume that - * the saved RAX contains a 32-bit number when we're invoking a 32-bit - * syscall. Just in case the high bits are nonzero, zero-extend - * the syscall number. (This could almost certainly be deleted - * with no ill effects.) - */ - movl %eax, %eax - - /* switch to thread stack expects orig_ax and rdi to be pushed */ - pushq %rax /* pt_regs->orig_ax */ - pushq %rdi /* pt_regs->di */ - - /* Need to switch before accessing the thread stack. */ - SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rdi - - /* In the Xen PV case we already run on the thread stack. */ - ALTERNATIVE "", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV - - movq %rsp, %rdi - movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp - - pushq 6*8(%rdi) /* regs->ss */ - pushq 5*8(%rdi) /* regs->rsp */ - pushq 4*8(%rdi) /* regs->eflags */ - pushq 3*8(%rdi) /* regs->cs */ - pushq 2*8(%rdi) /* regs->ip */ - pushq 1*8(%rdi) /* regs->orig_ax */ - pushq (%rdi) /* pt_regs->di */ -.Lint80_keep_stack: - - pushq %rsi /* pt_regs->si */ - xorl %esi, %esi /* nospec si */ - pushq %rdx /* pt_regs->dx */ - xorl %edx, %edx /* nospec dx */ - pushq %rcx /* pt_regs->cx */ - xorl %ecx, %ecx /* nospec cx */ - pushq $-ENOSYS /* pt_regs->ax */ - pushq %r8 /* pt_regs->r8 */ - xorl %r8d, %r8d /* nospec r8 */ - pushq %r9 /* pt_regs->r9 */ - xorl %r9d, %r9d /* nospec r9 */ - pushq %r10 /* pt_regs->r10*/ - xorl %r10d, %r10d /* nospec r10 */ - pushq %r11 /* pt_regs->r11 */ - xorl %r11d, %r11d /* nospec r11 */ - pushq %rbx /* pt_regs->rbx */ - xorl %ebx, %ebx /* nospec rbx */ - pushq %rbp /* pt_regs->rbp */ - xorl %ebp, %ebp /* nospec rbp */ - pushq %r12 /* pt_regs->r12 */ - xorl %r12d, %r12d /* nospec r12 */ - pushq %r13 /* pt_regs->r13 */ - xorl %r13d, %r13d /* nospec r13 */ - pushq %r14 /* pt_regs->r14 */ - xorl %r14d, %r14d /* nospec r14 */ - pushq %r15 /* pt_regs->r15 */ - xorl %r15d, %r15d /* nospec r15 */ - - UNWIND_HINT_REGS - - cld - - movq %rsp, %rdi - call do_int80_syscall_32 - jmp swapgs_restore_regs_and_return_to_usermode -SYM_CODE_END(entry_INT80_compat) diff --git a/arch/x86/include/asm/idtentry.h b/arch/x86/include/asm/idtentr= y.h index 1345088e9902..38cb2e0dc2c7 100644 --- a/arch/x86/include/asm/idtentry.h +++ b/arch/x86/include/asm/idtentry.h @@ -204,6 +204,20 @@ __visible noinstr void func(struct pt_regs *regs, \ \ static noinline void __##func(struct pt_regs *regs, u32 vector) =20 +/** + * DECLARE_IDTENTRY_IA32_EMULATION - Declare functions for int80 + * @vector: Vector number (ignored for C) + * @asm_func: Function name of the entry point + * @cfunc: The C handler called from the ASM entry point (ignored for C) + * + * Declares two functions: + * - The ASM entry point: asm_func + * - The XEN PV trap entry point: xen_##asm_func (maybe unused) + */ +#define DECLARE_IDTENTRY_IA32_EMULATION(vector, asm_func, cfunc) \ + asmlinkage void asm_func(void); \ + asmlinkage void xen_##asm_func(void) + /** * DECLARE_IDTENTRY_SYSVEC - Declare functions for system vector entry poi= nts * @vector: Vector number (ignored for C) @@ -430,6 +444,35 @@ __visible noinstr void func(struct pt_regs *regs, \ #define DECLARE_IDTENTRY_ERRORCODE(vector, func) \ idtentry vector asm_##func func has_error_code=3D1 =20 +/* + * 32-bit legacy system call entry. + * + * 32-bit x86 Linux system calls traditionally used the INT $0x80 + * instruction. INT $0x80 lands here. + * + * This entry point can be used by 32-bit and 64-bit programs to perform + * 32-bit system calls. Instances of INT $0x80 can be found inline in + * various programs and libraries. It is also used by the vDSO's + * __kernel_vsyscall fallback for hardware that doesn't support a faster + * entry method. Restarted 32-bit system calls also fall back to INT + * $0x80 regardless of what instruction was originally used to do the + * system call. + * + * This is considered a slow path. It is not used by most libc + * implementations on modern hardware except during process startup. + * + * Arguments: + * eax system call number + * ebx arg1 + * ecx arg2 + * edx arg3 + * esi arg4 + * edi arg5 + * ebp arg6 + */ +#define DECLARE_IDTENTRY_IA32_EMULATION(vector, asm_func, cfunc) \ + idtentry vector asm_func cfunc has_error_code=3D0 + /* Special case for 32bit IRET 'trap'. Do not emit ASM code */ #define DECLARE_IDTENTRY_SW(vector, func) =20 @@ -631,6 +674,10 @@ DECLARE_IDTENTRY_IRQ(X86_TRAP_OTHER, common_interrupt); DECLARE_IDTENTRY_IRQ(X86_TRAP_OTHER, spurious_interrupt); #endif =20 +#ifdef CONFIG_IA32_EMULATION +DECLARE_IDTENTRY_IA32_EMULATION(IA32_SYSCALL_VECTOR, entry_INT80_compat, d= o_int80_syscall_32); +#endif + /* System vector entry points */ #ifdef CONFIG_X86_LOCAL_APIC DECLARE_IDTENTRY_SYSVEC(ERROR_APIC_VECTOR, sysvec_error_interrupt); diff --git a/arch/x86/include/asm/proto.h b/arch/x86/include/asm/proto.h index feed36d44d04..c4d331fe65ff 100644 --- a/arch/x86/include/asm/proto.h +++ b/arch/x86/include/asm/proto.h @@ -28,10 +28,6 @@ void entry_SYSENTER_compat(void); void __end_entry_SYSENTER_compat(void); void entry_SYSCALL_compat(void); void entry_SYSCALL_compat_safe_stack(void); -void entry_INT80_compat(void); -#ifdef CONFIG_XEN_PV -void xen_entry_INT80_compat(void); -#endif #endif =20 void x86_configure_nx(void); --=20 2.19.1.6.gb485710b From nobody Tue Jun 23 15:09:24 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of lists.xenproject.org designates 192.237.175.120 as permitted sender) client-ip=192.237.175.120; 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Wed, 02 Mar 2022 19:54:46 -0800 (PST) From: Lai Jiangshan To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Lai Jiangshan , xen-devel@lists.xenproject.org, Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Juergen Gross , "Peter Zijlstra (Intel)" , "Kirill A. Shutemov" Subject: [PATCH V2 7/7] x86/entry: Convert SWAPGS to swapgs and remove the definition of SWAPGS Date: Thu, 3 Mar 2022 11:54:34 +0800 Message-Id: <20220303035434.20471-8-jiangshanlai@gmail.com> X-Mailer: git-send-email 2.19.1.6.gb485710b In-Reply-To: <20220303035434.20471-1-jiangshanlai@gmail.com> References: <20220303035434.20471-1-jiangshanlai@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @gmail.com) X-ZM-MESSAGEID: 1646279709395100001 Content-Type: text/plain; charset="utf-8" From: Lai Jiangshan XENPV doesn't use swapgs_restore_regs_and_return_to_usermode(), error_entry() and entry_SYSENTER_compat(), so the PV-awared SWAPGS in them can be changed to swapgs. There is no user of the SWAPGS anymore after this change. The INTERRUPT_RETURN in swapgs_restore_regs_and_return_to_usermode() is also converted. Cc: xen-devel@lists.xenproject.org Reviewed-by: Juergen Gross Signed-off-by: Lai Jiangshan --- arch/x86/entry/entry_64.S | 10 +++++----- arch/x86/entry/entry_64_compat.S | 2 +- arch/x86/include/asm/irqflags.h | 2 -- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S index 88b61f310289..d9c885400034 100644 --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -644,8 +644,8 @@ SYM_INNER_LABEL(swapgs_restore_regs_and_return_to_userm= ode, SYM_L_GLOBAL) =20 /* Restore RDI. */ popq %rdi - SWAPGS - INTERRUPT_RETURN + swapgs + jmp native_iret =20 =20 SYM_INNER_LABEL(restore_regs_and_return_to_kernel, SYM_L_GLOBAL) @@ -1007,7 +1007,7 @@ SYM_CODE_START_LOCAL(error_entry) * We entered from user mode or we're pretending to have entered * from user mode due to an IRET fault. */ - SWAPGS + swapgs FENCE_SWAPGS_USER_ENTRY /* We have user CR3. Change to kernel CR3. */ SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax @@ -1039,7 +1039,7 @@ SYM_CODE_START_LOCAL(error_entry) * gsbase and proceed. We'll fix up the exception and land in * .Lgs_change's error handler with kernel gsbase. */ - SWAPGS + swapgs =20 /* * Issue an LFENCE to prevent GS speculation, regardless of whether it is= a @@ -1060,7 +1060,7 @@ SYM_CODE_START_LOCAL(error_entry) * We came from an IRET to user mode, so we have user * gsbase and CR3. Switch to kernel gsbase and CR3: */ - SWAPGS + swapgs FENCE_SWAPGS_USER_ENTRY SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax =20 diff --git a/arch/x86/entry/entry_64_compat.S b/arch/x86/entry/entry_64_com= pat.S index a4fcea0cab14..72e017c3941f 100644 --- a/arch/x86/entry/entry_64_compat.S +++ b/arch/x86/entry/entry_64_compat.S @@ -49,7 +49,7 @@ SYM_CODE_START(entry_SYSENTER_compat) UNWIND_HINT_EMPTY /* Interrupts are off on entry. */ - SWAPGS + swapgs =20 pushq %rax SWITCH_TO_KERNEL_CR3 scratch_reg=3D%rax diff --git a/arch/x86/include/asm/irqflags.h b/arch/x86/include/asm/irqflag= s.h index 87761396e8cc..ac2e4cc47210 100644 --- a/arch/x86/include/asm/irqflags.h +++ b/arch/x86/include/asm/irqflags.h @@ -140,13 +140,11 @@ static __always_inline void arch_local_irq_restore(un= signed long flags) #else #ifdef CONFIG_X86_64 #ifdef CONFIG_XEN_PV -#define SWAPGS ALTERNATIVE "swapgs", "", X86_FEATURE_XENPV #define INTERRUPT_RETURN \ ANNOTATE_RETPOLINE_SAFE; \ ALTERNATIVE_TERNARY("jmp *paravirt_iret(%rip);", \ X86_FEATURE_XENPV, "jmp xen_iret;", "jmp native_iret;") #else -#define SWAPGS swapgs #define INTERRUPT_RETURN jmp native_iret #endif #endif --=20 2.19.1.6.gb485710b