From nobody Sun Sep 22 09:24:53 2024 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3DC7BC433EF for ; Tue, 1 Mar 2022 10:03:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234142AbiCAKD7 (ORCPT ); Tue, 1 Mar 2022 05:03:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38676 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234100AbiCAKDn (ORCPT ); Tue, 1 Mar 2022 05:03:43 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 631A65DE63; Tue, 1 Mar 2022 02:02:59 -0800 (PST) X-UUID: 8d456c0aed9b4526b3bf7b44a7a9c18e-20220301 X-UUID: 8d456c0aed9b4526b3bf7b44a7a9c18e-20220301 Received: from mtkcas11.mediatek.inc [(172.21.101.40)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1500445926; Tue, 01 Mar 2022 18:02:51 +0800 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Tue, 1 Mar 2022 18:02:50 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 1 Mar 2022 18:02:49 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 1 Mar 2022 18:02:49 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Rob Herring , Matthias Brugger , Hans Verkuil , Jernej Skrabec CC: Chun-Kuang Hu , Geert Uytterhoeven , Rob Landley , Laurent Pinchart , , , , , , Alexandre Courbot , , , , , AngeloGioacchino Del Regno , Maoguang Meng , daoyuan huang , Ping-Hsun Wu , , , , , , , , , , Subject: [PATCH v12 4/4] soc: mediatek: mutex: add functions that operate registers by CMDQ Date: Tue, 1 Mar 2022 18:02:46 +0800 Message-ID: <20220301100246.2153-5-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220301100246.2153-1-moudy.ho@mediatek.com> References: <20220301100246.2153-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Considering that some functions have timing requirements in specific situation, this patch adds several interface that operate registers by CMDQ. Signed-off-by: Moudy Ho Reviewed-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-mutex.c | 72 +++++++++++++++++++++++++- include/linux/soc/mediatek/mtk-mutex.h | 6 +++ 2 files changed, 76 insertions(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mu= tex.c index a6268ecde240..a45864183cd1 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -7,10 +7,14 @@ #include #include #include +#include #include #include #include #include +#include + +#define MTK_MUTEX_ENABLE BIT(0) =20 #define MT2701_MUTEX0_MOD0 0x2c #define MT2701_MUTEX0_SOF0 0x30 @@ -173,6 +177,7 @@ struct mtk_mutex_data { const unsigned int mutex_mdp_mod_mask; const unsigned int mutex_mdp_sof_mask; const bool no_clk; + const bool has_gce_client_reg; }; =20 struct mtk_mutex_ctx { @@ -181,6 +186,8 @@ struct mtk_mutex_ctx { void __iomem *regs; struct mtk_mutex mutex[10]; const struct mtk_mutex_data *data; + phys_addr_t addr; + struct cmdq_client_reg cmdq_reg; }; =20 static const unsigned int mt2701_mutex_mod[DDP_COMPONENT_ID_MAX] =3D { @@ -374,6 +381,7 @@ static const struct mtk_mutex_data mt8183_mutex_driver_= data =3D { .mutex_mdp_mod_mask =3D MT8183_MUTEX_MDP_MOD_MASK, .mutex_mdp_sof_mask =3D MT8183_MUTEX_MDP_SOF_MASK, .no_clk =3D true, + .has_gce_client_reg =3D true, }; =20 static const struct mtk_mutex_data mt8186_mutex_driver_data =3D { @@ -553,6 +561,25 @@ u32 mtk_mutex_get_mdp_mod(struct mtk_mutex *mutex, enu= m mtk_mdp_comp_id id) } EXPORT_SYMBOL_GPL(mtk_mutex_get_mdp_mod); =20 +void mtk_mutex_add_mod_by_cmdq(struct mtk_mutex *mutex, u32 mod, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + unsigned int offset; + + WARN_ON(&mtx->mutex[mutex->id] !=3D mutex); + + offset =3D DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, mutex->id); + cmdq_pkt_write_mask(cmd->pkt, mtx->cmdq_reg.subsys, mtx->addr + offset, + mod, mtx->data->mutex_mdp_mod_mask); + + offset =3D DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg, mutex->id); + cmdq_pkt_write_mask(cmd->pkt, mtx->cmdq_reg.subsys, mtx->addr + offset, + 0, mtx->data->mutex_mdp_sof_mask); +} +EXPORT_SYMBOL_GPL(mtk_mutex_add_mod_by_cmdq); + void mtk_mutex_enable(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, @@ -564,6 +591,20 @@ void mtk_mutex_enable(struct mtk_mutex *mutex) } EXPORT_SYMBOL_GPL(mtk_mutex_enable); =20 +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + + WARN_ON(&mtx->mutex[mutex->id] !=3D mutex); + + cmdq_pkt_write_mask(cmd->pkt, mtx->cmdq_reg.subsys, + mtx->addr + DISP_REG_MUTEX_EN(mutex->id), + MTK_MUTEX_ENABLE, MTK_MUTEX_ENABLE); +} +EXPORT_SYMBOL_GPL(mtk_mutex_enable_by_cmdq); + void mtk_mutex_disable(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, @@ -575,6 +616,20 @@ void mtk_mutex_disable(struct mtk_mutex *mutex) } EXPORT_SYMBOL_GPL(mtk_mutex_disable); =20 +void mtk_mutex_disable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd) +{ + struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, + mutex[mutex->id]); + + WARN_ON(&mtx->mutex[mutex->id] !=3D mutex); + + cmdq_pkt_write_mask(cmd->pkt, mtx->cmdq_reg.subsys, + mtx->addr + DISP_REG_MUTEX_EN(mutex->id), + 0x0, MTK_MUTEX_ENABLE); +} +EXPORT_SYMBOL_GPL(mtk_mutex_disable_by_cmdq); + void mtk_mutex_acquire(struct mtk_mutex *mutex) { struct mtk_mutex_ctx *mtx =3D container_of(mutex, struct mtk_mutex_ctx, @@ -602,8 +657,8 @@ static int mtk_mutex_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; struct mtk_mutex_ctx *mtx; - struct resource *regs; - int i; + struct resource *regs, addr; + int i, ret; =20 mtx =3D devm_kzalloc(dev, sizeof(*mtx), GFP_KERNEL); if (!mtx) @@ -623,6 +678,19 @@ static int mtk_mutex_probe(struct platform_device *pde= v) } } =20 + if (of_address_to_resource(dev->of_node, 0, &addr) < 0) + mtx->addr =3D 0L; + else + mtx->addr =3D addr.start; + + if (mtx->data->has_gce_client_reg) { + ret =3D cmdq_dev_get_client_reg(dev, &mtx->cmdq_reg, 0); + if (ret) { + dev_err(dev, "No mediatek,gce-client-reg!\n"); + return ret; + } + } + regs =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); mtx->regs =3D devm_ioremap_resource(dev, regs); if (IS_ERR(mtx->regs)) { diff --git a/include/linux/soc/mediatek/mtk-mutex.h b/include/linux/soc/med= iatek/mtk-mutex.h index b2608f4220ee..05de7ad4a124 100644 --- a/include/linux/soc/mediatek/mtk-mutex.h +++ b/include/linux/soc/mediatek/mtk-mutex.h @@ -17,8 +17,14 @@ int mtk_mutex_prepare(struct mtk_mutex *mutex); void mtk_mutex_add_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); u32 mtk_mutex_get_mdp_mod(struct mtk_mutex *mutex, enum mtk_mdp_comp_id id= ); +void mtk_mutex_add_mod_by_cmdq(struct mtk_mutex *mutex, u32 mod, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_enable(struct mtk_mutex *mutex); +void mtk_mutex_enable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_disable(struct mtk_mutex *mutex); +void mtk_mutex_disable_by_cmdq(struct mtk_mutex *mutex, + struct mmsys_cmdq_cmd *cmd); void mtk_mutex_remove_comp(struct mtk_mutex *mutex, enum mtk_ddp_comp_id id); void mtk_mutex_unprepare(struct mtk_mutex *mutex); --=20 2.18.0