From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35C4DC433EF for ; Mon, 28 Feb 2022 11:18:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235066AbiB1LTL (ORCPT ); Mon, 28 Feb 2022 06:19:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235467AbiB1LTA (ORCPT ); Mon, 28 Feb 2022 06:19:00 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB1CF33E8C for ; Mon, 28 Feb 2022 03:18:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047099; x=1677583099; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yt27LNUTflYgzhTyHkUhcmzYyrzGjKVHAKDiaE7aibE=; b=ymaj6zKQmdm2RLC8PuN6xKp9pzHKxFmTW0PWb+5wN/fcPoblGgUYc8T2 yteWplLcTeEAiE5tZsPFSisxEsYlc/O1u9K4xhViYgVYCD7acNmzaq9VV XjkPIczy1cCzP7Fz25WPsz+vWf1UiYHO4kxgmitz4dHSsI9Yj1q3Jnvm9 3T2N/SWZqt+W+Nu7bdoAbm7MoMgNASb+4fem/7E++MQCH6PR+NhoIpPXg nDNQBgyS/ElCuBRzme43mm6eiMcuzoEfkw4GfarFXNtWnn+NaKQaLvS3X ZZVnd1CMFgZl7v2oh3WcLOoPCIDQm4vC4cJ9+ZT/7cnGFBP4nAqE1q36C A==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="155099435" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:19 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:18 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:16 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 1/7] clocksource/drivers/timer-microchip-pit64b: remove mmio selection Date: Mon, 28 Feb 2022 13:19:17 +0200 Message-ID: <20220228111923.1400049-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" PIT64B timer driver doesn't depend on CLKSRC_MMIO since commit e85c1d21b16b ("clocksource/drivers/timer-microchip-pit64b: Add clocksource suspend/resume"). Remove the selection. Signed-off-by: Claudiu Beznea --- drivers/clocksource/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index cfb8ea0df3b1..1ea556e75494 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -713,7 +713,6 @@ config INGENIC_OST config MICROCHIP_PIT64B bool "Microchip PIT64B support" depends on OF || COMPILE_TEST - select CLKSRC_MMIO select TIMER_OF help This option enables Microchip PIT64B timer for Atmel --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 57AC7C433F5 for ; Mon, 28 Feb 2022 11:18:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235293AbiB1LTV (ORCPT ); Mon, 28 Feb 2022 06:19:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234927AbiB1LTC (ORCPT ); Mon, 28 Feb 2022 06:19:02 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B235215A20 for ; Mon, 28 Feb 2022 03:18:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047102; x=1677583102; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kVbe5kyjR6LZvsZoGI+3OLtGGwUKh9RENE9A7JuYgqA=; b=u61hG4CXXcNVI7/IQIeo4/BlX/5vc01xMPhfrCejL9gOLb+5td6vsaF/ 75mlhNX3r2bdGsVYSPFKsGz/p/gdg2bbk1k9RFVeHNEoUTiioqk3LcvG0 NmGE7+FRudgEgPYbqWtixTKIZjANqDGdOUC25vkTH80pKhGhwyGGmXH4u bMI29TRO0JxguUL3HbH3+WlJVOvg985KU7zzcdcua7JdKj9OcV4ciI4/u Apc9j2GCHgUzqqYUV+b0z69FrlOtgp5kw0L+O3rh0OTnjCuY2bQ1SVMB/ yh6yNgyjuC6BYZqANcpaGwSSGieSnooFRAcRvr/At8tSAv4czYZng3a2j g==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="150223344" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:22 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:21 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:19 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 2/7] clocksource/drivers/timer-microchip-pit64b: remove timer-of dependency Date: Mon, 28 Feb 2022 13:19:18 +0200 Message-ID: <20220228111923.1400049-3-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" PIT64B driver doesn't use timer-of APIs. Thus, remove the selection. Signed-off-by: Claudiu Beznea --- drivers/clocksource/Kconfig | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 1ea556e75494..3aee0ffad1fe 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -713,7 +713,6 @@ config INGENIC_OST config MICROCHIP_PIT64B bool "Microchip PIT64B support" depends on OF || COMPILE_TEST - select TIMER_OF help This option enables Microchip PIT64B timer for Atmel based system. It supports the oneshot, the periodic --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 17CF2C433EF for ; Mon, 28 Feb 2022 11:18:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235126AbiB1LTR (ORCPT ); Mon, 28 Feb 2022 06:19:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235316AbiB1LTD (ORCPT ); Mon, 28 Feb 2022 06:19:03 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 552B233E03 for ; Mon, 28 Feb 2022 03:18:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047106; x=1677583106; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=3OTySUvfj9YLZ+NLvxOpjOu3QfEnAa4NzFTMBjne5gU=; b=c5cKTEFVj4mvx3hIm5KAL4mMg7kkj8/2v1+e4jaPHBp3SxZ1yjvjR8po OfZj77HB8dHhobBjHLefdctg8CtkgNXSAyw92u4/UK+eCF1TmeO7hKWLO J05SFMO+UMtSCiDbU4RAC5vAdLhTsvIpsdIr2EFoeI2pXQvVRe7r5QR39 vg+ssxylB/82jVrMOKDevNS6yU1NbyqXNJQyLMkowHv/J2acMhmXOZ9P0 CYGVYrHXoLlWnz5lNViFI8lYowkSTS+DUzDNy9NUXIZj2W7cip7CNif1W DsYlvzVgKO7R8gNTeCTm6URSXjlbmQSV+D3YdiYF5exdeBJlwcVjgUw4K w==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="154614990" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:25 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:24 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:22 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 3/7] clocksource/drivers/timer-microchip-pit64b: use notrace Date: Mon, 28 Feb 2022 13:19:19 +0200 Message-ID: <20220228111923.1400049-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use notrace for mchp_pit64b_sched_read_clk() to avoid recursive call of prepare_ftrace_return() when issuing: echo function_graph > /sys/kernel/debug/tracing/current_tracer Fixes: 625022a5f160 ("clocksource/drivers/timer-microchip-pit64b: Add Micro= chip PIT64B support") Signed-off-by: Claudiu Beznea --- drivers/clocksource/timer-microchip-pit64b.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index cfa4ec7ef396..790d2c9b42a7 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -165,7 +165,7 @@ static u64 mchp_pit64b_clksrc_read(struct clocksource *= cs) return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); } =20 -static u64 mchp_pit64b_sched_read_clk(void) +static u64 notrace mchp_pit64b_sched_read_clk(void) { return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); } --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CBD55C433F5 for ; Mon, 28 Feb 2022 11:18:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235598AbiB1LTZ (ORCPT ); Mon, 28 Feb 2022 06:19:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54190 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235133AbiB1LTG (ORCPT ); Mon, 28 Feb 2022 06:19:06 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B96A340C3 for ; Mon, 28 Feb 2022 03:18:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047108; x=1677583108; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Jti6Lf93/pkshsUoxGsmUk/NZEDKA40Cet1PtYYdvz4=; b=Z1Gw/aHOSX4Yg9a+N9uyO1jWt5i2YZcznv35G8r33Q5zlDJZaoHcS0Bk +7K3kKZrfeDmkVatvwOPg82lWGVgu1QYvaFGeF3s5jQJuklvby4bGqYyG sW2INQTI+dO2RtB1SoWX23VX8mP0vDZ3WztilvB46gC2Rz9jAWHrjiffl N/Rg7cOPiQ8wegB9C14VtyvGC4qGUgRsrNzIkZ4COYd7hUt9UoH0xfxRp CwEuVg4VPrCr8cnpfEV9qgxKv83z2Vmonlb9NGuz4pr8d3z3/Dx1nt4Nl K/OfJKDdM/ZeAwZH4mLOH7YNTuAIbPM/17eEEaWFjiRs5tqVYKD2uA8+G w==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="155099455" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:27 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:27 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:25 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 4/7] clocksource/drivers/timer-microchip-pit64b: use 5MHz for clockevent Date: Mon, 28 Feb 2022 13:19:20 +0200 Message-ID: <20220228111923.1400049-5-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use 5MHz clock for clockevent timers. This increases timer's resolution. Signed-off-by: Claudiu Beznea --- drivers/clocksource/timer-microchip-pit64b.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index 790d2c9b42a7..abce83d2f00b 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -42,8 +42,7 @@ #define MCHP_PIT64B_LSBMASK GENMASK_ULL(31, 0) #define MCHP_PIT64B_PRES_TO_MODE(p) (MCHP_PIT64B_MR_PRES & ((p) << 8)) #define MCHP_PIT64B_MODE_TO_PRES(m) ((MCHP_PIT64B_MR_PRES & (m)) >> 8) -#define MCHP_PIT64B_DEF_CS_FREQ 5000000UL /* 5 MHz */ -#define MCHP_PIT64B_DEF_CE_FREQ 32768 /* 32 KHz */ +#define MCHP_PIT64B_DEF_FREQ 5000000UL /* 5 MHz */ =20 #define MCHP_PIT64B_NAME "pit64b" =20 @@ -418,7 +417,6 @@ static int __init mchp_pit64b_init_clkevt(struct mchp_p= it64b_timer *timer, static int __init mchp_pit64b_dt_init_timer(struct device_node *node, bool clkevt) { - u32 freq =3D clkevt ? MCHP_PIT64B_DEF_CE_FREQ : MCHP_PIT64B_DEF_CS_FREQ; struct mchp_pit64b_timer timer; unsigned long clk_rate; u32 irq =3D 0; @@ -446,7 +444,7 @@ static int __init mchp_pit64b_dt_init_timer(struct devi= ce_node *node, } =20 /* Initialize mode (prescaler + SGCK bit). To be used at runtime. */ - ret =3D mchp_pit64b_init_mode(&timer, freq); + ret =3D mchp_pit64b_init_mode(&timer, MCHP_PIT64B_DEF_FREQ); if (ret) goto irq_unmap; =20 --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0740AC433EF for ; Mon, 28 Feb 2022 11:18:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235439AbiB1LT3 (ORCPT ); Mon, 28 Feb 2022 06:19:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54376 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233410AbiB1LTJ (ORCPT ); Mon, 28 Feb 2022 06:19:09 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 00D783525A for ; Mon, 28 Feb 2022 03:18:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047110; x=1677583110; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lUQnn0zVy+bE/xhgO9ACVEqiKnempNvpK91uF2dQ9T0=; b=ohGkoTCuAaptfoD/td3gmWBXur9ctFcnShf+y5wH1m6hDd0BrLel5U4F 0+sCKGizN05EsYWgFos+5W+5cX2B0UTXUyaJFEGyG4H349T93rbhN5WtN gwCzTiYSWd7EpgaIbH3mzrj+VA0+o3IN+dEYalsafQNNIC2NFLu6JTR3a f0jo5//rJG8UYN43GEGjwb8VsHB7IWV4mbLMx40QLroPwKpg24IYht+Gl CK+OJonUmEeLUny91u+CFxWbTTELeS9fTl2Cyt4Lrg9YBm0BnRTqkwr+3 SIgPw9Rb30zFWokfEumZHp2r8ZVwLFo3u8SVTVxZmunUZ+Of3uYy+B5Xt g==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="155099464" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:30 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:29 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:28 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 5/7] clocksource/drivers/timer-microchip-pit64b: add delay timer Date: Mon, 28 Feb 2022 13:19:21 +0200 Message-ID: <20220228111923.1400049-6-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Add delay timer. Signed-off-by: Claudiu Beznea Reported-by: kernel test robot --- drivers/clocksource/timer-microchip-pit64b.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index abce83d2f00b..f1b211ee6312 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -9,6 +9,7 @@ =20 #include #include +#include #include #include #include @@ -92,6 +93,8 @@ struct mchp_pit64b_clksrc { static void __iomem *mchp_pit64b_cs_base; /* Default cycles for clockevent timer. */ static u64 mchp_pit64b_ce_cycles; +/* Delay timer. */ +static struct delay_timer mchp_pit64b_dt; =20 static inline u64 mchp_pit64b_cnt_read(void __iomem *base) { @@ -169,6 +172,11 @@ static u64 notrace mchp_pit64b_sched_read_clk(void) return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); } =20 +static unsigned long notrace mchp_pit64b_dt_read(void) +{ + return mchp_pit64b_cnt_read(mchp_pit64b_cs_base); +} + static int mchp_pit64b_clkevt_shutdown(struct clock_event_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); @@ -371,6 +379,10 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_= pit64b_timer *timer, =20 sched_clock_register(mchp_pit64b_sched_read_clk, 64, clk_rate); =20 + mchp_pit64b_dt.read_current_timer =3D mchp_pit64b_dt_read; + mchp_pit64b_dt.freq =3D clk_rate; + register_current_timer_delay(&mchp_pit64b_dt); + return 0; } =20 --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1E9BC433EF for ; Mon, 28 Feb 2022 11:18:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235629AbiB1LTc (ORCPT ); Mon, 28 Feb 2022 06:19:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234784AbiB1LTM (ORCPT ); Mon, 28 Feb 2022 06:19:12 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82ED03632E for ; Mon, 28 Feb 2022 03:18:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047113; x=1677583113; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=MebY3M8uEAsbTB1iOUpMjgUidYLacImzFaOYQxQuJWw=; b=hRFJRoqlG2IafqLitdkGJOFtmJmFLTD5STDaCcnwdU399/juTzS3pCWe 6WgexBp9E8RsBfpoWHk7bxdvBQl/lErMSIIssXeWD415oZax9HC8WPJU0 Xwe3TzAQkxGN9Gykl/AGdzygCg4H2PCViJ5EorwrDy+sBjfvq2gkGf4Pm zabDEwm/5XJpgdzAafqu4ZUseAxKCUte8ix+VPtbSit6/1LZyrEZpMVgx D28NQiglHWa+6GmkVIqdwqswCkAFCTLf675Eqsek3U5YLpViXlPgoz3SC T5V5G8Od2IUtCUBzAXurRxuLjYHtd5ANCPhTuRGrF4/iaMz6LHb3fmtzq Q==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="87225619" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:32 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:32 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:30 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 6/7] clocksource/drivers/timer-microchip-pit64b: remove suspend/resume ops for ce Date: Mon, 28 Feb 2022 13:19:22 +0200 Message-ID: <20220228111923.1400049-7-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Remove suspend and resume ops for clockevent and add set_state_oneshot() instead. Along with this mchp_pit64b_{suspend, resume}() were called on proper function to disable/enable clocks. This will allow disabling clocks for clockevent in case it is not selected as active clockevent. Signed-off-by: Claudiu Beznea --- drivers/clocksource/timer-microchip-pit64b.c | 30 +++++++++++--------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index f1b211ee6312..dd1661604966 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -181,7 +181,8 @@ static int mchp_pit64b_clkevt_shutdown(struct clock_eve= nt_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); =20 - writel_relaxed(MCHP_PIT64B_CR_SWRST, timer->base + MCHP_PIT64B_CR); + if (!clockevent_state_detached(cedev)) + mchp_pit64b_suspend(timer); =20 return 0; } @@ -190,35 +191,37 @@ static int mchp_pit64b_clkevt_set_periodic(struct clo= ck_event_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); =20 + if (clockevent_state_shutdown(cedev)) + mchp_pit64b_resume(timer); + mchp_pit64b_reset(timer, mchp_pit64b_ce_cycles, MCHP_PIT64B_MR_CONT, MCHP_PIT64B_IER_PERIOD); =20 return 0; } =20 -static int mchp_pit64b_clkevt_set_next_event(unsigned long evt, - struct clock_event_device *cedev) +static int mchp_pit64b_clkevt_set_oneshot(struct clock_event_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); =20 - mchp_pit64b_reset(timer, evt, MCHP_PIT64B_MR_ONE_SHOT, + if (clockevent_state_shutdown(cedev)) + mchp_pit64b_resume(timer); + + mchp_pit64b_reset(timer, mchp_pit64b_ce_cycles, MCHP_PIT64B_MR_ONE_SHOT, MCHP_PIT64B_IER_PERIOD); =20 return 0; } =20 -static void mchp_pit64b_clkevt_suspend(struct clock_event_device *cedev) +static int mchp_pit64b_clkevt_set_next_event(unsigned long evt, + struct clock_event_device *cedev) { struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); =20 - mchp_pit64b_suspend(timer); -} - -static void mchp_pit64b_clkevt_resume(struct clock_event_device *cedev) -{ - struct mchp_pit64b_timer *timer =3D clkevt_to_mchp_pit64b_timer(cedev); + mchp_pit64b_reset(timer, evt, MCHP_PIT64B_MR_ONE_SHOT, + MCHP_PIT64B_IER_PERIOD); =20 - mchp_pit64b_resume(timer); + return 0; } =20 static irqreturn_t mchp_pit64b_interrupt(int irq, void *dev_id) @@ -407,9 +410,8 @@ static int __init mchp_pit64b_init_clkevt(struct mchp_p= it64b_timer *timer, ce->clkevt.rating =3D 150; ce->clkevt.set_state_shutdown =3D mchp_pit64b_clkevt_shutdown; ce->clkevt.set_state_periodic =3D mchp_pit64b_clkevt_set_periodic; + ce->clkevt.set_state_oneshot =3D mchp_pit64b_clkevt_set_oneshot; ce->clkevt.set_next_event =3D mchp_pit64b_clkevt_set_next_event; - ce->clkevt.suspend =3D mchp_pit64b_clkevt_suspend; - ce->clkevt.resume =3D mchp_pit64b_clkevt_resume; ce->clkevt.cpumask =3D cpumask_of(0); ce->clkevt.irq =3D irq; =20 --=20 2.32.0 From nobody Tue Jun 23 19:25:12 2026 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6052DC433F5 for ; Mon, 28 Feb 2022 11:19:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235597AbiB1LTk (ORCPT ); Mon, 28 Feb 2022 06:19:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55084 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235316AbiB1LTR (ORCPT ); Mon, 28 Feb 2022 06:19:17 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C77735DC1 for ; Mon, 28 Feb 2022 03:18:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1646047116; x=1677583116; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=DN+94+J4jdsioJx8FJjTB5GVluUzTVOxlq0TAtH+lSY=; b=pq0QSH9zQkVEQ65LVLGYt7yeEOYWjq1Stg+ZXMxgypXtKATtqFc7ko64 h91mHYpxr9vn7mIjpOcfe+3caPaVQQxJZB9+mI3MWOsEWAlNLRRXflv8R NQ4wk8Cqq6a510aNzMNl/phycPDD1BLMul913rUc/g6a//TLwci3JMvMe 242PLylE0+X/vf2l7iI29UBVLGrKXkTvNBeMtSVSKdeZC4j5JOW2ncm/4 zpdV9dV266U3q+VOjPRUSCCu4eQRp2Bv95E8BIDSPtJ50WxafxbTKyatL kSWGVEBz0CIMss9VDpxfPXWdVuaNZARfwIqyAwtNY8OkzNWxx+OvuQLn6 A==; X-IronPort-AV: E=Sophos;i="5.90,142,1643698800"; d="scan'208";a="163859419" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Feb 2022 04:18:35 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Mon, 28 Feb 2022 04:18:35 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Mon, 28 Feb 2022 04:18:33 -0700 From: Claudiu Beznea To: , CC: , , Claudiu Beznea Subject: [PATCH 7/7] clocksource/drivers/timer-microchip-pit64b: use mchp_pit64b_{suspend, resume} Date: Mon, 28 Feb 2022 13:19:23 +0200 Message-ID: <20220228111923.1400049-8-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228111923.1400049-1-claudiu.beznea@microchip.com> References: <20220228111923.1400049-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Type: text/plain; charset="utf-8" Use mchp_pit64b_suspend() and mchp_pit64b_resume() to disable or enable timers clocks on init and remove specific clk_prepare_{disable, enable} calls. This is ok also for clockevent timer as proper clock enable, disable is done on .set_state_oneshot, .set_state_periodic, .set_state_shutdown calls. Signed-off-by: Claudiu Beznea Reported-by: kernel test robot --- drivers/clocksource/timer-microchip-pit64b.c | 17 ++++------------- 1 file changed, 4 insertions(+), 13 deletions(-) diff --git a/drivers/clocksource/timer-microchip-pit64b.c b/drivers/clockso= urce/timer-microchip-pit64b.c index dd1661604966..0f0d8160660c 100644 --- a/drivers/clocksource/timer-microchip-pit64b.c +++ b/drivers/clocksource/timer-microchip-pit64b.c @@ -352,6 +352,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_p= it64b_timer *timer, if (!cs) return -ENOMEM; =20 + mchp_pit64b_resume(timer); mchp_pit64b_reset(timer, ULLONG_MAX, MCHP_PIT64B_MR_CONT, 0); =20 mchp_pit64b_cs_base =3D timer->base; @@ -373,8 +374,7 @@ static int __init mchp_pit64b_init_clksrc(struct mchp_p= it64b_timer *timer, pr_debug("clksrc: Failed to register PIT64B clocksource!\n"); =20 /* Stop timer. */ - writel_relaxed(MCHP_PIT64B_CR_SWRST, - timer->base + MCHP_PIT64B_CR); + mchp_pit64b_suspend(timer); kfree(cs); =20 return ret; @@ -462,19 +462,10 @@ static int __init mchp_pit64b_dt_init_timer(struct de= vice_node *node, if (ret) goto irq_unmap; =20 - ret =3D clk_prepare_enable(timer.pclk); - if (ret) - goto irq_unmap; - - if (timer.mode & MCHP_PIT64B_MR_SGCLK) { - ret =3D clk_prepare_enable(timer.gclk); - if (ret) - goto pclk_unprepare; - + if (timer.mode & MCHP_PIT64B_MR_SGCLK) clk_rate =3D clk_get_rate(timer.gclk); - } else { + else clk_rate =3D clk_get_rate(timer.pclk); - } clk_rate =3D clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1); =20 if (clkevt) --=20 2.32.0